Lines Matching full:l2
3 "PublicDescription": "Demand data read requests that missed L2, no rejects.",
10 "BriefDescription": "Demand Data Read miss L2, no rejects",
14 "PublicDescription": "Counts the number of store RFO requests that miss the L2 cache.",
20 "BriefDescription": "RFO requests that miss L2 cache",
24 "PublicDescription": "Number of instruction fetches that missed the L2 cache.",
30 "BriefDescription": "L2 cache misses when fetching instructions",
34 "PublicDescription": "Demand requests that miss L2 cache.",
41 "BriefDescription": "Demand requests that miss L2 cache",
45 "PublicDescription": "Counts all L2 HW prefetcher requests that missed L2.",
51 "BriefDescription": "L2 prefetch requests that miss L2 cache",
55 "PublicDescription": "All requests that missed L2.",
62 "BriefDescription": "All requests that miss L2 cache",
66 …Counts the number of demand Data Read requests, initiated by load instructions, that hit L2 cache",
73 "BriefDescription": "Demand Data Read requests that hit L2 cache",
77 "PublicDescription": "Counts the number of store RFO requests that hit the L2 cache.",
83 "BriefDescription": "RFO requests that hit L2 cache",
87 "PublicDescription": "Number of instruction fetches that hit the L2 cache.",
93 "BriefDescription": "L2 cache hits when fetching instructions, code reads.",
97 "PublicDescription": "Counts all L2 HW prefetcher requests that hit L2.",
103 "BriefDescription": "L2 prefetch requests that hit L2 cache",
107 "PublicDescription": "Counts any demand and L1 HW prefetch data load requests to L2.",
118 "PublicDescription": "Counts all L2 store RFO requests.",
124 "BriefDescription": "RFO requests to L2 cache",
128 "PublicDescription": "Counts all L2 code requests.",
134 "BriefDescription": "L2 code requests",
138 "PublicDescription": "Demand requests to L2 cache.",
145 "BriefDescription": "Demand requests to L2 cache",
149 "PublicDescription": "Counts all L2 HW prefetcher requests.",
155 "BriefDescription": "Requests from L2 hardware prefetchers",
159 "PublicDescription": "All requests to L2 cache.",
166 "BriefDescription": "All L2 requests",
170 "PublicDescription": "Not rejected writebacks that hit L2 cache.",
176 "BriefDescription": "Not rejected writebacks that hit L2 cache",
526 "BriefDescription": "Retired load uops with L2 cache hits as data sources.",
564 "BriefDescription": "Retired load uops with L2 cache misses as data sources.",
655 "PublicDescription": "Demand data read requests that access L2 cache.",
661 "BriefDescription": "Demand Data Read requests that access L2 cache",
665 "PublicDescription": "RFO requests that access L2 cache.",
671 "BriefDescription": "RFO requests that access L2 cache",
675 "PublicDescription": "L2 cache accesses when fetching instructions.",
681 "BriefDescription": "L2 cache accesses when fetching instructions",
685 "PublicDescription": "Any MLC or L3 HW prefetch accessing L2, including rejects.",
691 "BriefDescription": "L2 or L3 HW prefetches that access L2 cache",
695 "PublicDescription": "L1D writebacks that access L2 cache.",
701 "BriefDescription": "L1D writebacks that access L2 cache",
705 "PublicDescription": "L2 fill requests that access L2 cache.",
711 "BriefDescription": "L2 fill requests that access L2 cache",
715 "PublicDescription": "L2 writebacks that access L2 cache.",
721 "BriefDescription": "L2 writebacks that access L2 cache",
725 "PublicDescription": "Transactions accessing L2 pipe.",
731 "BriefDescription": "Transactions accessing L2 pipe",
735 "PublicDescription": "L2 cache lines in I state filling L2.",
741 "BriefDescription": "L2 cache lines in I state filling L2",
745 "PublicDescription": "L2 cache lines in S state filling L2.",
751 "BriefDescription": "L2 cache lines in S state filling L2",
755 "PublicDescription": "L2 cache lines in E state filling L2.",
761 "BriefDescription": "L2 cache lines in E state filling L2",
765 …event counts the number of L2 cache lines brought into the L2 cache. Lines are filled into the L2…
771 "BriefDescription": "L2 cache lines filling L2",
775 "PublicDescription": "Clean L2 cache lines evicted by demand.",
781 "BriefDescription": "Clean L2 cache lines evicted by demand",
785 "PublicDescription": "Dirty L2 cache lines evicted by demand.",
791 "BriefDescription": "Dirty L2 cache lines evicted by demand",
960 "PublicDescription": "Counts all prefetch (that bring data to L2) RFOs hit in the L3",
968 "BriefDescription": "Counts all prefetch (that bring data to L2) RFOs hit in the L3",
973 "PublicDescription": "Counts prefetch (that bring data to L2) data reads hit in the L3",
981 "BriefDescription": "Counts prefetch (that bring data to L2) data reads hit in the L3",