Lines Matching +full:1 +full:- +full:based
3 "CollectPEBSRecord": "1",
4 …ine is in the ICache. This event counts differently than Intel processors based on Silvermont micr…
6 "Counter": "0,1,2,3",
10 … in the ICache (hit). This event counts differently than Intel processors based on Silvermont micr…
13 "CollectPEBSRecord": "1",
14 …is not in the ICache. This event counts differently than Intel processors based on Silvermont micr…
16 "Counter": "0,1,2,3",
20 …in the ICache (miss). This event counts differently than Intel processors based on Silvermont micr…
23 "CollectPEBSRecord": "1",
24 … is to a new line.\r\nThis event counts differently than Intel processors based on Silvermont micr…
26 "Counter": "0,1,2,3",
30 …nces per ICache line. This event counts differently than Intel processors based on Silvermont micr…
33 "CollectPEBSRecord": "1",
34 … read from the MSROM. The most common case that this counts is when a micro-coded instruction is …
36 "Counter": "0,1,2,3",
43 "CollectPEBSRecord": "1",
46 "Counter": "0,1,2,3",