Lines Matching +full:2 +full:- +full:point

5 …   "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
6         "Counter": "0,1,2,3",
9 …"PublicDescription": "This event counts the number of transitions from AVX-256 to legacy SSE when …
11         "CounterHTOff": "0,1,2,3,4,5,6,7"
16         "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
17         "Counter": "0,1,2,3",
20 …"PublicDescription": "This event counts the number of transitions from legacy SSE to AVX-256 when …
22         "CounterHTOff": "0,1,2,3,4,5,6,7"
27 …on floating-point instructions retired.  Each count represents 1 computation. Applies to SSE* and …
28         "Counter": "0,1,2,3",
31         "CounterHTOff": "0,1,2,3"
36 …on floating-point instructions retired.  Each count represents 1 computation. Applies to SSE* and …
37         "Counter": "0,1,2,3",
40         "CounterHTOff": "0,1,2,3"
45 …tational scalar floating-point instructions retired. Applies to SSE* and AVX* scalar, double and s…
46         "Counter": "0,1,2,3",
49         "CounterHTOff": "0,1,2,3"
54 …-bit packed double precision floating-point instructions retired.  Each count represents 2 computa…
55         "Counter": "0,1,2,3",
58         "CounterHTOff": "0,1,2,3"
63 …-bit packed single precision floating-point instructions retired.  Each count represents 4 computa…
64         "Counter": "0,1,2,3",
67         "CounterHTOff": "0,1,2,3"
72 …-bit packed double precision floating-point instructions retired.  Each count represents 4 computa…
73         "Counter": "0,1,2,3",
76         "CounterHTOff": "0,1,2,3"
81 …double precision floating-point instructions retired. Applies to SSE* and AVX*scalar, double and s…
82         "Counter": "0,1,2,3",
85         "CounterHTOff": "0,1,2,3"
90 …-bit packed single precision floating-point instructions retired.  Each count represents 8 computa…
91         "Counter": "0,1,2,3",
94         "CounterHTOff": "0,1,2,3"
99 …single precision floating-point instructions retired. Applies to SSE* and AVX*scalar, double and s…
100         "Counter": "0,1,2,3",
103         "CounterHTOff": "0,1,2,3"
108 …-point instructions retired. Applies to SSE* and AVX*, packed, double and single precision floatin…
109         "Counter": "0,1,2,3",
112         "CounterHTOff": "0,1,2,3"
118         "Counter": "0,1,2,3",
120 …"PublicDescription": "This event counts the number of x87 floating point (FP) micro-code assist (n…
122         "CounterHTOff": "0,1,2,3,4,5,6,7"
128         "Counter": "0,1,2,3",
130 …"PublicDescription": "This event counts x87 floating point (FP) micro-code assist (invalid operati…
132         "CounterHTOff": "0,1,2,3,4,5,6,7"
138         "Counter": "0,1,2,3",
140 …point (FP) micro-code assist (numeric overflow/underflow) when the output value (destination regis…
142         "CounterHTOff": "0,1,2,3,4,5,6,7"
148         "Counter": "0,1,2,3",
150 …ssist - invalid operation, denormal operand, dividing by zero, SNaN operand. Counting includes onl…
152         "CounterHTOff": "0,1,2,3,4,5,6,7"
158         "Counter": "0,1,2,3",
163         "CounterHTOff": "0,1,2,3"