Lines Matching full:either

35 …"BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump …
65 …"BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too sma…
365 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for either de…
371 …p's L2 or L3 on a different Node or Group (Distant), as this chip due to either demand loads or da…
372 …p's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads …
377 …p's L2 or L3 on a different Node or Group (Distant), as this chip due to either demand loads or da…
378 …p's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads …
383 …ded from another chip's L4 on a different Node or Group (Distant) due to either demand loads or da…
384 …ded from another chip's L4 on a different Node or Group (Distant) due to either only demand loads …
389 …ed from another chip's memory on the same Node or Group (Distant) due to either demand loads or da…
390 …ed from another chip's memory on the same Node or Group (Distant) due to either only demand loads …
395 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 due to either de…
396 …n": "The processor's data cache was reloaded from local core's L2 due to either only demand loads …
401 …ed with Modified (M) data from another core's L2 on the same chip due to either demand loads or da…
402 …ed with Modified (M) data from another core's L2 on the same chip due to either only demand loads …
407 …aded with Shared (S) data from another core's L2 on the same chip due to either demand loads or da…
408 …aded with Shared (S) data from another core's L2 on the same chip due to either only demand loads …
413 …cache was reloaded from a location other than the local core's L2 due to either demand loads or da…
414 …cache was reloaded from a location other than the local core's L2 due to either only demand loads …
419 …he was reloaded from local core's L2 with load hit store conflict due to either demand loads or da…
420 …he was reloaded from local core's L2 with load hit store conflict due to either only demand loads …
425 …ta cache was reloaded from local core's L2 with dispatch conflict due to either demand loads or da…
426 …ta cache was reloaded from local core's L2 with dispatch conflict due to either only demand loads …
431 …from local core's L2 hit without dispatch conflicts on Mepf state due to either demand loads or da…
432 …from local core's L2 hit without dispatch conflicts on Mepf state due to either only demand loads …
437 …r's data cache was reloaded from local core's L2 without conflict due to either demand loads or da…
438 …r's data cache was reloaded from local core's L2 without conflict due to either only demand loads …
443 …"BriefDescription": "The processor's data cache was reloaded from local core's L3 due to either de…
444 …n": "The processor's data cache was reloaded from local core's L3 due to either only demand loads …
449 …ith Modified (M) data from another core's ECO L3 on the same chip due to either demand loads or da…
450 …ith Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads …
455 … with Shared (S) data from another core's ECO L3 on the same chip due to either demand loads or da…
456 … with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads …
461 …ed with Modified (M) data from another core's L3 on the same chip due to either demand loads or da…
462 …ed with Modified (M) data from another core's L3 on the same chip due to either only demand loads …
467 …aded with Shared (S) data from another core's L3 on the same chip due to either demand loads or da…
468 …aded with Shared (S) data from another core's L3 on the same chip due to either only demand loads …
473 …cache was reloaded from a location other than the local core's L3 due to either demand loads or da…
474 …cache was reloaded from a location other than the local core's L3 due to either only demand loads …
479 …ta cache was reloaded from local core's L3 with dispatch conflict due to either demand loads or da…
480 …ta cache was reloaded from local core's L3 with dispatch conflict due to either only demand loads …
485 …from local core's L3 without dispatch conflicts hit on Mepf state due to either demand loads or da…
486 …from local core's L3 without dispatch conflicts hit on Mepf state due to either only demand loads …
491 …r's data cache was reloaded from local core's L3 without conflict due to either demand loads or da…
492 …r's data cache was reloaded from local core's L3 without conflict due to either only demand loads …
497 …rocessor's data cache was reloaded from the local chip's L4 cache due to either demand loads or da…
498 …rocessor's data cache was reloaded from the local chip's L4 cache due to either only demand loads …
503 … processor's data cache was reloaded from the local chip's Memory due to either demand loads or da…
504 … processor's data cache was reloaded from the local chip's Memory due to either only demand loads …
509 … from a memory location including L4 from local remote or distant due to either demand loads or da…
510 … from a memory location including L4 from local remote or distant due to either only demand loads …
515 …a cache was reloaded either shared or modified data from another core's L2/L3 on a different chip …
516 …a cache was reloaded either shared or modified data from another core's L2/L3 on a different chip …
521 …cessor's data cache was reloaded either shared or modified data from another core's L2/L3 on the s…
522 …cessor's data cache was reloaded either shared or modified data from another core's L2/L3 on the s…
527 … chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either demand loads or da…
528 … chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads …
533 … chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either demand loads or da…
534 … chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads …
539 …loaded from another chip's L4 on the same Node or Group ( Remote) due to either demand loads or da…
540 …loaded from another chip's L4 on the same Node or Group ( Remote) due to either only demand loads …
545 …ed from another chip's memory on the same Node or Group ( Remote) due to either demand loads or da…
546 …ed from another chip's memory on the same Node or Group ( Remote) due to either only demand loads …
551 …": "Initial and Final Pump Scope was group pump (prediction=correct) for either demand loads or da…
557 …scription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope fo…
563 …al Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for either demand loads or da…
569 …"BriefDescription": "Pump prediction correct. Counts across all types of pumps for either demand l…
575 …"BriefDescription": "Pump misprediction. Counts across all types of pumps for either demand loads …
581 …: "Initial and Final Pump Scope was system pump (prediction=correct) for either demand loads or da…
587 …dicted. Either the original scope was too small (Chip/Group) or the original scope was System and …
593 … Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for either demand loads or da…
600 …ed with Modified (M) data from another core's L2 on the same chip due to either only demand loads …
606 …aded with Shared (S) data from another core's L2 on the same chip due to either only demand loads …
612 …ith Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads …
618 … with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads …
624 …ed with Modified (M) data from another core's L3 on the same chip due to either only demand loads …
630 …aded with Shared (S) data from another core's L3 on the same chip due to either only demand loads …
995     "BriefDescription": "No itags assigned either thread (GCT Empty)",
1242 …p's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fet…
1248 …p's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fet…
1254 …ded from another chip's L4 on a different Node or Group (Distant) due to either an instruction fet…
1260 …ed from another chip's memory on the same Node or Group (Distant) due to either an instruction fet…
1266 …e processor's Instruction cache was reloaded from local core's L2 due to either an instruction fet…
1272 …ed with Modified (M) data from another core's L2 on the same chip due to either an instruction fet…
1278 …aded with Shared (S) data from another core's L2 on the same chip due to either an instruction fet…
1284 …cache was reloaded from a location other than the local core's L2 due to either an instruction fet…
1290 …he was reloaded from local core's L2 with load hit store conflict due to either an instruction fet…
1296 …on cache was reloaded from local core's L2 with dispatch conflict due to either an instruction fet…
1302 …rom local core's L2 hit without dispatch conflicts on Mepf state. due to either an instruction fet…
1308 …truction cache was reloaded from local core's L2 without conflict due to either an instruction fet…
1314 …e processor's Instruction cache was reloaded from local core's L3 due to either an instruction fet…
1320 …ith Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fet…
1326 … with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fet…
1332 …ed with Modified (M) data from another core's L3 on the same chip due to either an instruction fet…
1338 …aded with Shared (S) data from another core's L3 on the same chip due to either an instruction fet…
1344 …cache was reloaded from a location other than the local core's L3 due to either an instruction fet…
1350 …on cache was reloaded from local core's L3 with dispatch conflict due to either an instruction fet…
1356 …rom local core's L3 without dispatch conflicts hit on Mepf state. due to either an instruction fet…
1362 …truction cache was reloaded from local core's L3 without conflict due to either an instruction fet…
1368 …r's Instruction cache was reloaded from the local chip's L4 cache due to either an instruction fet…
1374 …sor's Instruction cache was reloaded from the local chip's Memory due to either an instruction fet…
1380 … from a memory location including L4 from local remote or distant due to either an instruction fet…
1385 …"BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data…
1386 …n cache was reloaded either shared or modified data from another core's L2/L3 on a different chip …
1391 …"BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data…
1392 …s Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the s…
1398 … chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fet…
1404 … chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fet…
1410 …loaded from another chip's L4 on the same Node or Group ( Remote) due to either an instruction fet…
1416 …ed from another chip's memory on the same Node or Group ( Remote) due to either an instruction fet…
1427 …"BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump …
1457 …"BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too sma…
1476 …ed with Modified (M) data from another core's L2 on the same chip due to either an instruction fet…
1482 …aded with Shared (S) data from another core's L2 on the same chip due to either an instruction fet…
1488 …ith Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fet…
1494 … with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fet…
1500 …ed with Modified (M) data from another core's L3 on the same chip due to either an instruction fet…
1506 …aded with Shared (S) data from another core's L3 on the same chip due to either an instruction fet…
1589     "BriefDescription": "FXU ISU reject from either pipe",
1655     "BriefDescription": "VSU ISU reject from either pipe",
2309     "BriefDescription": "Erat miss due to prefetch, on either pipe",
2315     "BriefDescription": "Unaligned Store Flush on either pipe",
2477     "BriefDescription": "Store reject on either pipe",