Lines Matching +full:l2 +full:- +full:cache

47     "BriefDescription": "Number of I-ERAT reloads",
89 …fDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another…
90 …cDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another…
95 …efDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another …
96 …icDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another …
101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
107 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on …
108 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on…
113 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to an…
114 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 due to e…
119 …fDescription": "The processor's Instruction cache was reloaded from a location other than the loca…
120 …cDescription": "The processor's Instruction cache was reloaded from a location other than the loca…
125 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with load…
126 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with loa…
131 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with disp…
132 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with dis…
137 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 hit witho…
138 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 hit with…
143 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 without c…
144 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 without …
149 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to an…
150 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 due to e…
161 …"BriefDescription": "The processor's Instruction cache was reloaded from a location other than the…
162 …"PublicDescription": "The processor's Instruction cache was reloaded from a location other than th…
167 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 with disp…
168 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 with dis…
173 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without d…
174 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without …
179 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without c…
180 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without …
185 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache…
186 …"PublicDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cach…
191 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory d…
192 …"PublicDescription": "The processor's Instruction cache was reloaded from the local chip's Memory …
197 …"BriefDescription": "The processor's Instruction cache was reloaded from a memory location includi…
198 …"PublicDescription": "The processor's Instruction cache was reloaded from a memory location includ…
203 …cription": "The processor's Instruction cache was reloaded either shared or modified data from ano…
204 …cription": "The processor's Instruction cache was reloaded either shared or modified data from ano…
209 …cription": "The processor's Instruction cache was reloaded either shared or modified data from ano…
210 …cription": "The processor's Instruction cache was reloaded either shared or modified data from ano…
215 …fDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another…
216 …cDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another…
221 …efDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another …
222 …icDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another …
227 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the …
228 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the…
233 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on …
234 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on…
293 …e Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different…
299 …ble Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different…
317 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a inst…
323 … Entry was loaded into the TLB from a location other than the local core's L2 due to a instruction…
329 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without d…
335 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without confl…
371 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
389 …was loaded into the TLB either shared or modified data from another core's L2/L3 on a different ch…
395 …was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip …
401 …e Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same No…
407 …ble Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same No…