Lines Matching full:from
89 …"BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from an…
90 …": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 o…
95 …"BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from anot…
96 …"PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from ano…
101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
107 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on …
108 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on…
113 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to an…
114 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 due to e…
119 …"BriefDescription": "The processor's Instruction cache was reloaded from a location other than the…
120 …"PublicDescription": "The processor's Instruction cache was reloaded from a location other than th…
125 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with load…
126 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with loa…
131 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with disp…
132 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with dis…
137 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 hit witho…
138 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 hit with…
143 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 without c…
144 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 without …
149 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to an…
150 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 due to e…
155 "BriefDescription": "Marked instruction was reloaded from a location beyond the local chiplet",
156 "PublicDescription": "Inst from L3 miss"
161 …"BriefDescription": "The processor's Instruction cache was reloaded from a location other than the…
162 …"PublicDescription": "The processor's Instruction cache was reloaded from a location other than th…
167 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 with disp…
168 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 with dis…
173 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without d…
174 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without …
179 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without c…
180 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without …
185 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache…
186 …"PublicDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cach…
191 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory d…
192 …"PublicDescription": "The processor's Instruction cache was reloaded from the local chip's Memory …
197 …ption": "The processor's Instruction cache was reloaded from a memory location including L4 from l…
198 …ption": "The processor's Instruction cache was reloaded from a memory location including L4 from l…
203 …processor's Instruction cache was reloaded either shared or modified data from another core's L2/L…
204 …processor's Instruction cache was reloaded either shared or modified data from another core's L2/L…
209 …processor's Instruction cache was reloaded either shared or modified data from another core's L2/L…
210 …processor's Instruction cache was reloaded either shared or modified data from another core's L2/L…
215 …"BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from an…
216 …": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 o…
221 …"BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from anot…
222 …"PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from ano…
227 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the …
228 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the…
233 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on …
234 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on…
246 …ded up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at …
282 … than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at …
293 …"BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from anothe…
299 …"BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another …
305 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
311 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the …
317 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a inst…
323 …"BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the loc…
329 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without d…
335 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without confl…
341 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a inst…
347 …"BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the loc…
353 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch…
359 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispa…
365 …"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without confl…
371 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
377 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due t…
383 …scription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from l…
389 …A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L…
395 …A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L…
401 …"BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from anothe…
407 …"BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another …
413 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same…
419 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the …