Lines Matching +full:l2 +full:- +full:cache
5 …"BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another c…
6 …"PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another …
11 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi…
12 …"PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another ch…
17 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different…
18 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a differen…
23 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a demand …
24 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either o…
29 "BriefDescription": "Demand LD - L2 Miss (not L2 hit)",
35 …"BriefDescription": "The processor's data cache was reloaded from a location other than the local …
36 …"PublicDescription": "The processor's data cache was reloaded from a location other than the local…
41 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
42 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 with load hit s…
47 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch co…
48 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 with dispatch c…
53 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without disp…
54 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 hit without dis…
59 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 without conflict…
60 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 without conflic…
65 …"BriefDescription": "The processor's data cache was reloaded from local core's L3 due to a demand …
66 …"PublicDescription": "The processor's data cache was reloaded from local core's L3 due to either o…
71 "BriefDescription": "Demand LD - L3 Miss (not L2 hit and not L3 hit)",
77 …"BriefDescription": "The processor's data cache was reloaded from a location other than the local …
78 …"PublicDescription": "The processor's data cache was reloaded from a location other than the local…
83 …"BriefDescription": "The processor's data cache was reloaded from local core's L3 with dispatch co…
84 …"PublicDescription": "The processor's data cache was reloaded from local core's L3 with dispatch c…
89 …"BriefDescription": "The processor's data cache was reloaded from local core's L3 without dispatch…
90 …"PublicDescription": "The processor's data cache was reloaded from local core's L3 without dispatc…
95 …"BriefDescription": "The processor's data cache was reloaded from local core's L3 without conflict…
96 …"PublicDescription": "The processor's data cache was reloaded from local core's L3 without conflic…
101 …"BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to…
102 …"PublicDescription": "The processor's data cache was reloaded from the local chip's L4 cache due t…
107 …riefDescription": "The processor's data cache was reloaded either shared or modified data from ano…
108 …blicDescription": "The processor's data cache was reloaded either shared or modified data from ano…
113 …riefDescription": "The processor's data cache was reloaded either shared or modified data from ano…
114 …blicDescription": "The processor's data cache was reloaded either shared or modified data from ano…
119 …"BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another c…
120 …"PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another …
125 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi…
126 …"PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another ch…
143 "BriefDescription": "Data SLB Miss - Total of all segment sizes",
144 "PublicDescription": "Data SLB Miss - Total of all segment sizesData SLB misses"
149 "BriefDescription": "L1 data cache reloaded for demand or prefetch",
167 "BriefDescription": "All L1 D cache load references counted at finish, gated by reject",