Lines Matching refs:po
15 7. THE PROGRAM ORDER RELATION: po AND po-loc
327 THE PROGRAM ORDER RELATION: po AND po-loc
330 The most important relation between events is program order (po). You
335 that X is po-before Y (written as "X ->po Y" in formulas) if X occurs
339 on different CPUs are never linked by po. Also, it is by definition
342 po-loc is a sub-relation of po. It links two memory accesses when the
484 have R ->po X. It wouldn't make sense for a computation to depend
583 Write-write coherence: If W ->po-loc W' (i.e., W comes before
587 Write-read coherence: If W ->po-loc R, where W is a store and R
591 Read-write coherence: If R ->po-loc W, where R is a load and W
595 Read-read coherence: If R ->po-loc R', where R and R' are two
670 Just like the po relation, co is inherently an ordering -- it is not
678 related by po. Coherence order is strictly per-location, or if you
748 uses the value of the po-latest such store as the value obtained by R,
781 the CPU to execute all po-earlier instructions before any
782 po-later instructions;
784 smp_rmb() forces the CPU to execute all po-earlier loads
785 before any po-later loads;
787 smp_wmb() forces the CPU to execute all po-earlier stores
788 before any po-later stores;
792 part of an smp_load_acquire()) before any po-later
796 execute all po-earlier instructions before the store
803 For each other CPU C', smp_wmb() forces all po-earlier stores
804 on C to propagate to C' before any po-later stores do.
807 a release fence is executed (including all po-earlier
812 executed (including all po-earlier stores on C) is forced to
813 propagate to all other CPUs before any instructions po-after
904 and po-loc relations agree with this global ordering; in other words,
905 whenever we have X ->rf Y or X ->co Y or X ->fr Y or X ->po-loc Y, the
913 where each of the links is either rf, co, fr, or po-loc. This has to
964 "preserved program order") relation, which links the po-earlier
965 instruction to the po-later instruction and is thus a sub-relation of
966 po.
970 memory accesses with X ->po Y; then the CPU must execute X before Y if
1023 store and a second, po-later load reads from that store:
1052 R ->po-loc W
1054 (the po-loc link says that R comes before W in program order and they
1060 W ->po-loc W'
1126 effect of the fence is to cause the CPU not to execute any po-later
1147 share this property: They do not allow the CPU to execute any po-later
1148 instructions (or po-later loads in the case of smp_rmb()) until all
1151 po-earlier stores to propagate to every other CPU in the system; then
1509 E ->rcu-link F includes cases where E is po-before some memory-access
1510 event X, F is po-after some memory-access event Y, and we have any of
1560 ends, but also that any write po-before E will propagate to every CPU
1561 before any instruction po-after F can execute. (However, it does not
1573 1. G = W is po-before or equal to X;
1577 3. Y is po-before Z;
1588 executing and hence before any instruction po-after F can execute.
1601 X ->po E ->rcu-order F ->po Y.
1638 are events Q and R where Q is po-after L (which marks the start of the
1640 relation, and R is po-before the grace period S. Thus we have:
1648 some event X which is po-after S. Symbolically, this amounts to:
1650 S ->po X ->hb* Z ->fr W ->rf Y ->po U.
1693 P1's load at W reads from, so we have W ->fre Y. Since S ->po W and
1694 also Y ->po U, we get S ->rcu-link U. In addition, S ->rcu-gp S
1698 so we have X ->rfe Z. Together with L ->po X and Z ->po S, this
1817 requires that every instruction po-before the lock-release must
1818 execute before any instruction po-after the lock-acquire. This would
1876 stores W and W' occur po-before the lock-release and po-after the
2060 cumul-fence memory barriers force stores that are po-before
2062 po-after the barrier.
2068 strong-fence memory barriers force stores that are po-before
2071 po-after the barrier can execute.
2141 corresponding to the first group of accesses will all end po-before
2186 access U, all those instructions will be po-before the fence.
2199 corresponding to the access V will be po-after the fence, and
2504 all po-earlier events against all po-later events, as smp_mb() does,
2507 smp_mb__before_atomic() orders all po-earlier events against
2508 po-later atomic updates and the events following them;
2510 smp_mb__after_atomic() orders po-earlier atomic updates and
2511 the events preceding them against all po-later events;
2513 smp_mb_after_spinlock() orders po-earlier lock acquisition
2514 events and the events preceding them against all po-later