78 	void __iomem *mmio;  member
90  * @mmio: base address offset
97 	void __iomem *mmio;  member
285 	reg = adata->mmio + XLNX_MM2S_OFFSET + XLNX_AUD_STS;  in xlnx_mm2s_irq_handler()
304 	reg = adata->mmio + XLNX_S2MM_OFFSET + XLNX_AUD_STS;  in xlnx_s2mm_irq_handler()
343 		stream_data->mmio = adata->mmio + XLNX_MM2S_OFFSET;  in xlnx_formatter_pcm_open()
352 		stream_data->mmio = adata->mmio + XLNX_S2MM_OFFSET;  in xlnx_formatter_pcm_open()
356 	val = readl(adata->mmio + XLNX_AUD_CORE_CONFIG);  in xlnx_formatter_pcm_open()
381 	val = readl(stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_open()
383 	writel(val, stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_open()
395 	ret = xlnx_formatter_pcm_reset(stream_data->mmio);  in xlnx_formatter_pcm_close()
400 	xlnx_formatter_disable_irqs(stream_data->mmio, substream->stream);  in xlnx_formatter_pcm_close()
415 	pos = readl(stream_data->mmio + XLNX_AUD_XFER_COUNT);  in xlnx_formatter_pcm_pointer()
439 		val = readl(stream_data->mmio + XLNX_AUD_STS);  in xlnx_formatter_pcm_hw_params()
441 			aes_reg1_val = readl(stream_data->mmio +  in xlnx_formatter_pcm_hw_params()
443 			aes_reg2_val = readl(stream_data->mmio +  in xlnx_formatter_pcm_hw_params()
457 	writel(low, stream_data->mmio + XLNX_AUD_BUFF_ADDR_LSB);  in xlnx_formatter_pcm_hw_params()
458 	writel(high, stream_data->mmio + XLNX_AUD_BUFF_ADDR_MSB);  in xlnx_formatter_pcm_hw_params()
460 	val = readl(stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_hw_params()
483 	writel(val, stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_hw_params()
487 	writel(val, stream_data->mmio + XLNX_AUD_PERIOD_CONFIG);  in xlnx_formatter_pcm_hw_params()
489 	writel(bytes_per_ch, stream_data->mmio + XLNX_BYTES_PER_CH);  in xlnx_formatter_pcm_hw_params()
506 		val = readl(stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_trigger()
508 		writel(val, stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_trigger()
513 		val = readl(stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_trigger()
515 		writel(val, stream_data->mmio + XLNX_AUD_CTRL);  in xlnx_formatter_pcm_trigger()
566 	aud_drv_data->mmio = devm_platform_ioremap_resource(pdev, 0);  in xlnx_formatter_pcm_probe()
567 	if (IS_ERR(aud_drv_data->mmio)) {  in xlnx_formatter_pcm_probe()
569 		ret = PTR_ERR(aud_drv_data->mmio);  in xlnx_formatter_pcm_probe()
573 	val = readl(aud_drv_data->mmio + XLNX_AUD_CORE_CONFIG);  in xlnx_formatter_pcm_probe()
576 		ret = xlnx_formatter_pcm_reset(aud_drv_data->mmio +  in xlnx_formatter_pcm_probe()
582 		xlnx_formatter_disable_irqs(aud_drv_data->mmio +  in xlnx_formatter_pcm_probe()
602 		ret = xlnx_formatter_pcm_reset(aud_drv_data->mmio +  in xlnx_formatter_pcm_probe()
608 		xlnx_formatter_disable_irqs(aud_drv_data->mmio +  in xlnx_formatter_pcm_probe()
650 		ret = xlnx_formatter_pcm_reset(adata->mmio + XLNX_S2MM_OFFSET);  in xlnx_formatter_pcm_remove()
654 		ret = xlnx_formatter_pcm_reset(adata->mmio + XLNX_MM2S_OFFSET);  in xlnx_formatter_pcm_remove()