Lines Matching refs:mcasp_set_bits

128 static inline void mcasp_set_bits(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_set_bits()  function
164 mcasp_set_bits(mcasp, ctl_reg, val); in mcasp_set_ctl_reg()
191 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit)); in mcasp_set_clk_pdir()
203 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit)); in mcasp_set_axr_pdir()
215 mcasp_set_bits(mcasp, reg, FIFO_ENABLE); in mcasp_start_rx()
243 mcasp_set_bits(mcasp, DAVINCI_MCASP_EVTCTLR_REG, in mcasp_start_rx()
255 mcasp_set_bits(mcasp, reg, FIFO_ENABLE); in mcasp_start_tx()
281 mcasp_set_bits(mcasp, DAVINCI_MCASP_EVTCTLX_REG, in mcasp_start_tx()
465 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); in davinci_mcasp_set_dai_fmt()
466 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); in davinci_mcasp_set_dai_fmt()
475 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); in davinci_mcasp_set_dai_fmt()
476 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); in davinci_mcasp_set_dai_fmt()
493 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); in davinci_mcasp_set_dai_fmt()
494 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); in davinci_mcasp_set_dai_fmt()
496 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); in davinci_mcasp_set_dai_fmt()
497 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); in davinci_mcasp_set_dai_fmt()
510 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); in davinci_mcasp_set_dai_fmt()
513 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); in davinci_mcasp_set_dai_fmt()
528 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); in davinci_mcasp_set_dai_fmt()
531 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); in davinci_mcasp_set_dai_fmt()
571 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); in davinci_mcasp_set_dai_fmt()
572 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); in davinci_mcasp_set_dai_fmt()
581 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); in davinci_mcasp_set_dai_fmt()
582 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); in davinci_mcasp_set_dai_fmt()
597 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); in davinci_mcasp_set_dai_fmt()
598 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); in davinci_mcasp_set_dai_fmt()
679 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, in davinci_mcasp_set_sysclk()
681 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, in davinci_mcasp_set_sysclk()
691 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); in davinci_mcasp_set_sysclk()
692 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); in davinci_mcasp_set_sysclk()
848 mcasp_set_bits(mcasp, DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); in mcasp_common_hw_param()
865 mcasp_set_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), in mcasp_common_hw_param()
1006 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, busel | TXORD); in mcasp_i2s_hw_param()
1011 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD); in mcasp_i2s_hw_param()
1036 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(6) | TXSSZ(15)); in mcasp_dit_hw_param()
1045 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE | TX_ASYNC); in mcasp_dit_hw_param()
1050 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); in mcasp_dit_hw_param()
1053 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN); in mcasp_dit_hw_param()
2008 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset)); in davinci_mcasp_gpio_direction_out()
2015 mcasp_set_bits(mcasp, DAVINCI_MCASP_PFUNC_REG, BIT(offset)); in davinci_mcasp_gpio_direction_out()
2018 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset)); in davinci_mcasp_gpio_direction_out()
2030 mcasp_set_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset)); in davinci_mcasp_gpio_set()
2047 mcasp_set_bits(mcasp, DAVINCI_MCASP_PFUNC_REG, BIT(offset)); in davinci_mcasp_gpio_direction_in()