1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
12 #include <sound/soc-dai.h>
55 	struct clk *refclk;  member
80 	regmap_read(priv->map, SPDIFIN_STAT0, &stat);  in axg_spdifin_get_rate()
90 		rate = priv->conf->mode_rates[mode];  in axg_spdifin_get_rate()
101 	regmap_update_bits(priv->map, SPDIFIN_CTRL0,  in axg_spdifin_prepare()
107 	regmap_update_bits(priv->map, SPDIFIN_CTRL0,  in axg_spdifin_prepare()
109 	regmap_update_bits(priv->map, SPDIFIN_CTRL0,  in axg_spdifin_prepare()
121 	ret = clk_prepare_enable(priv->refclk);  in axg_spdifin_startup()
123 		dev_err(dai->dev,  in axg_spdifin_startup()
128 	regmap_update_bits(priv->map, SPDIFIN_CTRL0, SPDIFIN_CTRL0_EN,  in axg_spdifin_startup()
139 	regmap_update_bits(priv->map, SPDIFIN_CTRL0, SPDIFIN_CTRL0_EN, 0);  in axg_spdifin_shutdown()
140 	clk_disable_unprepare(priv->refclk);  in axg_spdifin_shutdown()
155 	shift = width * (num_per_reg - 1 - rem);  in axg_spdifin_write_mode_param()
157 	regmap_update_bits(map, reg, GENMASK(width - 1, 0) << shift,  in axg_spdifin_write_mode_param()
183 	return rate / (128 * priv->conf->mode_rates[mode]);  in axg_spdifin_mode_timer()
190 	int ret, i = SPDIFIN_MODE_NUM - 1;  in axg_spdifin_sample_mode_config()
193 	ret = clk_set_rate(priv->refclk, priv->conf->ref_rate);  in axg_spdifin_sample_mode_config()
195 		dev_err(dai->dev, "reference clock rate set failed\n");  in axg_spdifin_sample_mode_config()
203 	rate = clk_get_rate(priv->refclk);  in axg_spdifin_sample_mode_config()
206 	regmap_update_bits(priv->map, SPDIFIN_CTRL1,  in axg_spdifin_sample_mode_config()
211 	regmap_update_bits(priv->map, SPDIFIN_CTRL0,  in axg_spdifin_sample_mode_config()
216 	axg_spdifin_write_timer(priv->map, i, t_next);  in axg_spdifin_sample_mode_config()
221 		i -= 1;  in axg_spdifin_sample_mode_config()
227 		axg_spdifin_write_timer(priv->map, i, t);  in axg_spdifin_sample_mode_config()
230 		axg_spdifin_write_threshold(priv->map, i, t + t_next);  in axg_spdifin_sample_mode_config()
245 	ret = clk_prepare_enable(priv->pclk);  in axg_spdifin_dai_probe()
247 		dev_err(dai->dev, "failed to enable pclk\n");  in axg_spdifin_dai_probe()
253 		dev_err(dai->dev, "mode configuration failed\n");  in axg_spdifin_dai_probe()
254 		clk_disable_unprepare(priv->pclk);  in axg_spdifin_dai_probe()
265 	clk_disable_unprepare(priv->pclk);  in axg_spdifin_dai_remove()
278 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;  in axg_spdifin_iec958_info()
279 	uinfo->count = 1;  in axg_spdifin_iec958_info()
290 		ucontrol->value.iec958.status[i] = 0xff;  in axg_spdifin_get_status_mask()
305 		regmap_update_bits(priv->map, SPDIFIN_CTRL0,  in axg_spdifin_get_status()
309 		regmap_read(priv->map, SPDIFIN_STAT1, &val);  in axg_spdifin_get_status()
314 			ucontrol->value.iec958.status[offset] =  in axg_spdifin_get_status()
352 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;  in axg_spdifin_rate_lock_info()
353 	uinfo->count = 1;  in axg_spdifin_rate_lock_info()
354 	uinfo->value.integer.min = 0;  in axg_spdifin_rate_lock_info()
355 	uinfo->value.integer.max = 192000;  in axg_spdifin_rate_lock_info()
366 	ucontrol->value.integer.value[0] = axg_spdifin_get_rate(priv);  in axg_spdifin_rate_lock_get()
413 		.compatible = "amlogic,axg-spdifin",
427 		return ERR_PTR(-ENOMEM);  in axg_spdifin_get_dai_drv()
429 	drv->name = "SPDIF Input";  in axg_spdifin_get_dai_drv()
430 	drv->ops = &axg_spdifin_ops;  in axg_spdifin_get_dai_drv()
431 	drv->probe = axg_spdifin_dai_probe;  in axg_spdifin_get_dai_drv()
432 	drv->remove = axg_spdifin_dai_remove;  in axg_spdifin_get_dai_drv()
433 	drv->capture.stream_name = "Capture";  in axg_spdifin_get_dai_drv()
434 	drv->capture.channels_min = 1;  in axg_spdifin_get_dai_drv()
435 	drv->capture.channels_max = 2;  in axg_spdifin_get_dai_drv()
436 	drv->capture.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;  in axg_spdifin_get_dai_drv()
440 			snd_pcm_rate_to_rate_bit(priv->conf->mode_rates[i]);  in axg_spdifin_get_dai_drv()
443 			return ERR_PTR(-EINVAL);  in axg_spdifin_get_dai_drv()
445 		drv->capture.rates |= rb;  in axg_spdifin_get_dai_drv()
453 	struct device *dev = &pdev->dev;  in axg_spdifin_probe()
461 		return -ENOMEM;  in axg_spdifin_probe()
464 	priv->conf = of_device_get_match_data(dev);  in axg_spdifin_probe()
465 	if (!priv->conf) {  in axg_spdifin_probe()
467 		return -ENODEV;  in axg_spdifin_probe()
474 	priv->map = devm_regmap_init_mmio(dev, regs, &axg_spdifin_regmap_cfg);  in axg_spdifin_probe()
475 	if (IS_ERR(priv->map)) {  in axg_spdifin_probe()
477 			PTR_ERR(priv->map));  in axg_spdifin_probe()
478 		return PTR_ERR(priv->map);  in axg_spdifin_probe()
481 	priv->pclk = devm_clk_get(dev, "pclk");  in axg_spdifin_probe()
482 	if (IS_ERR(priv->pclk)) {  in axg_spdifin_probe()
483 		ret = PTR_ERR(priv->pclk);  in axg_spdifin_probe()
484 		if (ret != -EPROBE_DEFER)  in axg_spdifin_probe()
489 	priv->refclk = devm_clk_get(dev, "refclk");  in axg_spdifin_probe()
490 	if (IS_ERR(priv->refclk)) {  in axg_spdifin_probe()
491 		ret = PTR_ERR(priv->refclk);  in axg_spdifin_probe()
492 		if (ret != -EPROBE_DEFER)  in axg_spdifin_probe()
511 		.name = "axg-spdifin",