25 #include "../common/sst-ipc.h"
233 		ret = skl_ipc_set_dx(&cnl->ipc, CNL_INSTANCE_ID,  in cnl_set_dsp_D0()
260 	ret = skl_ipc_set_dx(&cnl->ipc, CNL_INSTANCE_ID,  in cnl_set_dsp_D3()
315 	struct sst_generic_ipc *ipc = &cnl->ipc;  in cnl_dsp_irq_thread_handler()  local
320 	/* here we handle ipc interrupts only */  in cnl_dsp_irq_thread_handler()
348 		dev_dbg(dsp->dev, "IPC irq: Firmware respond primary:%x",  in cnl_dsp_irq_thread_handler()
350 		dev_dbg(dsp->dev, "IPC irq: Firmware respond extension:%x",  in cnl_dsp_irq_thread_handler()
355 			skl_ipc_process_reply(ipc, header);  in cnl_dsp_irq_thread_handler()
357 			dev_dbg(dsp->dev, "IPC irq: Notification from firmware\n");  in cnl_dsp_irq_thread_handler()
358 			skl_ipc_process_notification(ipc, header);  in cnl_dsp_irq_thread_handler()
376 	schedule_work(&ipc->kwork);  in cnl_dsp_irq_thread_handler()
386 static void cnl_ipc_tx_msg(struct sst_generic_ipc *ipc, struct ipc_message *msg)  in cnl_ipc_tx_msg()  argument
391 		sst_dsp_outbox_write(ipc->dsp, msg->tx.data, msg->tx.size);  in cnl_ipc_tx_msg()
392 	sst_dsp_shim_write_unlocked(ipc->dsp, CNL_ADSP_REG_HIPCIDD,  in cnl_ipc_tx_msg()
394 	sst_dsp_shim_write_unlocked(ipc->dsp, CNL_ADSP_REG_HIPCIDR,  in cnl_ipc_tx_msg()
409 	struct sst_generic_ipc *ipc;  in cnl_ipc_init()  local
412 	ipc = &cnl->ipc;  in cnl_ipc_init()
413 	ipc->dsp = cnl->dsp;  in cnl_ipc_init()
414 	ipc->dev = dev;  in cnl_ipc_init()
416 	ipc->tx_data_max_size = CNL_ADSP_W1_SZ;  in cnl_ipc_init()
417 	ipc->rx_data_max_size = CNL_ADSP_W0_UP_SZ;  in cnl_ipc_init()
419 	err = sst_ipc_init(ipc);  in cnl_ipc_init()
425 	 * ipc registers are different for cnl  in cnl_ipc_init()
427 	ipc->ops.tx_msg = cnl_ipc_tx_msg;  in cnl_ipc_init()
428 	ipc->ops.tx_data_copy = skl_ipc_tx_data_copy;  in cnl_ipc_init()
429 	ipc->ops.is_dsp_busy = cnl_ipc_is_dsp_busy;  in cnl_ipc_init()
500 	cnl_ipc_free(&skl->ipc);  in cnl_sst_dsp_cleanup()
507 MODULE_DESCRIPTION("Intel Cannonlake IPC driver");