Lines Matching +full:stream +full:- +full:match +full:- +full:mask
1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
52 #include "imx-pcm.h"
54 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
65 * (bit-endianness must match byte-endianness). Processors typically write
67 * written in. So if the host CPU is big-endian, then only big-endian
90 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
91 * - Also have NB_NF to mark these two clocks will not be inverted
200 bool imx21regs; /* imx21-class SSI - no SACC{ST,EN,DIS} regs */
206 * struct fsl_ssi - per-SSI private data
211 * @streams: Mask of current active streams: BIT(TX) and BIT(RX)
214 * @synchronous: Use synchronous mode - both of TX and RX use STCK and SFCK
215 * @use_dma: DMA is used or FIQ with stream filter
223 * @baudclk: Clock source to generate bit and frame-sync clocks
230 * @fiq_params: FIQ stream filtering parameters
239 * @dev: Pointer to &pdev->dev
297 * cannot be changed after SSI starts running -- a software reset
339 { .compatible = "fsl,mpc8610-ssi", .data = &fsl_ssi_mpc8610 },
340 { .compatible = "fsl,imx51-ssi", .data = &fsl_ssi_imx51 },
341 { .compatible = "fsl,imx35-ssi", .data = &fsl_ssi_imx35 },
342 { .compatible = "fsl,imx21-ssi", .data = &fsl_ssi_imx21 },
349 return (ssi->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) == in fsl_ssi_is_ac97()
355 return (ssi->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) == in fsl_ssi_is_i2s_master()
361 return (ssi->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) == in fsl_ssi_is_i2s_cbm_cfs()
366 * fsl_ssi_irq - Interrupt handler to gather states
373 struct regmap *regs = ssi->regs; in fsl_ssi_isr()
378 sisr2 = sisr & ssi->soc->sisr_write_mask; in fsl_ssi_isr()
383 fsl_ssi_dbg_isr(&ssi->dbg_stats, sisr); in fsl_ssi_isr()
389 * fsl_ssi_config_enable - Set SCR, SIER, STCR and SRCR registers with
396 * when 1st stream starts, even if the opposite stream will not start
401 struct fsl_ssi_regvals *vals = ssi->regvals; in fsl_ssi_config_enable()
406 regmap_update_bits(ssi->regs, REG_SSI_SOR, in fsl_ssi_config_enable()
411 * the previous stream started. So skip all SxCR and SIER settings in fsl_ssi_config_enable()
414 if (ssi->soc->offline_config && ssi->streams) in fsl_ssi_config_enable()
417 if (ssi->soc->offline_config) { in fsl_ssi_config_enable()
426 /* Otherwise, only set bits for the current stream */ in fsl_ssi_config_enable()
433 regmap_update_bits(ssi->regs, REG_SSI_SRCR, srcr, srcr); in fsl_ssi_config_enable()
434 regmap_update_bits(ssi->regs, REG_SSI_STCR, stcr, stcr); in fsl_ssi_config_enable()
435 regmap_update_bits(ssi->regs, REG_SSI_SIER, sier, sier); in fsl_ssi_config_enable()
444 if (ssi->use_dma && tx) { in fsl_ssi_config_enable()
449 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_config_enable()
452 /* Busy wait until TX FIFO not empty -- DMA working */ in fsl_ssi_config_enable()
454 regmap_read(ssi->regs, REG_SSI_SFCSR, &sfcsr); in fsl_ssi_config_enable()
457 } while (--try); in fsl_ssi_config_enable()
459 /* FIFO still empty -- something might be wrong */ in fsl_ssi_config_enable()
461 dev_warn(ssi->dev, "Timeout waiting TX FIFO filling\n"); in fsl_ssi_config_enable()
464 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_config_enable()
467 /* Log the enabled stream to the mask */ in fsl_ssi_config_enable()
468 ssi->streams |= BIT(dir); in fsl_ssi_config_enable()
472 * Exclude bits that are used by the opposite stream
474 * When both streams are active, disabling some bits for the current stream
475 * might break the other stream if these bits are used by it.
477 * @vals : regvals of the current stream
478 * @avals: regvals of the opposite stream
479 * @aactive: active state of the opposite stream
481 * 1) XOR vals and avals to get the differences if the other stream is active;
482 * Otherwise, return current vals if the other stream is not active
492 * fsl_ssi_config_disable - Unset SCR, SIER, STCR and SRCR registers
499 * bits of both streams at once when the last stream is abort to end
510 /* Check if the opposite stream is active */ in fsl_ssi_config_disable()
511 aactive = ssi->streams & BIT(adir); in fsl_ssi_config_disable()
513 vals = &ssi->regvals[dir]; in fsl_ssi_config_disable()
515 /* Get regvals of the opposite stream to keep opposite stream safe */ in fsl_ssi_config_disable()
516 avals = &ssi->regvals[adir]; in fsl_ssi_config_disable()
519 * To keep the other stream safe, exclude shared bits between in fsl_ssi_config_disable()
520 * both streams, and get safe bits to disable current stream in fsl_ssi_config_disable()
522 scr = ssi_excl_shared_bits(vals->scr, avals->scr, aactive); in fsl_ssi_config_disable()
524 /* Disable safe bits of SCR register for the current stream */ in fsl_ssi_config_disable()
525 regmap_update_bits(ssi->regs, REG_SSI_SCR, scr, 0); in fsl_ssi_config_disable()
527 /* Log the disabled stream to the mask */ in fsl_ssi_config_disable()
528 ssi->streams &= ~BIT(dir); in fsl_ssi_config_disable()
531 * On offline_config SoCs, if the other stream is active, skip in fsl_ssi_config_disable()
534 if (ssi->soc->offline_config && aactive) in fsl_ssi_config_disable()
537 if (ssi->soc->offline_config) { in fsl_ssi_config_disable()
538 /* Now there is only current stream active, disable all bits */ in fsl_ssi_config_disable()
539 srcr = vals->srcr | avals->srcr; in fsl_ssi_config_disable()
540 stcr = vals->stcr | avals->stcr; in fsl_ssi_config_disable()
541 sier = vals->sier | avals->sier; in fsl_ssi_config_disable()
544 * To keep the other stream safe, exclude shared bits between in fsl_ssi_config_disable()
545 * both streams, and get safe bits to disable current stream in fsl_ssi_config_disable()
547 sier = ssi_excl_shared_bits(vals->sier, avals->sier, aactive); in fsl_ssi_config_disable()
548 srcr = ssi_excl_shared_bits(vals->srcr, avals->srcr, aactive); in fsl_ssi_config_disable()
549 stcr = ssi_excl_shared_bits(vals->stcr, avals->stcr, aactive); in fsl_ssi_config_disable()
553 regmap_update_bits(ssi->regs, REG_SSI_SRCR, srcr, 0); in fsl_ssi_config_disable()
554 regmap_update_bits(ssi->regs, REG_SSI_STCR, stcr, 0); in fsl_ssi_config_disable()
555 regmap_update_bits(ssi->regs, REG_SSI_SIER, sier, 0); in fsl_ssi_config_disable()
559 regmap_update_bits(ssi->regs, REG_SSI_SOR, in fsl_ssi_config_disable()
565 struct regmap *regs = ssi->regs; in fsl_ssi_tx_ac97_saccst_setup()
567 /* no SACC{ST,EN,DIS} regs on imx21-class SSI */ in fsl_ssi_tx_ac97_saccst_setup()
568 if (!ssi->soc->imx21regs) { in fsl_ssi_tx_ac97_saccst_setup()
571 /* Enable slots 3 & 4 -- PCM Playback Left & Right channels */ in fsl_ssi_tx_ac97_saccst_setup()
577 * fsl_ssi_setup_regvals - Cache critical bits of SIER, SRCR, STCR and
583 struct fsl_ssi_regvals *vals = ssi->regvals; in fsl_ssi_setup_regvals()
596 if (ssi->use_dual_fifo) { in fsl_ssi_setup_regvals()
601 if (ssi->use_dma) { in fsl_ssi_setup_regvals()
612 struct regmap *regs = ssi->regs; in fsl_ssi_setup_ac97()
621 /* AC97 has to communicate with codec before starting a stream */ in fsl_ssi_setup_ac97()
636 ret = clk_prepare_enable(ssi->clk); in fsl_ssi_startup()
646 if (ssi->use_dual_fifo) in fsl_ssi_startup()
647 snd_pcm_hw_constraint_step(substream->runtime, 0, in fsl_ssi_startup()
659 clk_disable_unprepare(ssi->clk); in fsl_ssi_shutdown()
663 * fsl_ssi_set_bclk - Configure Digital Audio Interface bit clock
672 * (In 2-channel I2S Master mode, slot_width is fixed 32)
678 bool tx2, tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in fsl_ssi_set_bclk()
680 struct regmap *regs = ssi->regs; in fsl_ssi_set_bclk()
681 u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i; in fsl_ssi_set_bclk() local
692 if (ssi->slots) in fsl_ssi_set_bclk()
693 slots = ssi->slots; in fsl_ssi_set_bclk()
694 if (ssi->slot_width) in fsl_ssi_set_bclk()
695 slot_width = ssi->slot_width; in fsl_ssi_set_bclk()
699 (ssi->i2s_net & SSI_SCR_I2S_MODE_MASK) == SSI_SCR_I2S_MODE_MASTER) in fsl_ssi_set_bclk()
705 /* Don't apply it to any non-baudclk circumstance */ in fsl_ssi_set_bclk()
706 if (IS_ERR(ssi->baudclk)) in fsl_ssi_set_bclk()
707 return -EINVAL; in fsl_ssi_set_bclk()
713 if (freq * 5 > clk_get_rate(ssi->clk)) { in fsl_ssi_set_bclk()
714 dev_err(dai->dev, "bitclk > ipgclk / 5\n"); in fsl_ssi_set_bclk()
715 return -EINVAL; in fsl_ssi_set_bclk()
718 baudclk_is_used = ssi->baudclk_streams & ~(BIT(substream->stream)); in fsl_ssi_set_bclk()
730 clkrate = clk_get_rate(ssi->baudclk); in fsl_ssi_set_bclk()
732 clkrate = clk_round_rate(ssi->baudclk, tmprate); in fsl_ssi_set_bclk()
740 sub = freq - afreq; in fsl_ssi_set_bclk()
742 sub = afreq - freq; in fsl_ssi_set_bclk()
763 dev_err(dai->dev, "failed to handle the required sysclk\n"); in fsl_ssi_set_bclk()
764 return -EINVAL; in fsl_ssi_set_bclk()
769 mask = SSI_SxCCR_PM_MASK | SSI_SxCCR_DIV2 | SSI_SxCCR_PSR; in fsl_ssi_set_bclk()
772 tx2 = tx || ssi->synchronous; in fsl_ssi_set_bclk()
773 regmap_update_bits(regs, REG_SSI_SxCCR(tx2), mask, stccr); in fsl_ssi_set_bclk()
776 ret = clk_set_rate(ssi->baudclk, baudrate); in fsl_ssi_set_bclk()
778 dev_err(dai->dev, "failed to set baudclk rate\n"); in fsl_ssi_set_bclk()
779 return -EINVAL; in fsl_ssi_set_bclk()
787 * fsl_ssi_hw_params - Configure SSI based on PCM hardware parameters
796 * safe to re-configure them when both two streams start running.
804 bool tx2, tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in fsl_ssi_hw_params()
806 struct regmap *regs = ssi->regs; in fsl_ssi_hw_params()
818 if (!(ssi->baudclk_streams & BIT(substream->stream))) { in fsl_ssi_hw_params()
819 ret = clk_prepare_enable(ssi->baudclk); in fsl_ssi_hw_params()
823 ssi->baudclk_streams |= BIT(substream->stream); in fsl_ssi_hw_params()
833 if (ssi->streams && ssi->synchronous) in fsl_ssi_hw_params()
838 * Keep the ssi->i2s_net intact while having a local variable in fsl_ssi_hw_params()
840 * ssi->i2s_net will lose the settings for regular use cases. in fsl_ssi_hw_params()
842 u8 i2s_net = ssi->i2s_net; in fsl_ssi_hw_params()
844 /* Normal + Network mode to send 16-bit data in 32-bit frames */ in fsl_ssi_hw_params()
857 tx2 = tx || ssi->synchronous; in fsl_ssi_hw_params()
870 ssi->baudclk_streams & BIT(substream->stream)) { in fsl_ssi_hw_free()
871 clk_disable_unprepare(ssi->baudclk); in fsl_ssi_hw_free()
872 ssi->baudclk_streams &= ~BIT(substream->stream); in fsl_ssi_hw_free()
880 u32 strcr = 0, scr = 0, stcr, srcr, mask; in _fsl_ssi_set_dai_fmt() local
882 ssi->dai_fmt = fmt; in _fsl_ssi_set_dai_fmt()
891 ssi->i2s_net = SSI_SCR_NET; in _fsl_ssi_set_dai_fmt()
896 if (IS_ERR(ssi->baudclk)) { in _fsl_ssi_set_dai_fmt()
897 dev_err(ssi->dev, in _fsl_ssi_set_dai_fmt()
899 return -EINVAL; in _fsl_ssi_set_dai_fmt()
903 ssi->i2s_net |= SSI_SCR_I2S_MODE_MASTER; in _fsl_ssi_set_dai_fmt()
906 ssi->i2s_net |= SSI_SCR_I2S_MODE_SLAVE; in _fsl_ssi_set_dai_fmt()
909 return -EINVAL; in _fsl_ssi_set_dai_fmt()
912 regmap_update_bits(ssi->regs, REG_SSI_STCCR, in _fsl_ssi_set_dai_fmt()
914 regmap_update_bits(ssi->regs, REG_SSI_SRCCR, in _fsl_ssi_set_dai_fmt()
937 return -EINVAL; in _fsl_ssi_set_dai_fmt()
940 scr |= ssi->i2s_net; in _fsl_ssi_set_dai_fmt()
961 return -EINVAL; in _fsl_ssi_set_dai_fmt()
979 return -EINVAL; in _fsl_ssi_set_dai_fmt()
986 if (ssi->synchronous || fsl_ssi_is_ac97(ssi)) { in _fsl_ssi_set_dai_fmt()
991 mask = SSI_STCR_TFDIR | SSI_STCR_TXDIR | SSI_STCR_TSCKP | in _fsl_ssi_set_dai_fmt()
994 regmap_update_bits(ssi->regs, REG_SSI_STCR, mask, stcr); in _fsl_ssi_set_dai_fmt()
995 regmap_update_bits(ssi->regs, REG_SSI_SRCR, mask, srcr); in _fsl_ssi_set_dai_fmt()
997 mask = SSI_SCR_SYNC_TX_FS | SSI_SCR_I2S_MODE_MASK | in _fsl_ssi_set_dai_fmt()
999 regmap_update_bits(ssi->regs, REG_SSI_SCR, mask, scr); in _fsl_ssi_set_dai_fmt()
1005 * fsl_ssi_set_dai_fmt - Configure Digital Audio Interface (DAI) Format
1007 * @fmt: format mask
1021 * fsl_ssi_set_dai_tdm_slot - Set TDM slot number and slot width
1023 * @tx_mask: mask for TX
1024 * @rx_mask: mask for RX
1032 struct regmap *regs = ssi->regs; in fsl_ssi_set_dai_tdm_slot()
1037 dev_err(dai->dev, "invalid slot width: %d\n", slot_width); in fsl_ssi_set_dai_tdm_slot()
1038 return -EINVAL; in fsl_ssi_set_dai_tdm_slot()
1042 if (ssi->i2s_net && slots < 2) { in fsl_ssi_set_dai_tdm_slot()
1043 dev_err(dai->dev, "slot number should be >= 2 in I2S or NET\n"); in fsl_ssi_set_dai_tdm_slot()
1044 return -EINVAL; in fsl_ssi_set_dai_tdm_slot()
1063 ssi->slot_width = slot_width; in fsl_ssi_set_dai_tdm_slot()
1064 ssi->slots = slots; in fsl_ssi_set_dai_tdm_slot()
1070 * fsl_ssi_trigger - Start or stop SSI and corresponding DMA transaction.
1083 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in fsl_ssi_trigger()
1108 return -EINVAL; in fsl_ssi_trigger()
1118 if (ssi->soc->imx && ssi->use_dma) in fsl_ssi_dai_probe()
1119 snd_soc_dai_init_dma_data(dai, &ssi->dma_params_tx, in fsl_ssi_dai_probe()
1120 &ssi->dma_params_rx); in fsl_ssi_dai_probe()
1138 .stream_name = "CPU-Playback",
1145 .stream_name = "CPU-Capture",
1155 .name = "fsl-ssi",
1173 /* 16-bit capture is broken (errata ERR003778) */
1184 struct regmap *regs = fsl_ac97_data->regs; in fsl_ssi_ac97_write()
1192 mutex_lock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_write()
1194 ret = clk_prepare_enable(fsl_ac97_data->clk); in fsl_ssi_ac97_write()
1211 clk_disable_unprepare(fsl_ac97_data->clk); in fsl_ssi_ac97_write()
1214 mutex_unlock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_write()
1220 struct regmap *regs = fsl_ac97_data->regs; in fsl_ssi_ac97_read()
1226 mutex_lock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_read()
1228 ret = clk_prepare_enable(fsl_ac97_data->clk); in fsl_ssi_ac97_read()
1244 clk_disable_unprepare(fsl_ac97_data->clk); in fsl_ssi_ac97_read()
1247 mutex_unlock(&fsl_ac97_data->ac97_reg_lock); in fsl_ssi_ac97_read()
1257 * fsl_ssi_hw_init - Initialize SSI registers
1262 u32 wm = ssi->fifo_watermark; in fsl_ssi_hw_init()
1268 regmap_write(ssi->regs, REG_SSI_SFCSR, in fsl_ssi_hw_init()
1273 if (ssi->use_dual_fifo) in fsl_ssi_hw_init()
1274 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_hw_init()
1279 _fsl_ssi_set_dai_fmt(ssi, ssi->dai_fmt); in fsl_ssi_hw_init()
1287 * fsl_ssi_hw_clean - Clear SSI registers
1295 regmap_update_bits(ssi->regs, REG_SSI_SCR, in fsl_ssi_hw_clean()
1298 regmap_write(ssi->regs, REG_SSI_SACNT, 0); in fsl_ssi_hw_clean()
1300 regmap_write(ssi->regs, REG_SSI_SOR, 0); in fsl_ssi_hw_clean()
1301 /* Disable SSI -- software reset */ in fsl_ssi_hw_clean()
1302 regmap_update_bits(ssi->regs, REG_SSI_SCR, SSI_SCR_SSIEN, 0); in fsl_ssi_hw_clean()
1307 * Make every character in a string lower-case
1320 struct device *dev = &pdev->dev; in fsl_ssi_imx_probe()
1324 if (ssi->has_ipg_clk_name) in fsl_ssi_imx_probe()
1325 ssi->clk = devm_clk_get(dev, "ipg"); in fsl_ssi_imx_probe()
1327 ssi->clk = devm_clk_get(dev, NULL); in fsl_ssi_imx_probe()
1328 if (IS_ERR(ssi->clk)) { in fsl_ssi_imx_probe()
1329 ret = PTR_ERR(ssi->clk); in fsl_ssi_imx_probe()
1335 if (!ssi->has_ipg_clk_name) { in fsl_ssi_imx_probe()
1336 ret = clk_prepare_enable(ssi->clk); in fsl_ssi_imx_probe()
1344 ssi->baudclk = devm_clk_get(dev, "baud"); in fsl_ssi_imx_probe()
1345 if (IS_ERR(ssi->baudclk)) in fsl_ssi_imx_probe()
1347 PTR_ERR(ssi->baudclk)); in fsl_ssi_imx_probe()
1349 ssi->dma_params_tx.maxburst = ssi->dma_maxburst; in fsl_ssi_imx_probe()
1350 ssi->dma_params_rx.maxburst = ssi->dma_maxburst; in fsl_ssi_imx_probe()
1351 ssi->dma_params_tx.addr = ssi->ssi_phys + REG_SSI_STX0; in fsl_ssi_imx_probe()
1352 ssi->dma_params_rx.addr = ssi->ssi_phys + REG_SSI_SRX0; in fsl_ssi_imx_probe()
1355 if (ssi->use_dual_fifo) { in fsl_ssi_imx_probe()
1356 ssi->dma_params_tx.maxburst &= ~0x1; in fsl_ssi_imx_probe()
1357 ssi->dma_params_rx.maxburst &= ~0x1; in fsl_ssi_imx_probe()
1360 if (!ssi->use_dma) { in fsl_ssi_imx_probe()
1362 * Some boards use an incompatible codec. Use imx-fiq-pcm-audio in fsl_ssi_imx_probe()
1365 ssi->fiq_params.irq = ssi->irq; in fsl_ssi_imx_probe()
1366 ssi->fiq_params.base = iomem; in fsl_ssi_imx_probe()
1367 ssi->fiq_params.dma_params_rx = &ssi->dma_params_rx; in fsl_ssi_imx_probe()
1368 ssi->fiq_params.dma_params_tx = &ssi->dma_params_tx; in fsl_ssi_imx_probe()
1370 ret = imx_pcm_fiq_init(pdev, &ssi->fiq_params); in fsl_ssi_imx_probe()
1382 if (!ssi->has_ipg_clk_name) in fsl_ssi_imx_probe()
1383 clk_disable_unprepare(ssi->clk); in fsl_ssi_imx_probe()
1390 if (!ssi->use_dma) in fsl_ssi_imx_clean()
1392 if (!ssi->has_ipg_clk_name) in fsl_ssi_imx_clean()
1393 clk_disable_unprepare(ssi->clk); in fsl_ssi_imx_clean()
1398 struct device *dev = ssi->dev; in fsl_ssi_probe_from_dt()
1399 struct device_node *np = dev->of_node; in fsl_ssi_probe_from_dt()
1407 if (!of_id || !of_id->data) in fsl_ssi_probe_from_dt()
1408 return -EINVAL; in fsl_ssi_probe_from_dt()
1410 ssi->soc = of_id->data; in fsl_ssi_probe_from_dt()
1412 ret = of_property_match_string(np, "clock-names", "ipg"); in fsl_ssi_probe_from_dt()
1414 ssi->has_ipg_clk_name = ret >= 0; in fsl_ssi_probe_from_dt()
1418 if (sprop && !strcmp(sprop, "ac97-slave")) { in fsl_ssi_probe_from_dt()
1419 ssi->dai_fmt = FSLSSI_AC97_DAIFMT; in fsl_ssi_probe_from_dt()
1421 ret = of_property_read_u32(np, "cell-index", &ssi->card_idx); in fsl_ssi_probe_from_dt()
1424 return -EINVAL; in fsl_ssi_probe_from_dt()
1426 strcpy(ssi->card_name, "ac97-codec"); in fsl_ssi_probe_from_dt()
1427 } else if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) { in fsl_ssi_probe_from_dt()
1437 ssi->synchronous = true; in fsl_ssi_probe_from_dt()
1441 ssi->use_dma = !of_property_read_bool(np, "fsl,fiq-stream-filter"); in fsl_ssi_probe_from_dt()
1444 iprop = of_get_property(np, "fsl,fifo-depth", NULL); in fsl_ssi_probe_from_dt()
1446 ssi->fifo_depth = be32_to_cpup(iprop); in fsl_ssi_probe_from_dt()
1448 ssi->fifo_depth = 8; in fsl_ssi_probe_from_dt()
1452 if (ssi->use_dma && !ret && dmas[2] == IMX_DMATYPE_SSI_DUAL) in fsl_ssi_probe_from_dt()
1453 ssi->use_dual_fifo = true; in fsl_ssi_probe_from_dt()
1463 if (!ssi->card_name[0] && of_get_property(np, "codec-handle", NULL)) { in fsl_ssi_probe_from_dt()
1472 snprintf(ssi->card_name, sizeof(ssi->card_name), in fsl_ssi_probe_from_dt()
1473 "snd-soc-%s", sprop); in fsl_ssi_probe_from_dt()
1474 make_lowercase(ssi->card_name); in fsl_ssi_probe_from_dt()
1475 ssi->card_idx = 0; in fsl_ssi_probe_from_dt()
1484 struct device *dev = &pdev->dev; in fsl_ssi_probe()
1492 return -ENOMEM; in fsl_ssi_probe()
1494 ssi->dev = dev; in fsl_ssi_probe()
1502 memcpy(&ssi->cpu_dai_drv, &fsl_ssi_ac97_dai, in fsl_ssi_probe()
1506 memcpy(&ssi->cpu_dai_drv, &fsl_ssi_dai_template, in fsl_ssi_probe()
1509 ssi->cpu_dai_drv.name = dev_name(dev); in fsl_ssi_probe()
1515 ssi->ssi_phys = res->start; in fsl_ssi_probe()
1517 if (ssi->soc->imx21regs) { in fsl_ssi_probe()
1518 /* No SACC{ST,EN,DIS} regs in imx21-class SSI */ in fsl_ssi_probe()
1524 if (ssi->has_ipg_clk_name) in fsl_ssi_probe()
1525 ssi->regs = devm_regmap_init_mmio_clk(dev, "ipg", iomem, in fsl_ssi_probe()
1528 ssi->regs = devm_regmap_init_mmio(dev, iomem, ®config); in fsl_ssi_probe()
1529 if (IS_ERR(ssi->regs)) { in fsl_ssi_probe()
1531 return PTR_ERR(ssi->regs); in fsl_ssi_probe()
1534 ssi->irq = platform_get_irq(pdev, 0); in fsl_ssi_probe()
1535 if (ssi->irq < 0) in fsl_ssi_probe()
1536 return ssi->irq; in fsl_ssi_probe()
1539 if (ssi->synchronous && !fsl_ssi_is_ac97(ssi)) { in fsl_ssi_probe()
1540 ssi->cpu_dai_drv.symmetric_rates = 1; in fsl_ssi_probe()
1541 ssi->cpu_dai_drv.symmetric_channels = 1; in fsl_ssi_probe()
1542 ssi->cpu_dai_drv.symmetric_samplebits = 1; in fsl_ssi_probe()
1546 * Configure TX and RX DMA watermarks -- when to send a DMA request in fsl_ssi_probe()
1551 switch (ssi->fifo_depth) { in fsl_ssi_probe()
1554 * Set to 8 as a balanced configuration -- When TX FIFO has 8 in fsl_ssi_probe()
1561 ssi->fifo_watermark = 8; in fsl_ssi_probe()
1562 ssi->dma_maxburst = 8; in fsl_ssi_probe()
1567 ssi->fifo_watermark = ssi->fifo_depth - 2; in fsl_ssi_probe()
1568 ssi->dma_maxburst = ssi->fifo_depth - 2; in fsl_ssi_probe()
1574 if (ssi->soc->imx) { in fsl_ssi_probe()
1581 mutex_init(&ssi->ac97_reg_lock); in fsl_ssi_probe()
1590 &ssi->cpu_dai_drv, 1); in fsl_ssi_probe()
1596 if (ssi->use_dma) { in fsl_ssi_probe()
1597 ret = devm_request_irq(dev, ssi->irq, fsl_ssi_isr, 0, in fsl_ssi_probe()
1600 dev_err(dev, "failed to claim irq %u\n", ssi->irq); in fsl_ssi_probe()
1605 fsl_ssi_debugfs_create(&ssi->dbg_stats, dev); in fsl_ssi_probe()
1611 if (ssi->card_name[0]) { in fsl_ssi_probe()
1622 ssi->card_pdev = platform_device_register_data(parent, in fsl_ssi_probe()
1623 ssi->card_name, ssi->card_idx, NULL, 0); in fsl_ssi_probe()
1624 if (IS_ERR(ssi->card_pdev)) { in fsl_ssi_probe()
1625 ret = PTR_ERR(ssi->card_pdev); in fsl_ssi_probe()
1627 ssi->card_name, ret); in fsl_ssi_probe()
1635 fsl_ssi_debugfs_remove(&ssi->dbg_stats); in fsl_ssi_probe()
1641 mutex_destroy(&ssi->ac97_reg_lock); in fsl_ssi_probe()
1643 if (ssi->soc->imx) in fsl_ssi_probe()
1651 struct fsl_ssi *ssi = dev_get_drvdata(&pdev->dev); in fsl_ssi_remove()
1653 fsl_ssi_debugfs_remove(&ssi->dbg_stats); in fsl_ssi_remove()
1655 if (ssi->card_pdev) in fsl_ssi_remove()
1656 platform_device_unregister(ssi->card_pdev); in fsl_ssi_remove()
1661 if (ssi->soc->imx) in fsl_ssi_remove()
1666 mutex_destroy(&ssi->ac97_reg_lock); in fsl_ssi_remove()
1676 struct regmap *regs = ssi->regs; in fsl_ssi_suspend()
1678 regmap_read(regs, REG_SSI_SFCSR, &ssi->regcache_sfcsr); in fsl_ssi_suspend()
1679 regmap_read(regs, REG_SSI_SACNT, &ssi->regcache_sacnt); in fsl_ssi_suspend()
1690 struct regmap *regs = ssi->regs; in fsl_ssi_resume()
1697 ssi->regcache_sfcsr); in fsl_ssi_resume()
1698 regmap_write(regs, REG_SSI_SACNT, ssi->regcache_sacnt); in fsl_ssi_resume()
1710 .name = "fsl-ssi-dai",
1720 MODULE_ALIAS("platform:fsl-ssi-dai");