Lines Matching +full:digital +full:- +full:to +full:- +full:analog
1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
41 "ti,gpo-config-1",
42 "ti,gpo-config-2",
43 "ti,gpo-config-3",
44 "ti,gpo-config-4",
163 /* Digital Volume control. From -100 to 27 dB in 0.5 dB steps */
164 static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10050, 50, 0);
166 /* ADC gain. From 0 to 42 dB in 1 dB steps */
169 /* DRE Level. From -12 dB to -66 dB in 1 dB steps */
170 static DECLARE_TLV_DB_SCALE(dre_thresh_tlv, -6600, 100, 0);
171 /* DRE Max Gain. From 2 dB to 26 dB in 2 dB steps */
174 /* AGC Level. From -6 dB to -36 dB in 2 dB steps */
175 static DECLARE_TLV_DB_SCALE(agc_thresh_tlv, -3600, 200, 0);
176 /* AGC Max Gain. From 3 dB to 42 dB in 3 dB steps */
180 "Linear Phase", "Low Latency", "Ultra-low Latency"
227 /* Analog/Digital Selection */
228 static const char * const adcx140_mic_sel_text[] = {"Analog", "Line In", "Digital"};
229 static const char * const adcx140_analog_sel_text[] = {"Analog", "Line In"};
243 SOC_DAPM_ENUM("MIC1 Analog MUX", adcx140_mic1_analog_enum);
264 SOC_DAPM_ENUM("MIC2 Analog MUX", adcx140_mic2_analog_enum);
285 SOC_DAPM_ENUM("MIC3 Analog MUX", adcx140_mic3_analog_enum);
306 SOC_DAPM_ENUM("MIC4 Analog MUX", adcx140_mic4_analog_enum);
346 SOC_DAPM_SINGLE("Digital CH1 Switch", 0, 0, 0, 0),
347 SOC_DAPM_SINGLE("Digital CH2 Switch", 0, 0, 0, 0),
348 SOC_DAPM_SINGLE("Digital CH3 Switch", 0, 0, 0, 0),
349 SOC_DAPM_SINGLE("Digital CH4 Switch", 0, 0, 0, 0),
353 /* Analog Differential Inputs */
376 /* Input Selection to MIC_PGA */
386 /* Input Selection to MIC_PGA */
387 SND_SOC_DAPM_MUX("MIC1 Analog Mux", SND_SOC_NOPM, 0, 0,
389 SND_SOC_DAPM_MUX("MIC2 Analog Mux", SND_SOC_NOPM, 0, 0,
391 SND_SOC_DAPM_MUX("MIC3 Analog Mux", SND_SOC_NOPM, 0, 0,
393 SND_SOC_DAPM_MUX("MIC4 Analog Mux", SND_SOC_NOPM, 0, 0,
455 SND_SOC_DAPM_MUX("IN1 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
457 SND_SOC_DAPM_MUX("IN2 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
459 SND_SOC_DAPM_MUX("IN3 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
461 SND_SOC_DAPM_MUX("IN4 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
499 {"Decimation Filter", "Ultra-low Latency", "DRE_ENABLE"},
517 {"MIC_GAIN_CTL_CH1", NULL, "IN1 Analog Mic Resistor"},
518 {"MIC_GAIN_CTL_CH1", NULL, "IN1 Analog Mic Resistor"},
519 {"MIC_GAIN_CTL_CH2", NULL, "IN2 Analog Mic Resistor"},
520 {"MIC_GAIN_CTL_CH2", NULL, "IN2 Analog Mic Resistor"},
521 {"MIC_GAIN_CTL_CH3", NULL, "IN3 Analog Mic Resistor"},
522 {"MIC_GAIN_CTL_CH3", NULL, "IN3 Analog Mic Resistor"},
523 {"MIC_GAIN_CTL_CH4", NULL, "IN4 Analog Mic Resistor"},
524 {"MIC_GAIN_CTL_CH4", NULL, "IN4 Analog Mic Resistor"},
526 {"IN1 Analog Mic Resistor", "2.5 kOhm", "MIC1P Input Mux"},
527 {"IN1 Analog Mic Resistor", "10 kOhm", "MIC1P Input Mux"},
528 {"IN1 Analog Mic Resistor", "20 kOhm", "MIC1P Input Mux"},
530 {"IN1 Analog Mic Resistor", "2.5 kOhm", "MIC1M Input Mux"},
531 {"IN1 Analog Mic Resistor", "10 kOhm", "MIC1M Input Mux"},
532 {"IN1 Analog Mic Resistor", "20 kOhm", "MIC1M Input Mux"},
534 {"IN2 Analog Mic Resistor", "2.5 kOhm", "MIC2P Input Mux"},
535 {"IN2 Analog Mic Resistor", "10 kOhm", "MIC2P Input Mux"},
536 {"IN2 Analog Mic Resistor", "20 kOhm", "MIC2P Input Mux"},
538 {"IN2 Analog Mic Resistor", "2.5 kOhm", "MIC2M Input Mux"},
539 {"IN2 Analog Mic Resistor", "10 kOhm", "MIC2M Input Mux"},
540 {"IN2 Analog Mic Resistor", "20 kOhm", "MIC2M Input Mux"},
542 {"IN3 Analog Mic Resistor", "2.5 kOhm", "MIC3P Input Mux"},
543 {"IN3 Analog Mic Resistor", "10 kOhm", "MIC3P Input Mux"},
544 {"IN3 Analog Mic Resistor", "20 kOhm", "MIC3P Input Mux"},
546 {"IN3 Analog Mic Resistor", "2.5 kOhm", "MIC3M Input Mux"},
547 {"IN3 Analog Mic Resistor", "10 kOhm", "MIC3M Input Mux"},
548 {"IN3 Analog Mic Resistor", "20 kOhm", "MIC3M Input Mux"},
550 {"IN4 Analog Mic Resistor", "2.5 kOhm", "MIC4P Input Mux"},
551 {"IN4 Analog Mic Resistor", "10 kOhm", "MIC4P Input Mux"},
552 {"IN4 Analog Mic Resistor", "20 kOhm", "MIC4P Input Mux"},
554 {"IN4 Analog Mic Resistor", "2.5 kOhm", "MIC4M Input Mux"},
555 {"IN4 Analog Mic Resistor", "10 kOhm", "MIC4M Input Mux"},
556 {"IN4 Analog Mic Resistor", "20 kOhm", "MIC4M Input Mux"},
572 {"MIC1 Analog Mux", "Line In", "MIC1P"},
573 {"MIC2 Analog Mux", "Line In", "MIC2P"},
574 {"MIC3 Analog Mux", "Line In", "MIC3P"},
575 {"MIC4 Analog Mux", "Line In", "MIC4P"},
577 {"MIC1P Input Mux", "Analog", "MIC1P"},
578 {"MIC1M Input Mux", "Analog", "MIC1M"},
579 {"MIC2P Input Mux", "Analog", "MIC2P"},
580 {"MIC2M Input Mux", "Analog", "MIC2M"},
581 {"MIC3P Input Mux", "Analog", "MIC3P"},
582 {"MIC3M Input Mux", "Analog", "MIC3M"},
583 {"MIC4P Input Mux", "Analog", "MIC4P"},
584 {"MIC4M Input Mux", "Analog", "MIC4M"},
586 {"MIC1P Input Mux", "Digital", "MIC1P"},
587 {"MIC1M Input Mux", "Digital", "MIC1M"},
588 {"MIC2P Input Mux", "Digital", "MIC2P"},
589 {"MIC2M Input Mux", "Digital", "MIC2M"},
590 {"MIC3P Input Mux", "Digital", "MIC3P"},
591 {"MIC3M Input Mux", "Digital", "MIC3M"},
592 {"MIC4P Input Mux", "Digital", "MIC4P"},
593 {"MIC4M Input Mux", "Digital", "MIC4M"},
597 SOC_SINGLE_TLV("Analog CH1 Mic Gain Volume", ADCX140_CH1_CFG1, 2, 42, 0,
599 SOC_SINGLE_TLV("Analog CH2 Mic Gain Volume", ADCX140_CH2_CFG1, 2, 42, 0,
601 SOC_SINGLE_TLV("Analog CH3 Mic Gain Volume", ADCX140_CH3_CFG1, 2, 42, 0,
603 SOC_SINGLE_TLV("Analog CH4 Mic Gain Volume", ADCX140_CH4_CFG1, 2, 42, 0,
616 SOC_SINGLE_TLV("Digital CH1 Out Volume", ADCX140_CH1_CFG2,
618 SOC_SINGLE_TLV("Digital CH2 Out Volume", ADCX140_CH2_CFG2,
620 SOC_SINGLE_TLV("Digital CH3 Out Volume", ADCX140_CH3_CFG2,
622 SOC_SINGLE_TLV("Digital CH4 Out Volume", ADCX140_CH4_CFG2,
624 SOC_SINGLE_TLV("Digital CH5 Out Volume", ADCX140_CH5_CFG2,
626 SOC_SINGLE_TLV("Digital CH6 Out Volume", ADCX140_CH6_CFG2,
628 SOC_SINGLE_TLV("Digital CH7 Out Volume", ADCX140_CH7_CFG2,
630 SOC_SINGLE_TLV("Digital CH8 Out Volume", ADCX140_CH8_CFG2,
638 if (adcx140->gpio_reset) { in adcx140_reset()
639 gpiod_direction_output(adcx140->gpio_reset, 0); in adcx140_reset()
642 gpiod_direction_output(adcx140->gpio_reset, 1); in adcx140_reset()
644 ret = regmap_write(adcx140->regmap, ADCX140_SW_RESET, in adcx140_reset()
661 if (adcx140->micbias_vg && power_state) in adcx140_pwr_ctrl()
664 regmap_update_bits(adcx140->regmap, ADCX140_PWR_CFG, in adcx140_pwr_ctrl()
672 struct snd_soc_component *component = dai->component; in adcx140_hw_params()
690 dev_err(component->dev, "%s: Unsupported width %d\n", in adcx140_hw_params()
692 return -EINVAL; in adcx140_hw_params()
708 struct snd_soc_component *component = codec_dai->component; in adcx140_set_dai_fmt()
725 dev_err(component->dev, "Invalid DAI master/slave interface\n"); in adcx140_set_dai_fmt()
726 return -EINVAL; in adcx140_set_dai_fmt()
745 dev_err(component->dev, "Invalid DAI interface format\n"); in adcx140_set_dai_fmt()
746 return -EINVAL; in adcx140_set_dai_fmt()
761 dev_err(component->dev, "Invalid DAI clock signal polarity\n"); in adcx140_set_dai_fmt()
762 return -EINVAL; in adcx140_set_dai_fmt()
768 adcx140->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; in adcx140_set_dai_fmt()
793 struct snd_soc_component *component = codec_dai->component; in adcx140_set_dai_tdm_slot()
797 /* TDM based on DSP mode requires slots to be adjacent */ in adcx140_set_dai_tdm_slot()
800 dev_err(component->dev, "Invalid mask, slots must be adjacent\n"); in adcx140_set_dai_tdm_slot()
801 return -EINVAL; in adcx140_set_dai_tdm_slot()
811 dev_err(component->dev, "Unsupported slot width %d\n", slot_width); in adcx140_set_dai_tdm_slot()
812 return -EINVAL; in adcx140_set_dai_tdm_slot()
815 adcx140->tdm_delay = lsb; in adcx140_set_dai_tdm_slot()
816 adcx140->slot_width = slot_width; in adcx140_set_dai_tdm_slot()
835 ret = device_property_read_u32_array(adcx140->dev, in adcx140_configure_gpo()
843 dev_err(adcx140->dev, "GPO%d config out of range\n", i + 1); in adcx140_configure_gpo()
844 return -EINVAL; in adcx140_configure_gpo()
848 dev_err(adcx140->dev, "GPO%d drive out of range\n", i + 1); in adcx140_configure_gpo()
849 return -EINVAL; in adcx140_configure_gpo()
854 ret = regmap_write(adcx140->regmap, ADCX140_GPO_CFG0 + i, in adcx140_configure_gpo()
871 gpio_count = device_property_count_u32(adcx140->dev, in adcx140_configure_gpio()
872 "ti,gpio-config"); in adcx140_configure_gpio()
877 return -EINVAL; in adcx140_configure_gpio()
879 ret = device_property_read_u32_array(adcx140->dev, "ti,gpio-config", in adcx140_configure_gpio()
885 dev_err(adcx140->dev, "GPIO config out of range\n"); in adcx140_configure_gpio()
886 return -EINVAL; in adcx140_configure_gpio()
890 dev_err(adcx140->dev, "GPIO drive out of range\n"); in adcx140_configure_gpio()
891 return -EINVAL; in adcx140_configure_gpio()
897 return regmap_write(adcx140->regmap, ADCX140_GPIO_CFG0, gpio_output_val); in adcx140_configure_gpio()
917 ret = device_property_read_u32(adcx140->dev, "ti,mic-bias-source", in adcx140_codec_probe()
921 adcx140->micbias_vg = false; in adcx140_codec_probe()
923 adcx140->micbias_vg = true; in adcx140_codec_probe()
926 ret = device_property_read_u32(adcx140->dev, "ti,vref-source", in adcx140_codec_probe()
932 dev_err(adcx140->dev, "Mic Bias source value is invalid\n"); in adcx140_codec_probe()
933 return -EINVAL; in adcx140_codec_probe()
942 if (adcx140->supply_areg == NULL) in adcx140_codec_probe()
945 ret = regmap_write(adcx140->regmap, ADCX140_SLEEP_CFG, sleep_cfg_val); in adcx140_codec_probe()
947 dev_err(adcx140->dev, "setting sleep config failed %d\n", ret); in adcx140_codec_probe()
954 pdm_count = device_property_count_u32(adcx140->dev, in adcx140_codec_probe()
955 "ti,pdm-edge-select"); in adcx140_codec_probe()
957 ret = device_property_read_u32_array(adcx140->dev, in adcx140_codec_probe()
958 "ti,pdm-edge-select", in adcx140_codec_probe()
964 pdm_edge_val |= pdm_edges[i] << (ADCX140_PDM_EDGE_SHIFT - i); in adcx140_codec_probe()
966 ret = regmap_write(adcx140->regmap, ADCX140_PDM_CFG, in adcx140_codec_probe()
972 gpi_count = device_property_count_u32(adcx140->dev, "ti,gpi-config"); in adcx140_codec_probe()
974 ret = device_property_read_u32_array(adcx140->dev, in adcx140_codec_probe()
975 "ti,gpi-config", in adcx140_codec_probe()
983 ret = regmap_write(adcx140->regmap, ADCX140_GPI_CFG0, in adcx140_codec_probe()
991 ret = regmap_write(adcx140->regmap, ADCX140_GPI_CFG1, in adcx140_codec_probe()
1005 ret = regmap_update_bits(adcx140->regmap, ADCX140_BIAS_CFG, in adcx140_codec_probe()
1009 dev_err(adcx140->dev, "setting MIC bias failed %d\n", ret); in adcx140_codec_probe()
1011 tx_high_z = device_property_read_bool(adcx140->dev, "ti,asi-tx-drive"); in adcx140_codec_probe()
1013 ret = regmap_update_bits(adcx140->regmap, ADCX140_ASI_CFG0, in adcx140_codec_probe()
1016 dev_err(adcx140->dev, "Setting Tx drive failed %d\n", ret); in adcx140_codec_probe()
1063 .name = "tlv320adcx140-codec",
1090 adcx140 = devm_kzalloc(&i2c->dev, sizeof(*adcx140), GFP_KERNEL); in adcx140_i2c_probe()
1092 return -ENOMEM; in adcx140_i2c_probe()
1094 adcx140->dev = &i2c->dev; in adcx140_i2c_probe()
1096 adcx140->gpio_reset = devm_gpiod_get_optional(adcx140->dev, in adcx140_i2c_probe()
1098 if (IS_ERR(adcx140->gpio_reset)) in adcx140_i2c_probe()
1099 dev_info(&i2c->dev, "Reset GPIO not defined\n"); in adcx140_i2c_probe()
1101 adcx140->supply_areg = devm_regulator_get_optional(adcx140->dev, in adcx140_i2c_probe()
1103 if (IS_ERR(adcx140->supply_areg)) { in adcx140_i2c_probe()
1104 if (PTR_ERR(adcx140->supply_areg) == -EPROBE_DEFER) in adcx140_i2c_probe()
1105 return -EPROBE_DEFER; in adcx140_i2c_probe()
1107 adcx140->supply_areg = NULL; in adcx140_i2c_probe()
1109 ret = regulator_enable(adcx140->supply_areg); in adcx140_i2c_probe()
1111 dev_err(adcx140->dev, "Failed to enable areg\n"); in adcx140_i2c_probe()
1116 adcx140->regmap = devm_regmap_init_i2c(i2c, &adcx140_i2c_regmap); in adcx140_i2c_probe()
1117 if (IS_ERR(adcx140->regmap)) { in adcx140_i2c_probe()
1118 ret = PTR_ERR(adcx140->regmap); in adcx140_i2c_probe()
1119 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", in adcx140_i2c_probe()
1126 return devm_snd_soc_register_component(&i2c->dev, in adcx140_i2c_probe()
1141 .name = "tlv320adcx140-codec",