Lines Matching +full:0 +full:x18020000
39 #define RT5677_DEVICE_ID 0x6327
42 #define RT5677_DSP_BOOT_VECTOR 0x1801f090
43 #define RT5677_MODEL_ADDR 0x5FFC9800
45 #define RT5677_PR_RANGE_BASE (0xff + 1)
46 #define RT5677_PR_SPACING 0x100
48 #define RT5677_PR_BASE (RT5677_PR_RANGE_BASE + (0 * RT5677_PR_SPACING))
54 .range_max = RT5677_PR_BASE + 0xfd,
56 .selector_mask = 0xff,
57 .selector_shift = 0x0,
59 .window_len = 0x1,
64 {RT5677_ASRC_12, 0x0018},
65 {RT5677_PR_BASE + 0x3d, 0x364d},
66 {RT5677_PR_BASE + 0x17, 0x4fc0},
67 {RT5677_PR_BASE + 0x13, 0x0312},
68 {RT5677_PR_BASE + 0x1e, 0x0000},
69 {RT5677_PR_BASE + 0x12, 0x0eaa},
70 {RT5677_PR_BASE + 0x14, 0x018a},
71 {RT5677_PR_BASE + 0x15, 0x0490},
72 {RT5677_PR_BASE + 0x38, 0x0f71},
73 {RT5677_PR_BASE + 0x39, 0x0f71},
78 {RT5677_RESET , 0x0000},
79 {RT5677_LOUT1 , 0xa800},
80 {RT5677_IN1 , 0x0000},
81 {RT5677_MICBIAS , 0x0000},
82 {RT5677_SLIMBUS_PARAM , 0x0000},
83 {RT5677_SLIMBUS_RX , 0x0000},
84 {RT5677_SLIMBUS_CTRL , 0x0000},
85 {RT5677_SIDETONE_CTRL , 0x000b},
86 {RT5677_ANA_DAC1_2_3_SRC , 0x0000},
87 {RT5677_IF_DSP_DAC3_4_MIXER , 0x1111},
88 {RT5677_DAC4_DIG_VOL , 0xafaf},
89 {RT5677_DAC3_DIG_VOL , 0xafaf},
90 {RT5677_DAC1_DIG_VOL , 0xafaf},
91 {RT5677_DAC2_DIG_VOL , 0xafaf},
92 {RT5677_IF_DSP_DAC2_MIXER , 0x0011},
93 {RT5677_STO1_ADC_DIG_VOL , 0x2f2f},
94 {RT5677_MONO_ADC_DIG_VOL , 0x2f2f},
95 {RT5677_STO1_2_ADC_BST , 0x0000},
96 {RT5677_STO2_ADC_DIG_VOL , 0x2f2f},
97 {RT5677_ADC_BST_CTRL2 , 0x0000},
98 {RT5677_STO3_4_ADC_BST , 0x0000},
99 {RT5677_STO3_ADC_DIG_VOL , 0x2f2f},
100 {RT5677_STO4_ADC_DIG_VOL , 0x2f2f},
101 {RT5677_STO4_ADC_MIXER , 0xd4c0},
102 {RT5677_STO3_ADC_MIXER , 0xd4c0},
103 {RT5677_STO2_ADC_MIXER , 0xd4c0},
104 {RT5677_STO1_ADC_MIXER , 0xd4c0},
105 {RT5677_MONO_ADC_MIXER , 0xd4d1},
106 {RT5677_ADC_IF_DSP_DAC1_MIXER , 0x8080},
107 {RT5677_STO1_DAC_MIXER , 0xaaaa},
108 {RT5677_MONO_DAC_MIXER , 0xaaaa},
109 {RT5677_DD1_MIXER , 0xaaaa},
110 {RT5677_DD2_MIXER , 0xaaaa},
111 {RT5677_IF3_DATA , 0x0000},
112 {RT5677_IF4_DATA , 0x0000},
113 {RT5677_PDM_OUT_CTRL , 0x8888},
114 {RT5677_PDM_DATA_CTRL1 , 0x0000},
115 {RT5677_PDM_DATA_CTRL2 , 0x0000},
116 {RT5677_PDM1_DATA_CTRL2 , 0x0000},
117 {RT5677_PDM1_DATA_CTRL3 , 0x0000},
118 {RT5677_PDM1_DATA_CTRL4 , 0x0000},
119 {RT5677_PDM2_DATA_CTRL2 , 0x0000},
120 {RT5677_PDM2_DATA_CTRL3 , 0x0000},
121 {RT5677_PDM2_DATA_CTRL4 , 0x0000},
122 {RT5677_TDM1_CTRL1 , 0x0300},
123 {RT5677_TDM1_CTRL2 , 0x0000},
124 {RT5677_TDM1_CTRL3 , 0x4000},
125 {RT5677_TDM1_CTRL4 , 0x0123},
126 {RT5677_TDM1_CTRL5 , 0x4567},
127 {RT5677_TDM2_CTRL1 , 0x0300},
128 {RT5677_TDM2_CTRL2 , 0x0000},
129 {RT5677_TDM2_CTRL3 , 0x4000},
130 {RT5677_TDM2_CTRL4 , 0x0123},
131 {RT5677_TDM2_CTRL5 , 0x4567},
132 {RT5677_I2C_MASTER_CTRL1 , 0x0001},
133 {RT5677_I2C_MASTER_CTRL2 , 0x0000},
134 {RT5677_I2C_MASTER_CTRL3 , 0x0000},
135 {RT5677_I2C_MASTER_CTRL4 , 0x0000},
136 {RT5677_I2C_MASTER_CTRL5 , 0x0000},
137 {RT5677_I2C_MASTER_CTRL6 , 0x0000},
138 {RT5677_I2C_MASTER_CTRL7 , 0x0000},
139 {RT5677_I2C_MASTER_CTRL8 , 0x0000},
140 {RT5677_DMIC_CTRL1 , 0x1505},
141 {RT5677_DMIC_CTRL2 , 0x0055},
142 {RT5677_HAP_GENE_CTRL1 , 0x0111},
143 {RT5677_HAP_GENE_CTRL2 , 0x0064},
144 {RT5677_HAP_GENE_CTRL3 , 0xef0e},
145 {RT5677_HAP_GENE_CTRL4 , 0xf0f0},
146 {RT5677_HAP_GENE_CTRL5 , 0xef0e},
147 {RT5677_HAP_GENE_CTRL6 , 0xf0f0},
148 {RT5677_HAP_GENE_CTRL7 , 0xef0e},
149 {RT5677_HAP_GENE_CTRL8 , 0xf0f0},
150 {RT5677_HAP_GENE_CTRL9 , 0xf000},
151 {RT5677_HAP_GENE_CTRL10 , 0x0000},
152 {RT5677_PWR_DIG1 , 0x0000},
153 {RT5677_PWR_DIG2 , 0x0000},
154 {RT5677_PWR_ANLG1 , 0x0055},
155 {RT5677_PWR_ANLG2 , 0x0000},
156 {RT5677_PWR_DSP1 , 0x0001},
157 {RT5677_PWR_DSP_ST , 0x0000},
158 {RT5677_PWR_DSP2 , 0x0000},
159 {RT5677_ADC_DAC_HPF_CTRL1 , 0x0e00},
160 {RT5677_PRIV_INDEX , 0x0000},
161 {RT5677_PRIV_DATA , 0x0000},
162 {RT5677_I2S4_SDP , 0x8000},
163 {RT5677_I2S1_SDP , 0x8000},
164 {RT5677_I2S2_SDP , 0x8000},
165 {RT5677_I2S3_SDP , 0x8000},
166 {RT5677_CLK_TREE_CTRL1 , 0x1111},
167 {RT5677_CLK_TREE_CTRL2 , 0x1111},
168 {RT5677_CLK_TREE_CTRL3 , 0x0000},
169 {RT5677_PLL1_CTRL1 , 0x0000},
170 {RT5677_PLL1_CTRL2 , 0x0000},
171 {RT5677_PLL2_CTRL1 , 0x0c60},
172 {RT5677_PLL2_CTRL2 , 0x2000},
173 {RT5677_GLB_CLK1 , 0x0000},
174 {RT5677_GLB_CLK2 , 0x0000},
175 {RT5677_ASRC_1 , 0x0000},
176 {RT5677_ASRC_2 , 0x0000},
177 {RT5677_ASRC_3 , 0x0000},
178 {RT5677_ASRC_4 , 0x0000},
179 {RT5677_ASRC_5 , 0x0000},
180 {RT5677_ASRC_6 , 0x0000},
181 {RT5677_ASRC_7 , 0x0000},
182 {RT5677_ASRC_8 , 0x0000},
183 {RT5677_ASRC_9 , 0x0000},
184 {RT5677_ASRC_10 , 0x0000},
185 {RT5677_ASRC_11 , 0x0000},
186 {RT5677_ASRC_12 , 0x0018},
187 {RT5677_ASRC_13 , 0x0000},
188 {RT5677_ASRC_14 , 0x0000},
189 {RT5677_ASRC_15 , 0x0000},
190 {RT5677_ASRC_16 , 0x0000},
191 {RT5677_ASRC_17 , 0x0000},
192 {RT5677_ASRC_18 , 0x0000},
193 {RT5677_ASRC_19 , 0x0000},
194 {RT5677_ASRC_20 , 0x0000},
195 {RT5677_ASRC_21 , 0x000c},
196 {RT5677_ASRC_22 , 0x0000},
197 {RT5677_ASRC_23 , 0x0000},
198 {RT5677_VAD_CTRL1 , 0x2184},
199 {RT5677_VAD_CTRL2 , 0x010a},
200 {RT5677_VAD_CTRL3 , 0x0aea},
201 {RT5677_VAD_CTRL4 , 0x000c},
202 {RT5677_VAD_CTRL5 , 0x0000},
203 {RT5677_DSP_INB_CTRL1 , 0x0000},
204 {RT5677_DSP_INB_CTRL2 , 0x0000},
205 {RT5677_DSP_IN_OUTB_CTRL , 0x0000},
206 {RT5677_DSP_OUTB0_1_DIG_VOL , 0x2f2f},
207 {RT5677_DSP_OUTB2_3_DIG_VOL , 0x2f2f},
208 {RT5677_DSP_OUTB4_5_DIG_VOL , 0x2f2f},
209 {RT5677_DSP_OUTB6_7_DIG_VOL , 0x2f2f},
210 {RT5677_ADC_EQ_CTRL1 , 0x6000},
211 {RT5677_ADC_EQ_CTRL2 , 0x0000},
212 {RT5677_EQ_CTRL1 , 0xc000},
213 {RT5677_EQ_CTRL2 , 0x0000},
214 {RT5677_EQ_CTRL3 , 0x0000},
215 {RT5677_SOFT_VOL_ZERO_CROSS1 , 0x0009},
216 {RT5677_JD_CTRL1 , 0x0000},
217 {RT5677_JD_CTRL2 , 0x0000},
218 {RT5677_JD_CTRL3 , 0x0000},
219 {RT5677_IRQ_CTRL1 , 0x0000},
220 {RT5677_IRQ_CTRL2 , 0x0000},
221 {RT5677_GPIO_ST , 0x0000},
222 {RT5677_GPIO_CTRL1 , 0x0000},
223 {RT5677_GPIO_CTRL2 , 0x0000},
224 {RT5677_GPIO_CTRL3 , 0x0000},
225 {RT5677_STO1_ADC_HI_FILTER1 , 0xb320},
226 {RT5677_STO1_ADC_HI_FILTER2 , 0x0000},
227 {RT5677_MONO_ADC_HI_FILTER1 , 0xb300},
228 {RT5677_MONO_ADC_HI_FILTER2 , 0x0000},
229 {RT5677_STO2_ADC_HI_FILTER1 , 0xb300},
230 {RT5677_STO2_ADC_HI_FILTER2 , 0x0000},
231 {RT5677_STO3_ADC_HI_FILTER1 , 0xb300},
232 {RT5677_STO3_ADC_HI_FILTER2 , 0x0000},
233 {RT5677_STO4_ADC_HI_FILTER1 , 0xb300},
234 {RT5677_STO4_ADC_HI_FILTER2 , 0x0000},
235 {RT5677_MB_DRC_CTRL1 , 0x0f20},
236 {RT5677_DRC1_CTRL1 , 0x001f},
237 {RT5677_DRC1_CTRL2 , 0x020c},
238 {RT5677_DRC1_CTRL3 , 0x1f00},
239 {RT5677_DRC1_CTRL4 , 0x0000},
240 {RT5677_DRC1_CTRL5 , 0x0000},
241 {RT5677_DRC1_CTRL6 , 0x0029},
242 {RT5677_DRC2_CTRL1 , 0x001f},
243 {RT5677_DRC2_CTRL2 , 0x020c},
244 {RT5677_DRC2_CTRL3 , 0x1f00},
245 {RT5677_DRC2_CTRL4 , 0x0000},
246 {RT5677_DRC2_CTRL5 , 0x0000},
247 {RT5677_DRC2_CTRL6 , 0x0029},
248 {RT5677_DRC1_HL_CTRL1 , 0x8000},
249 {RT5677_DRC1_HL_CTRL2 , 0x0200},
250 {RT5677_DRC2_HL_CTRL1 , 0x8000},
251 {RT5677_DRC2_HL_CTRL2 , 0x0200},
252 {RT5677_DSP_INB1_SRC_CTRL1 , 0x5800},
253 {RT5677_DSP_INB1_SRC_CTRL2 , 0x0000},
254 {RT5677_DSP_INB1_SRC_CTRL3 , 0x0000},
255 {RT5677_DSP_INB1_SRC_CTRL4 , 0x0800},
256 {RT5677_DSP_INB2_SRC_CTRL1 , 0x5800},
257 {RT5677_DSP_INB2_SRC_CTRL2 , 0x0000},
258 {RT5677_DSP_INB2_SRC_CTRL3 , 0x0000},
259 {RT5677_DSP_INB2_SRC_CTRL4 , 0x0800},
260 {RT5677_DSP_INB3_SRC_CTRL1 , 0x5800},
261 {RT5677_DSP_INB3_SRC_CTRL2 , 0x0000},
262 {RT5677_DSP_INB3_SRC_CTRL3 , 0x0000},
263 {RT5677_DSP_INB3_SRC_CTRL4 , 0x0800},
264 {RT5677_DSP_OUTB1_SRC_CTRL1 , 0x5800},
265 {RT5677_DSP_OUTB1_SRC_CTRL2 , 0x0000},
266 {RT5677_DSP_OUTB1_SRC_CTRL3 , 0x0000},
267 {RT5677_DSP_OUTB1_SRC_CTRL4 , 0x0800},
268 {RT5677_DSP_OUTB2_SRC_CTRL1 , 0x5800},
269 {RT5677_DSP_OUTB2_SRC_CTRL2 , 0x0000},
270 {RT5677_DSP_OUTB2_SRC_CTRL3 , 0x0000},
271 {RT5677_DSP_OUTB2_SRC_CTRL4 , 0x0800},
272 {RT5677_DSP_OUTB_0123_MIXER_CTRL, 0xfefe},
273 {RT5677_DSP_OUTB_45_MIXER_CTRL , 0xfefe},
274 {RT5677_DSP_OUTB_67_MIXER_CTRL , 0xfefe},
275 {RT5677_DIG_MISC , 0x0000},
276 {RT5677_GEN_CTRL1 , 0x0000},
277 {RT5677_GEN_CTRL2 , 0x0000},
278 {RT5677_VENDOR_ID , 0x0000},
279 {RT5677_VENDOR_ID1 , 0x10ec},
280 {RT5677_VENDOR_ID2 , 0x6327},
287 for (i = 0; i < ARRAY_SIZE(rt5677_ranges); i++) { in rt5677_volatile_register()
336 for (i = 0; i < ARRAY_SIZE(rt5677_ranges); i++) { in rt5677_readable_register()
560 * Returns 0 for success or negative error code.
572 if (ret < 0) { in rt5677_dsp_mode_i2c_write_addr()
578 addr & 0xffff); in rt5677_dsp_mode_i2c_write_addr()
579 if (ret < 0) { in rt5677_dsp_mode_i2c_write_addr()
586 if (ret < 0) { in rt5677_dsp_mode_i2c_write_addr()
592 value & 0xffff); in rt5677_dsp_mode_i2c_write_addr()
593 if (ret < 0) { in rt5677_dsp_mode_i2c_write_addr()
600 if (ret < 0) { in rt5677_dsp_mode_i2c_write_addr()
618 * Returns 0 for success or negative error code.
631 if (ret < 0) { in rt5677_dsp_mode_i2c_read_addr()
637 addr & 0xffff); in rt5677_dsp_mode_i2c_read_addr()
638 if (ret < 0) { in rt5677_dsp_mode_i2c_read_addr()
644 0x0002); in rt5677_dsp_mode_i2c_read_addr()
645 if (ret < 0) { in rt5677_dsp_mode_i2c_read_addr()
667 * Returns 0 for success or negative error code.
672 return rt5677_dsp_mode_i2c_write_addr(rt5677, 0x18020000 + reg * 2, in rt5677_dsp_mode_i2c_write()
673 value, 0x0001); in rt5677_dsp_mode_i2c_write()
683 * Returns 0 for success or negative error code.
688 int ret = rt5677_dsp_mode_i2c_read_addr(rt5677, 0x18020000 + reg * 2, in rt5677_dsp_mode_i2c_read()
691 *value &= 0xffff; in rt5677_dsp_mode_i2c_read()
704 RT5677_PWR_DSP, 0x0); in rt5677_set_dsp_mode()
733 regmap_write(rt5677->regmap, RT5677_VAD_CTRL2, 0x013f); in rt5677_set_vad_source()
735 regmap_write(rt5677->regmap, RT5677_VAD_CTRL3, 0x0ae5); in rt5677_set_vad_source()
742 RT5677_VAD_LV_DIFF_MASK, 0x7f << RT5677_VAD_LV_DIFF_SFT); in rt5677_set_vad_source()
759 /* VAD/SAD is not routed to the IRQ output (i.e. MX-BE[14] = 0), but it in rt5677_set_vad_source()
767 0x0f00, 0x0100); in rt5677_set_vad_source()
786 * Isolation for Band 0~7 = disable in rt5677_set_vad_source()
797 /* System Band 0~7 = power on in rt5677_set_vad_source()
810 return 0; in rt5677_set_vad_source()
820 int ret = 0; in rt5677_parse_and_load_dsp()
839 for (i = 0; i < elf_hdr->e_phnum; i++) { in rt5677_parse_and_load_dsp()
842 dev_info(component->dev, "Load 0x%x bytes to 0x%x\n", in rt5677_parse_and_load_dsp()
861 int ret = 0; in rt5677_load_dsp_from_file()
885 schedule_delayed_work(&rt5677->dsp_work, 0); in rt5677_set_dsp_vad()
886 return 0; in rt5677_set_dsp_vad()
918 for (i = 0; i < RT5677_BOOT_RETRY; i++) { in rt5677_dsp_work()
920 if (val == 0x3ff) in rt5677_dsp_work()
924 if (i == RT5677_BOOT_RETRY && val != 0x3ff) { in rt5677_dsp_work()
931 0x0009, 0x0003); in rt5677_dsp_work()
933 0x0019, 0x0003); in rt5677_dsp_work()
935 0x0009, 0x0003); in rt5677_dsp_work()
941 RT5677_PWR_DSP_CPU, 0x0); in rt5677_dsp_work()
954 regmap_write(rt5677->regmap, RT5677_VAD_CTRL1, 0x2184); in rt5677_dsp_work()
964 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
965 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
966 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
967 static const DECLARE_TLV_DB_SCALE(st_vol_tlv, -4650, 150, 0);
969 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
971 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
972 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
973 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
974 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
975 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
976 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
977 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
986 ucontrol->value.integer.value[0] = rt5677->dsp_vad_en_request; in rt5677_dsp_vad_get()
988 return 0; in rt5677_dsp_vad_get()
996 rt5677_set_dsp_vad(component, !!ucontrol->value.integer.value[0]); in rt5677_dsp_vad_put()
998 return 0; in rt5677_dsp_vad_put()
1012 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 127, 0, dac_vol_tlv),
1014 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 127, 0, dac_vol_tlv),
1016 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 127, 0, dac_vol_tlv),
1018 RT5677_L_VOL_SFT, RT5677_R_VOL_SFT, 127, 0, dac_vol_tlv),
1021 SOC_SINGLE_TLV("IN1 Boost", RT5677_IN1, RT5677_BST_SFT1, 8, 0, bst_tlv),
1022 SOC_SINGLE_TLV("IN2 Boost", RT5677_IN1, RT5677_BST_SFT2, 8, 0, bst_tlv),
1037 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 63, 0,
1040 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 63, 0,
1043 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 63, 0,
1046 RT5677_STO1_ADC_L_VOL_SFT, RT5677_STO1_ADC_R_VOL_SFT, 63, 0,
1049 RT5677_MONO_ADC_L_VOL_SFT, RT5677_MONO_ADC_R_VOL_SFT, 63, 0,
1054 RT5677_ST_VOL_SFT, 31, 0, st_vol_tlv),
1058 RT5677_STO1_ADC_L_BST_SFT, RT5677_STO1_ADC_R_BST_SFT, 3, 0,
1061 RT5677_STO2_ADC_L_BST_SFT, RT5677_STO2_ADC_R_BST_SFT, 3, 0,
1064 RT5677_STO3_ADC_L_BST_SFT, RT5677_STO3_ADC_R_BST_SFT, 3, 0,
1067 RT5677_STO4_ADC_L_BST_SFT, RT5677_STO4_ADC_R_BST_SFT, 3, 0,
1070 RT5677_MONO_ADC_L_BST_SFT, RT5677_MONO_ADC_R_BST_SFT, 3, 0,
1073 SOC_SINGLE_EXT("DSP VAD Switch", SND_SOC_NOPM, 0, 1, 0,
1097 if (idx < 0) in set_dmic_clk()
1117 return 0; in is_sys_clk_from_pll()
1131 shift = 0; in is_using_asrc()
1146 return 0; in is_using_asrc()
1150 case 0: in is_using_asrc()
1160 shift = 0; in is_using_asrc()
1176 shift = 0; in is_using_asrc()
1187 return 0; in is_using_asrc()
1192 val = (val >> shift) & 0xf; in is_using_asrc()
1198 return 0; in is_using_asrc()
1212 return 0; in can_use_asrc()
1233 unsigned int asrc3_mask = 0, asrc3_value = 0; in rt5677_sel_asrc_clk_src()
1234 unsigned int asrc4_mask = 0, asrc4_value = 0; in rt5677_sel_asrc_clk_src()
1235 unsigned int asrc5_mask = 0, asrc5_value = 0; in rt5677_sel_asrc_clk_src()
1236 unsigned int asrc6_mask = 0, asrc6_value = 0; in rt5677_sel_asrc_clk_src()
1237 unsigned int asrc7_mask = 0, asrc7_value = 0; in rt5677_sel_asrc_clk_src()
1238 unsigned int asrc8_mask = 0, asrc8_value = 0; in rt5677_sel_asrc_clk_src()
1404 return 0; in rt5677_sel_asrc_clk_src()
1453 return 0; in rt5677_dmic_use_asrc()
1460 return 0; in rt5677_dmic_use_asrc()
1753 /* ADDA1 L/R Source */ /* MX-29 [1:0] */
1766 /*DAC2 L/R Source*/ /* MX-1B [6:4] [2:0] */
1791 /*DAC3 L/R Source*/ /* MX-16 [6:4] [2:0] */
1841 /* In/OutBound Source Pass SRC */ /* MX-A5 [3] [4] [0] [1] [2] */
1907 /* DMIC Source */ /* MX-28 [9:8][1:0] MX-27 MX-26 MX-25 MX-24 [9:8] */
1954 /* Stereo2 ADC Source */ /* MX-26 [0] */
2104 /* InBound6 Source */ /* MX-A3 [2:0] */
2181 /* DAC1/2 Source */ /* MX-15 [1:0] */
2205 /* PDM channel Source */ /* MX-31 [13:12][9:8][5:4][1:0] */
2238 /* TDM IF1/2 SLB ADC1 Data Selection */ /* MX-3C MX-41 [5:4] MX-08 [1:0] */
2342 /* Interface3/4 ADC Data Input */ /* MX-2F [3:0] MX-30 [7:4] */
2362 /* TDM IF1/2 ADC Data Selection */ /* MX-3B MX-40 [7:6][5:4][3:2][1:0] */
2423 /* TDM IF1 ADC Data Selection */ /* MX-3C [2:0] */
2436 /* TDM IF2 ADC Data Selection */ /* MX-41[2:0] */
2449 /* TDM IF1/2 DAC Data Selection */ /* MX-3E[14:12][10:8][6:4][2:0]
2450 MX-3F[14:12][10:8][6:4][2:0]
2451 MX-43[14:12][10:8][6:4][2:0]
2452 MX-44[14:12][10:8][6:4][2:0] */
2583 RT5677_PWR_BST1_P, 0); in rt5677_bst1_event()
2587 return 0; in rt5677_bst1_event()
2590 return 0; in rt5677_bst1_event()
2607 RT5677_PWR_BST2_P, 0); in rt5677_bst2_event()
2611 return 0; in rt5677_bst2_event()
2614 return 0; in rt5677_bst2_event()
2625 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2); in rt5677_set_pll1_event()
2629 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0); in rt5677_set_pll1_event()
2633 return 0; in rt5677_set_pll1_event()
2636 return 0; in rt5677_set_pll1_event()
2647 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2); in rt5677_set_pll2_event()
2651 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0); in rt5677_set_pll2_event()
2655 return 0; in rt5677_set_pll2_event()
2658 return 0; in rt5677_set_pll2_event()
2678 RT5677_PWR_CLK_MB, 0); in rt5677_set_micbias1_event()
2682 return 0; in rt5677_set_micbias1_event()
2685 return 0; in rt5677_set_micbias1_event()
2705 return 0; in rt5677_if1_adc_tdm_event()
2708 return 0; in rt5677_if1_adc_tdm_event()
2728 return 0; in rt5677_if2_adc_tdm_event()
2731 return 0; in rt5677_if2_adc_tdm_event()
2753 return 0; in rt5677_vref_event()
2756 return 0; in rt5677_vref_event()
2768 return 0; in rt5677_filter_power_event()
2771 return 0; in rt5677_filter_power_event()
2776 0, rt5677_set_pll1_event, SND_SOC_DAPM_PRE_PMU |
2779 0, rt5677_set_pll2_event, SND_SOC_DAPM_PRE_PMU |
2783 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5677_ASRC_1, 0, 0, NULL, 0),
2784 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5677_ASRC_1, 1, 0, NULL, 0),
2785 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5677_ASRC_1, 2, 0, NULL, 0),
2786 SND_SOC_DAPM_SUPPLY_S("I2S4 ASRC", 1, RT5677_ASRC_1, 3, 0, NULL, 0),
2787 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5677_ASRC_2, 14, 0,
2789 SND_SOC_DAPM_SUPPLY_S("DAC MONO2 L ASRC", 1, RT5677_ASRC_2, 13, 0, NULL,
2790 0),
2791 SND_SOC_DAPM_SUPPLY_S("DAC MONO2 R ASRC", 1, RT5677_ASRC_2, 12, 0, NULL,
2792 0),
2793 SND_SOC_DAPM_SUPPLY_S("DAC MONO3 L ASRC", 1, RT5677_ASRC_1, 15, 0, NULL,
2794 0),
2795 SND_SOC_DAPM_SUPPLY_S("DAC MONO3 R ASRC", 1, RT5677_ASRC_1, 14, 0, NULL,
2796 0),
2797 SND_SOC_DAPM_SUPPLY_S("DAC MONO4 L ASRC", 1, RT5677_ASRC_1, 13, 0, NULL,
2798 0),
2799 SND_SOC_DAPM_SUPPLY_S("DAC MONO4 R ASRC", 1, RT5677_ASRC_1, 12, 0, NULL,
2800 0),
2801 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5677_ASRC_2, 11, 0, NULL,
2802 0),
2803 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5677_ASRC_2, 10, 0, NULL,
2804 0),
2805 SND_SOC_DAPM_SUPPLY_S("DMIC STO3 ASRC", 1, RT5677_ASRC_2, 9, 0, NULL,
2806 0),
2807 SND_SOC_DAPM_SUPPLY_S("DMIC STO4 ASRC", 1, RT5677_ASRC_2, 8, 0, NULL,
2808 0),
2809 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5677_ASRC_2, 7, 0, NULL,
2810 0),
2811 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5677_ASRC_2, 6, 0, NULL,
2812 0),
2813 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5677_ASRC_2, 5, 0, NULL, 0),
2814 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5677_ASRC_2, 4, 0, NULL, 0),
2815 SND_SOC_DAPM_SUPPLY_S("ADC STO3 ASRC", 1, RT5677_ASRC_2, 3, 0, NULL, 0),
2816 SND_SOC_DAPM_SUPPLY_S("ADC STO4 ASRC", 1, RT5677_ASRC_2, 2, 0, NULL, 0),
2817 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5677_ASRC_2, 1, 0, NULL,
2818 0),
2819 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5677_ASRC_2, 0, 0, NULL,
2820 0),
2825 0, rt5677_set_micbias1_event, SND_SOC_DAPM_PRE_PMD |
2845 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2846 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2847 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2848 SND_SOC_DAPM_PGA("DMIC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2851 RT5677_DMIC_1_EN_SFT, 0, NULL, 0),
2853 RT5677_DMIC_2_EN_SFT, 0, NULL, 0),
2855 RT5677_DMIC_3_EN_SFT, 0, NULL, 0),
2857 RT5677_DMIC_4_EN_SFT, 0, NULL, 0),
2859 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2864 RT5677_PWR_BST1_BIT, 0, NULL, 0, rt5677_bst1_event,
2867 RT5677_PWR_BST2_BIT, 0, NULL, 0, rt5677_bst2_event,
2872 0, 0),
2874 0, 0),
2875 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
2878 RT5677_PWR_ADC_L_BIT, 0, NULL, 0),
2880 RT5677_PWR_ADC_R_BIT, 0, NULL, 0),
2882 RT5677_PWR_ADCFED1_BIT, 0, NULL, 0),
2884 RT5677_PWR_ADCFED2_BIT, 0, NULL, 0),
2887 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2889 SND_SOC_DAPM_MUX("Stereo1 ADC1 Mux", SND_SOC_NOPM, 0, 0,
2891 SND_SOC_DAPM_MUX("Stereo1 ADC2 Mux", SND_SOC_NOPM, 0, 0,
2893 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
2895 SND_SOC_DAPM_MUX("Stereo2 ADC1 Mux", SND_SOC_NOPM, 0, 0,
2897 SND_SOC_DAPM_MUX("Stereo2 ADC2 Mux", SND_SOC_NOPM, 0, 0,
2899 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
2901 SND_SOC_DAPM_MUX("Stereo3 DMIC Mux", SND_SOC_NOPM, 0, 0,
2903 SND_SOC_DAPM_MUX("Stereo3 ADC1 Mux", SND_SOC_NOPM, 0, 0,
2905 SND_SOC_DAPM_MUX("Stereo3 ADC2 Mux", SND_SOC_NOPM, 0, 0,
2907 SND_SOC_DAPM_MUX("Stereo4 DMIC Mux", SND_SOC_NOPM, 0, 0,
2909 SND_SOC_DAPM_MUX("Stereo4 ADC1 Mux", SND_SOC_NOPM, 0, 0,
2911 SND_SOC_DAPM_MUX("Stereo4 ADC2 Mux", SND_SOC_NOPM, 0, 0,
2913 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2915 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2917 SND_SOC_DAPM_MUX("Mono ADC2 L Mux", SND_SOC_NOPM, 0, 0,
2919 SND_SOC_DAPM_MUX("Mono ADC1 L Mux", SND_SOC_NOPM, 0, 0,
2921 SND_SOC_DAPM_MUX("Mono ADC1 R Mux", SND_SOC_NOPM, 0, 0,
2923 SND_SOC_DAPM_MUX("Mono ADC2 R Mux", SND_SOC_NOPM, 0, 0,
2928 RT5677_PWR_ADC_S1F_BIT, 0, NULL, 0),
2930 RT5677_PWR_ADC_S2F_BIT, 0, NULL, 0),
2932 RT5677_PWR_ADC_S3F_BIT, 0, NULL, 0),
2934 RT5677_PWR_ADC_S4F_BIT, 0, NULL, 0),
2935 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2937 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2939 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
2941 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
2943 SND_SOC_DAPM_MIXER("Sto3 ADC MIXL", SND_SOC_NOPM, 0, 0,
2945 SND_SOC_DAPM_MIXER("Sto3 ADC MIXR", SND_SOC_NOPM, 0, 0,
2947 SND_SOC_DAPM_MIXER("Sto4 ADC MIXL", SND_SOC_NOPM, 0, 0,
2949 SND_SOC_DAPM_MIXER("Sto4 ADC MIXR", SND_SOC_NOPM, 0, 0,
2952 RT5677_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2953 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2956 RT5677_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2957 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2961 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2962 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2963 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2964 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2965 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2966 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2967 SND_SOC_DAPM_PGA("Stereo3 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2968 SND_SOC_DAPM_PGA("Stereo3 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2969 SND_SOC_DAPM_PGA("Stereo3 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2970 SND_SOC_DAPM_PGA("Stereo4 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2971 SND_SOC_DAPM_PGA("Stereo4 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2972 SND_SOC_DAPM_PGA("Stereo4 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2973 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2974 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2975 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2976 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2979 SND_SOC_DAPM_MUX("IB9 Mux", SND_SOC_NOPM, 0, 0,
2981 SND_SOC_DAPM_MUX("IB8 Mux", SND_SOC_NOPM, 0, 0,
2983 SND_SOC_DAPM_MUX("IB7 Mux", SND_SOC_NOPM, 0, 0,
2985 SND_SOC_DAPM_MUX("IB6 Mux", SND_SOC_NOPM, 0, 0,
2987 SND_SOC_DAPM_MUX("IB45 Mux", SND_SOC_NOPM, 0, 0,
2989 SND_SOC_DAPM_MUX("IB23 Mux", SND_SOC_NOPM, 0, 0,
2991 SND_SOC_DAPM_MUX("IB01 Mux", SND_SOC_NOPM, 0, 0,
2993 SND_SOC_DAPM_MUX("IB45 Bypass Mux", SND_SOC_NOPM, 0, 0,
2995 SND_SOC_DAPM_MUX("IB23 Bypass Mux", SND_SOC_NOPM, 0, 0,
2997 SND_SOC_DAPM_MUX("IB01 Bypass Mux", SND_SOC_NOPM, 0, 0,
2999 SND_SOC_DAPM_MUX("OB23 Bypass Mux", SND_SOC_NOPM, 0, 0,
3001 SND_SOC_DAPM_MUX("OB01 Bypass Mux", SND_SOC_NOPM, 0, 0,
3004 SND_SOC_DAPM_PGA("OB45", SND_SOC_NOPM, 0, 0, NULL, 0),
3005 SND_SOC_DAPM_PGA("OB67", SND_SOC_NOPM, 0, 0, NULL, 0),
3007 SND_SOC_DAPM_PGA("OutBound2", SND_SOC_NOPM, 0, 0, NULL, 0),
3008 SND_SOC_DAPM_PGA("OutBound3", SND_SOC_NOPM, 0, 0, NULL, 0),
3009 SND_SOC_DAPM_PGA("OutBound4", SND_SOC_NOPM, 0, 0, NULL, 0),
3010 SND_SOC_DAPM_PGA("OutBound5", SND_SOC_NOPM, 0, 0, NULL, 0),
3011 SND_SOC_DAPM_PGA("OutBound6", SND_SOC_NOPM, 0, 0, NULL, 0),
3012 SND_SOC_DAPM_PGA("OutBound7", SND_SOC_NOPM, 0, 0, NULL, 0),
3016 RT5677_PWR_I2S1_BIT, 0, NULL, 0),
3017 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
3018 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
3019 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
3020 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
3021 SND_SOC_DAPM_PGA("IF1 DAC4", SND_SOC_NOPM, 0, 0, NULL, 0),
3022 SND_SOC_DAPM_PGA("IF1 DAC5", SND_SOC_NOPM, 0, 0, NULL, 0),
3023 SND_SOC_DAPM_PGA("IF1 DAC6", SND_SOC_NOPM, 0, 0, NULL, 0),
3024 SND_SOC_DAPM_PGA("IF1 DAC7", SND_SOC_NOPM, 0, 0, NULL, 0),
3025 SND_SOC_DAPM_PGA("IF1 DAC01", SND_SOC_NOPM, 0, 0, NULL, 0),
3026 SND_SOC_DAPM_PGA("IF1 DAC23", SND_SOC_NOPM, 0, 0, NULL, 0),
3027 SND_SOC_DAPM_PGA("IF1 DAC45", SND_SOC_NOPM, 0, 0, NULL, 0),
3028 SND_SOC_DAPM_PGA("IF1 DAC67", SND_SOC_NOPM, 0, 0, NULL, 0),
3029 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
3030 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
3031 SND_SOC_DAPM_PGA("IF1 ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
3032 SND_SOC_DAPM_PGA("IF1 ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
3035 RT5677_PWR_I2S2_BIT, 0, NULL, 0),
3036 SND_SOC_DAPM_PGA("IF2 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
3037 SND_SOC_DAPM_PGA("IF2 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
3038 SND_SOC_DAPM_PGA("IF2 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
3039 SND_SOC_DAPM_PGA("IF2 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
3040 SND_SOC_DAPM_PGA("IF2 DAC4", SND_SOC_NOPM, 0, 0, NULL, 0),
3041 SND_SOC_DAPM_PGA("IF2 DAC5", SND_SOC_NOPM, 0, 0, NULL, 0),
3042 SND_SOC_DAPM_PGA("IF2 DAC6", SND_SOC_NOPM, 0, 0, NULL, 0),
3043 SND_SOC_DAPM_PGA("IF2 DAC7", SND_SOC_NOPM, 0, 0, NULL, 0),
3044 SND_SOC_DAPM_PGA("IF2 DAC01", SND_SOC_NOPM, 0, 0, NULL, 0),
3045 SND_SOC_DAPM_PGA("IF2 DAC23", SND_SOC_NOPM, 0, 0, NULL, 0),
3046 SND_SOC_DAPM_PGA("IF2 DAC45", SND_SOC_NOPM, 0, 0, NULL, 0),
3047 SND_SOC_DAPM_PGA("IF2 DAC67", SND_SOC_NOPM, 0, 0, NULL, 0),
3048 SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
3049 SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
3050 SND_SOC_DAPM_PGA("IF2 ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
3051 SND_SOC_DAPM_PGA("IF2 ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
3054 RT5677_PWR_I2S3_BIT, 0, NULL, 0),
3055 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
3056 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
3057 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
3058 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
3059 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
3060 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
3063 RT5677_PWR_I2S4_BIT, 0, NULL, 0),
3064 SND_SOC_DAPM_PGA("IF4 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
3065 SND_SOC_DAPM_PGA("IF4 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
3066 SND_SOC_DAPM_PGA("IF4 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
3067 SND_SOC_DAPM_PGA("IF4 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
3068 SND_SOC_DAPM_PGA("IF4 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
3069 SND_SOC_DAPM_PGA("IF4 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
3072 RT5677_PWR_SLB_BIT, 0, NULL, 0),
3073 SND_SOC_DAPM_PGA("SLB DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
3074 SND_SOC_DAPM_PGA("SLB DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
3075 SND_SOC_DAPM_PGA("SLB DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
3076 SND_SOC_DAPM_PGA("SLB DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
3077 SND_SOC_DAPM_PGA("SLB DAC4", SND_SOC_NOPM, 0, 0, NULL, 0),
3078 SND_SOC_DAPM_PGA("SLB DAC5", SND_SOC_NOPM, 0, 0, NULL, 0),
3079 SND_SOC_DAPM_PGA("SLB DAC6", SND_SOC_NOPM, 0, 0, NULL, 0),
3080 SND_SOC_DAPM_PGA("SLB DAC7", SND_SOC_NOPM, 0, 0, NULL, 0),
3081 SND_SOC_DAPM_PGA("SLB DAC01", SND_SOC_NOPM, 0, 0, NULL, 0),
3082 SND_SOC_DAPM_PGA("SLB DAC23", SND_SOC_NOPM, 0, 0, NULL, 0),
3083 SND_SOC_DAPM_PGA("SLB DAC45", SND_SOC_NOPM, 0, 0, NULL, 0),
3084 SND_SOC_DAPM_PGA("SLB DAC67", SND_SOC_NOPM, 0, 0, NULL, 0),
3085 SND_SOC_DAPM_PGA("SLB ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
3086 SND_SOC_DAPM_PGA("SLB ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
3087 SND_SOC_DAPM_PGA("SLB ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
3088 SND_SOC_DAPM_PGA("SLB ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
3091 SND_SOC_DAPM_MUX("IF1 ADC1 Mux", SND_SOC_NOPM, 0, 0,
3093 SND_SOC_DAPM_MUX("IF1 ADC2 Mux", SND_SOC_NOPM, 0, 0,
3095 SND_SOC_DAPM_MUX("IF1 ADC3 Mux", SND_SOC_NOPM, 0, 0,
3097 SND_SOC_DAPM_MUX("IF1 ADC4 Mux", SND_SOC_NOPM, 0, 0,
3099 SND_SOC_DAPM_MUX("IF1 ADC1 Swap Mux", SND_SOC_NOPM, 0, 0,
3101 SND_SOC_DAPM_MUX("IF1 ADC2 Swap Mux", SND_SOC_NOPM, 0, 0,
3103 SND_SOC_DAPM_MUX("IF1 ADC3 Swap Mux", SND_SOC_NOPM, 0, 0,
3105 SND_SOC_DAPM_MUX("IF1 ADC4 Swap Mux", SND_SOC_NOPM, 0, 0,
3107 SND_SOC_DAPM_MUX_E("IF1 ADC TDM Swap Mux", SND_SOC_NOPM, 0, 0,
3110 SND_SOC_DAPM_MUX("IF2 ADC1 Mux", SND_SOC_NOPM, 0, 0,
3112 SND_SOC_DAPM_MUX("IF2 ADC2 Mux", SND_SOC_NOPM, 0, 0,
3114 SND_SOC_DAPM_MUX("IF2 ADC3 Mux", SND_SOC_NOPM, 0, 0,
3116 SND_SOC_DAPM_MUX("IF2 ADC4 Mux", SND_SOC_NOPM, 0, 0,
3118 SND_SOC_DAPM_MUX("IF2 ADC1 Swap Mux", SND_SOC_NOPM, 0, 0,
3120 SND_SOC_DAPM_MUX("IF2 ADC2 Swap Mux", SND_SOC_NOPM, 0, 0,
3122 SND_SOC_DAPM_MUX("IF2 ADC3 Swap Mux", SND_SOC_NOPM, 0, 0,
3124 SND_SOC_DAPM_MUX("IF2 ADC4 Swap Mux", SND_SOC_NOPM, 0, 0,
3126 SND_SOC_DAPM_MUX_E("IF2 ADC TDM Swap Mux", SND_SOC_NOPM, 0, 0,
3129 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
3131 SND_SOC_DAPM_MUX("IF4 ADC Mux", SND_SOC_NOPM, 0, 0,
3133 SND_SOC_DAPM_MUX("SLB ADC1 Mux", SND_SOC_NOPM, 0, 0,
3135 SND_SOC_DAPM_MUX("SLB ADC2 Mux", SND_SOC_NOPM, 0, 0,
3137 SND_SOC_DAPM_MUX("SLB ADC3 Mux", SND_SOC_NOPM, 0, 0,
3139 SND_SOC_DAPM_MUX("SLB ADC4 Mux", SND_SOC_NOPM, 0, 0,
3142 SND_SOC_DAPM_MUX("IF1 DAC0 Mux", SND_SOC_NOPM, 0, 0,
3144 SND_SOC_DAPM_MUX("IF1 DAC1 Mux", SND_SOC_NOPM, 0, 0,
3146 SND_SOC_DAPM_MUX("IF1 DAC2 Mux", SND_SOC_NOPM, 0, 0,
3148 SND_SOC_DAPM_MUX("IF1 DAC3 Mux", SND_SOC_NOPM, 0, 0,
3150 SND_SOC_DAPM_MUX("IF1 DAC4 Mux", SND_SOC_NOPM, 0, 0,
3152 SND_SOC_DAPM_MUX("IF1 DAC5 Mux", SND_SOC_NOPM, 0, 0,
3154 SND_SOC_DAPM_MUX("IF1 DAC6 Mux", SND_SOC_NOPM, 0, 0,
3156 SND_SOC_DAPM_MUX("IF1 DAC7 Mux", SND_SOC_NOPM, 0, 0,
3159 SND_SOC_DAPM_MUX("IF2 DAC0 Mux", SND_SOC_NOPM, 0, 0,
3161 SND_SOC_DAPM_MUX("IF2 DAC1 Mux", SND_SOC_NOPM, 0, 0,
3163 SND_SOC_DAPM_MUX("IF2 DAC2 Mux", SND_SOC_NOPM, 0, 0,
3165 SND_SOC_DAPM_MUX("IF2 DAC3 Mux", SND_SOC_NOPM, 0, 0,
3167 SND_SOC_DAPM_MUX("IF2 DAC4 Mux", SND_SOC_NOPM, 0, 0,
3169 SND_SOC_DAPM_MUX("IF2 DAC5 Mux", SND_SOC_NOPM, 0, 0,
3171 SND_SOC_DAPM_MUX("IF2 DAC6 Mux", SND_SOC_NOPM, 0, 0,
3173 SND_SOC_DAPM_MUX("IF2 DAC7 Mux", SND_SOC_NOPM, 0, 0,
3177 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
3178 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
3179 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
3180 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
3181 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
3182 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
3183 SND_SOC_DAPM_AIF_IN("AIF4RX", "AIF4 Playback", 0, SND_SOC_NOPM, 0, 0),
3184 SND_SOC_DAPM_AIF_OUT("AIF4TX", "AIF4 Capture", 0, SND_SOC_NOPM, 0, 0),
3185 SND_SOC_DAPM_AIF_IN("SLBRX", "SLIMBus Playback", 0, SND_SOC_NOPM, 0, 0),
3186 SND_SOC_DAPM_AIF_OUT("SLBTX", "SLIMBus Capture", 0, SND_SOC_NOPM, 0, 0),
3187 SND_SOC_DAPM_AIF_OUT("DSPTX", "DSP Buffer", 0, SND_SOC_NOPM, 0, 0),
3190 SND_SOC_DAPM_MUX("Sidetone Mux", SND_SOC_NOPM, 0, 0,
3193 RT5677_ST_EN_SFT, 0, NULL, 0),
3196 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
3200 SND_SOC_DAPM_PGA("Tensilica DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
3201 SND_SOC_DAPM_MIXER("OB01 MIX", SND_SOC_NOPM, 0, 0,
3203 SND_SOC_DAPM_MIXER("OB23 MIX", SND_SOC_NOPM, 0, 0,
3205 SND_SOC_DAPM_MIXER("OB4 MIX", SND_SOC_NOPM, 0, 0,
3207 SND_SOC_DAPM_MIXER("OB5 MIX", SND_SOC_NOPM, 0, 0,
3209 SND_SOC_DAPM_MIXER("OB6 MIX", SND_SOC_NOPM, 0, 0,
3211 SND_SOC_DAPM_MIXER("OB7 MIX", SND_SOC_NOPM, 0, 0,
3216 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
3218 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
3220 SND_SOC_DAPM_PGA("DAC1 FS", SND_SOC_NOPM, 0, 0, NULL, 0),
3223 SND_SOC_DAPM_MUX("DAC1 Mux", SND_SOC_NOPM, 0, 0,
3225 SND_SOC_DAPM_MUX("ADDA1 Mux", SND_SOC_NOPM, 0, 0,
3227 SND_SOC_DAPM_MUX("DAC12 SRC Mux", SND_SOC_NOPM, 0, 0,
3229 SND_SOC_DAPM_MUX("DAC3 SRC Mux", SND_SOC_NOPM, 0, 0,
3233 SND_SOC_DAPM_MUX("DAC2 L Mux", SND_SOC_NOPM, 0, 0,
3235 SND_SOC_DAPM_MUX("DAC2 R Mux", SND_SOC_NOPM, 0, 0,
3239 SND_SOC_DAPM_MUX("DAC3 L Mux", SND_SOC_NOPM, 0, 0,
3241 SND_SOC_DAPM_MUX("DAC3 R Mux", SND_SOC_NOPM, 0, 0,
3245 SND_SOC_DAPM_MUX("DAC4 L Mux", SND_SOC_NOPM, 0, 0,
3247 SND_SOC_DAPM_MUX("DAC4 R Mux", SND_SOC_NOPM, 0, 0,
3252 RT5677_PWR_DAC_S1F_BIT, 0, rt5677_filter_power_event,
3255 RT5677_PWR_DAC_M2F_L_BIT, 0, rt5677_filter_power_event,
3258 RT5677_PWR_DAC_M2F_R_BIT, 0, rt5677_filter_power_event,
3261 RT5677_PWR_DAC_M3F_L_BIT, 0, rt5677_filter_power_event,
3264 RT5677_PWR_DAC_M3F_R_BIT, 0, rt5677_filter_power_event,
3267 RT5677_PWR_DAC_M4F_L_BIT, 0, rt5677_filter_power_event,
3270 RT5677_PWR_DAC_M4F_R_BIT, 0, rt5677_filter_power_event,
3273 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
3275 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
3277 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
3279 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
3281 SND_SOC_DAPM_MIXER("DD1 MIXL", SND_SOC_NOPM, 0, 0,
3283 SND_SOC_DAPM_MIXER("DD1 MIXR", SND_SOC_NOPM, 0, 0,
3285 SND_SOC_DAPM_MIXER("DD2 MIXL", SND_SOC_NOPM, 0, 0,
3287 SND_SOC_DAPM_MIXER("DD2 MIXR", SND_SOC_NOPM, 0, 0,
3289 SND_SOC_DAPM_PGA("Stereo DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
3290 SND_SOC_DAPM_PGA("Mono DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
3291 SND_SOC_DAPM_PGA("DD1 MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
3292 SND_SOC_DAPM_PGA("DD2 MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
3296 RT5677_PWR_DAC1_BIT, 0),
3298 RT5677_PWR_DAC2_BIT, 0),
3300 RT5677_PWR_DAC3_BIT, 0),
3304 RT5677_PWR_PDM1_BIT, 0, NULL, 0),
3306 RT5677_PWR_PDM2_BIT, 0, NULL, 0),
3317 SND_SOC_DAPM_PGA_S("LOUT1 amp", 0, RT5677_PWR_ANLG1, RT5677_PWR_LO1_BIT,
3318 0, NULL, 0),
3319 SND_SOC_DAPM_PGA_S("LOUT2 amp", 0, RT5677_PWR_ANLG1, RT5677_PWR_LO2_BIT,
3320 0, NULL, 0),
3321 SND_SOC_DAPM_PGA_S("LOUT3 amp", 0, RT5677_PWR_ANLG1, RT5677_PWR_LO3_BIT,
3322 0, NULL, 0),
3324 SND_SOC_DAPM_PGA_S("LOUT1 vref", 1, SND_SOC_NOPM, 0, 0,
3326 SND_SOC_DAPM_PGA_S("LOUT2 vref", 1, SND_SOC_NOPM, 0, 0,
3328 SND_SOC_DAPM_PGA_S("LOUT3 vref", 1, SND_SOC_NOPM, 0, 0,
4294 unsigned int val_len = 0, val_clk, mask_clk; in rt5677_hw_params()
4299 if (pre_div < 0) { in rt5677_hw_params()
4305 if (frame_size < 0) { in rt5677_hw_params()
4372 return 0; in rt5677_hw_params()
4379 unsigned int reg_val = 0; in rt5677_set_dai_fmt()
4387 rt5677->master[dai->id] = 0; in rt5677_set_dai_fmt()
4445 return 0; in rt5677_set_dai_fmt()
4453 unsigned int reg_val = 0; in rt5677_set_dai_sysclk()
4456 return 0; in rt5677_set_dai_sysclk()
4479 return 0; in rt5677_set_dai_sysclk()
4490 * Returns 0 for success or negative error code.
4511 return 0; in rt5677_set_dai_pll()
4516 rt5677->pll_in = 0; in rt5677_set_dai_pll()
4517 rt5677->pll_out = 0; in rt5677_set_dai_pll()
4520 return 0; in rt5677_set_dai_pll()
4559 if (ret < 0) { in rt5677_set_dai_pll()
4565 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), in rt5677_set_dai_pll()
4571 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5677_PLL_M_SFT | in rt5677_set_dai_pll()
4578 return 0; in rt5677_set_dai_pll()
4586 unsigned int val = 0, slot_width_25 = 0; in rt5677_set_tdm_slot()
4611 slot_width_25 = 0x8080; in rt5677_set_tdm_slot()
4626 regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1, 0x1f00, in rt5677_set_tdm_slot()
4628 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x8000, in rt5677_set_tdm_slot()
4632 regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1, 0x1f00, in rt5677_set_tdm_slot()
4634 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x80, in rt5677_set_tdm_slot()
4641 return 0; in rt5677_set_tdm_slot()
4664 0x0f00, 0x0f00); in rt5677_set_bias_level()
4675 0x1, 0x1); in rt5677_set_bias_level()
4695 schedule_delayed_work(&rt5677->dsp_work, 0); in rt5677_set_bias_level()
4699 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0); in rt5677_set_bias_level()
4700 regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000); in rt5677_set_bias_level()
4705 RT5677_PWR_CORE, 0); in rt5677_set_bias_level()
4707 RT5677_PR_BASE + RT5677_BIAS_CUR4, 0x0f00, 0x0000); in rt5677_set_bias_level()
4717 return 0; in rt5677_set_bias_level()
4728 0x1 << (offset * 3 + 1), !!value << (offset * 3 + 1)); in rt5677_gpio_set()
4749 0x3 << (offset * 3 + 1), in rt5677_gpio_direction_out()
4750 (0x2 | !!value) << (offset * 3 + 1)); in rt5677_gpio_direction_out()
4763 return 0; in rt5677_gpio_direction_out()
4772 if (ret < 0) in rt5677_gpio_get()
4775 return (value & (0x1 << offset)) >> offset; in rt5677_gpio_get()
4785 0x1 << (offset * 3 + 2), 0x0); in rt5677_gpio_direction_in()
4797 return 0; in rt5677_gpio_direction_in()
4801 * 0 - floating
4815 0x3 << shift, in rt5677_gpio_config()
4816 (value & 0x3) << shift); in rt5677_gpio_config()
4823 0x3 << shift, in rt5677_gpio_config()
4824 (value & 0x3) << shift); in rt5677_gpio_config()
4885 if (ret != 0) in rt5677_init_gpio()
4931 ~RT5677_IRQ_DEBOUNCE_SEL_MASK, 0x0020); in rt5677_probe()
4935 for (i = 0; i < RT5677_GPIO_NUM; i++) in rt5677_probe()
4941 return 0; in rt5677_probe()
4950 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec); in rt5677_remove()
4951 gpiod_set_value_cansleep(rt5677->pow_ldo2, 0); in rt5677_remove()
4969 gpiod_set_value_cansleep(rt5677->pow_ldo2, 0); in rt5677_suspend()
4973 return 0; in rt5677_suspend()
4981 rt5677->pll_src = 0; in rt5677_resume()
4982 rt5677->pll_in = 0; in rt5677_resume()
4983 rt5677->pll_out = 0; in rt5677_resume()
4985 gpiod_set_value_cansleep(rt5677->reset_pin, 0); in rt5677_resume()
4995 schedule_delayed_work(&rt5677->resume_irq_check, 0); in rt5677_resume()
4998 return 0; in rt5677_resume()
5011 if (reg > 0xff) { in rt5677_read()
5014 reg & 0xff); in rt5677_read()
5024 return 0; in rt5677_read()
5033 if (reg > 0xff) { in rt5677_write()
5036 reg & 0xff); in rt5677_write()
5047 return 0; in rt5677_write()
5335 int ret = 0, loop, i, reg_irq, virq; in rt5677_irq()
5354 for (loop = 0; loop < 20; loop++) { in rt5677_irq()
5364 for (i = 0; i < RT5677_IRQ_NUM; i++) { in rt5677_irq()
5413 rt5677_irq(0, rt5677); in rt5677_resume_irq_check()
5425 for (i = 0; i < RT5677_IRQ_NUM; i++) { in rt5677_resume_irq_check()
5484 return 0; in rt5677_irq_map()
5497 unsigned int jd_mask = 0, jd_val = 0; in rt5677_init_irq()
5502 return 0; in rt5677_init_irq()
5521 regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL1, 0xff, 0xff); in rt5677_init_irq()
5646 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec); in rt5677_i2c_probe()
5650 if (ret != 0) in rt5677_i2c_probe()
5701 return 0; in rt5677_i2c_remove()