Lines Matching +full:adc +full:- +full:channel +full:- +full:clk +full:- +full:src
1 // SPDX-License-Identifier: GPL-2.0-only
8 * Co-author: Meng-Huang Kuo <mhkuo@nuvoton.com>
17 #include <linux/clk.h>
34 #define NUVOTON_CODEC_DAI "nau8825-hifi"
81 /* ratio for input clk freq */
106 { 64, 2 }, /* OSR 64, SRC 1/4 */
107 { 256, 0 }, /* OSR 256, SRC 1 */
108 { 128, 1 }, /* OSR 128, SRC 1/2 */
110 { 32, 3 }, /* OSR 32, SRC 1/8 */
114 { 32, 3 }, /* OSR 32, SRC 1/8 */
115 { 64, 2 }, /* OSR 64, SRC 1/4 */
116 { 128, 1 }, /* OSR 128, SRC 1/2 */
117 { 256, 0 }, /* OSR 256, SRC 1 */
238 * nau8825_sema_acquire - acquire the semaphore of nau88l25
248 * this function returns -ETIME. If the sleep is interrupted by a signal,
249 * this function will return -EINTR. It returns 0 if the semaphore was
261 ret = down_timeout(&nau8825->xtalk_sem, timeout); in nau8825_sema_acquire()
263 dev_warn(nau8825->dev, "Acquire semaphore timeout\n"); in nau8825_sema_acquire()
265 ret = down_trylock(&nau8825->xtalk_sem); in nau8825_sema_acquire()
267 dev_warn(nau8825->dev, "Acquire semaphore fail\n"); in nau8825_sema_acquire()
274 * nau8825_sema_release - release the semaphore of nau88l25
282 up(&nau8825->xtalk_sem); in nau8825_sema_release()
286 * nau8825_sema_reset - reset the semaphore for nau88l25
294 nau8825->xtalk_sem.count = 1; in nau8825_sema_reset()
305 * The headphone volume is from 0dB to minimum -54dB and -1dB per step.
326 /* only handle volume from 0dB to minimum -54dB */ in nau8825_hpvol_ramp()
334 value = to - volume + from; in nau8825_hpvol_ramp()
335 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
344 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
350 * Computes log10 of a value; the result is round off to 3 decimal. This func-
351 * tion takes reference to dvb-math. The source code locates as the following.
352 * Linux/drivers/media/dvb-core/dvb_math.c
363 msb = fls(value) - 1; in nau8825_intlog10_dec3()
371 * 0x00231f56 -> 0x8C7D5800 in nau8825_intlog10_dec3()
372 * the result is y * 2^31 -> "significand" in nau8825_intlog10_dec3()
378 significand = value << (31 - msb); in nau8825_intlog10_dec3()
390 * (error / 0x800000) * (logtable_next - logtable_current) in nau8825_intlog10_dec3()
396 ((logtable[(logentry + 1) & 0xff] - in nau8825_intlog10_dec3()
433 gain = (sig_org - sig_cros) * 20 + GAIN_AUGMENT; in nau8825_xtalk_sidetone()
435 gain = (sig_cros - sig_org) * 20 + GAIN_AUGMENT; in nau8825_xtalk_sidetone()
436 sidetone = SIDETONE_BASE - gain * 2; in nau8825_xtalk_sidetone()
449 return -EINVAL; in nau8825_xtalk_baktab_index_by_reg()
456 if (nau8825->xtalk_baktab_initialized) in nau8825_xtalk_backup()
461 regmap_read(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_backup()
464 nau8825->xtalk_baktab_initialized = true; in nau8825_xtalk_backup()
471 if (!nau8825->xtalk_baktab_initialized) in nau8825_xtalk_restore()
488 regmap_write(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_restore()
492 nau8825->xtalk_baktab_initialized = false; in nau8825_xtalk_restore()
498 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_prepare_dac()
507 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare_dac()
511 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_prepare_dac()
516 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
521 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
525 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL, in nau8825_xtalk_prepare_dac()
528 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_xtalk_prepare_dac()
531 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLASSG_CTRL, in nau8825_xtalk_prepare_dac()
538 /* Power up left ADC and raise 5dB than Vmid for Vref */ in nau8825_xtalk_prepare_adc()
539 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2, in nau8825_xtalk_prepare_adc()
547 regmap_write(nau8825->regmap, NAU8825_REG_FLL1, 0x0); in nau8825_xtalk_clock()
548 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, 0x3126); in nau8825_xtalk_clock()
549 regmap_write(nau8825->regmap, NAU8825_REG_FLL3, 0x0008); in nau8825_xtalk_clock()
550 regmap_write(nau8825->regmap, NAU8825_REG_FLL4, 0x0010); in nau8825_xtalk_clock()
551 regmap_write(nau8825->regmap, NAU8825_REG_FLL5, 0x0); in nau8825_xtalk_clock()
552 regmap_write(nau8825->regmap, NAU8825_REG_FLL6, 0x6000); in nau8825_xtalk_clock()
554 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_xtalk_clock()
556 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, in nau8825_xtalk_clock()
561 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_xtalk_clock()
563 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1, in nau8825_xtalk_clock()
574 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_xtalk_prepare()
582 if (index != -EINVAL) { in nau8825_xtalk_prepare()
590 /* Config channel path and digital gain */ in nau8825_xtalk_prepare()
591 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL, in nau8825_xtalk_prepare()
594 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL, in nau8825_xtalk_prepare()
600 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, in nau8825_xtalk_prepare()
606 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_prepare()
609 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare()
616 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_xtalk_clean_dac()
619 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL, in nau8825_xtalk_clean_dac()
623 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_clean_dac()
627 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_clean_dac()
631 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_clean_dac()
633 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_clean_dac()
637 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_clean_dac()
640 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_clean_dac()
643 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_clean_dac()
646 if (!nau8825->irq) in nau8825_xtalk_clean_dac()
647 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_clean_dac()
653 /* Power down left ADC and restore voltage to Vmid */ in nau8825_xtalk_clean_adc()
654 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2, in nau8825_xtalk_clean_adc()
665 regmap_write(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, 0); in nau8825_xtalk_clean()
667 regmap_update_bits(nau8825->regmap, NAU8825_REG_INTERRUPT_MASK, in nau8825_xtalk_clean()
670 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_xtalk_clean()
679 /* Apply ADC volume for better cross talk performance */ in nau8825_xtalk_imm_start()
680 regmap_update_bits(nau8825->regmap, NAU8825_REG_ADC_DGAIN_CTRL, in nau8825_xtalk_imm_start()
682 /* Disables JKTIP(HPL) DAC channel for right to left measurement. in nau8825_xtalk_imm_start()
685 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
688 switch (nau8825->xtalk_state) { in nau8825_xtalk_imm_start()
691 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
697 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
706 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, in nau8825_xtalk_imm_start()
713 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_imm_stop()
720 * sending a 23Hz -24dBV sine wave into the headset output DAC and through
723 * an ADC which converts the measurement to a binary code. With two separated
741 switch (nau8825->xtalk_state) { in nau8825_xtalk_measure()
743 /* In prepare state, set up clock, intrruption, DAC path, ADC in nau8825_xtalk_measure()
749 nau8825->xtalk_state = NAU8825_XTALK_HPR_R2L; in nau8825_xtalk_measure()
756 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L, in nau8825_xtalk_measure()
757 &nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]); in nau8825_xtalk_measure()
758 dev_dbg(nau8825->dev, "HPR_R2L imm: %x\n", in nau8825_xtalk_measure()
759 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]); in nau8825_xtalk_measure()
760 /* Disable then re-enable IMM mode to update */ in nau8825_xtalk_measure()
763 nau8825->xtalk_state = NAU8825_XTALK_HPL_R2L; in nau8825_xtalk_measure()
773 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L, in nau8825_xtalk_measure()
774 &nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
775 dev_dbg(nau8825->dev, "HPL_R2L imm: %x\n", in nau8825_xtalk_measure()
776 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
779 nau8825->xtalk_state = NAU8825_XTALK_IMM; in nau8825_xtalk_measure()
783 * signal level vlues are ready. The side tone gain is deter- in nau8825_xtalk_measure()
788 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L], in nau8825_xtalk_measure()
789 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
790 dev_dbg(nau8825->dev, "cross talk sidetone: %x\n", sidetone); in nau8825_xtalk_measure()
791 regmap_write(nau8825->regmap, NAU8825_REG_DAC_DGAIN_CTRL, in nau8825_xtalk_measure()
794 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_xtalk_measure()
810 if (nau8825->xtalk_state == NAU8825_XTALK_IMM) in nau8825_xtalk_work()
819 if (nau8825->xtalk_state == NAU8825_XTALK_DONE) { in nau8825_xtalk_work()
820 snd_soc_jack_report(nau8825->jack, nau8825->xtalk_event, in nau8825_xtalk_work()
821 nau8825->xtalk_event_mask); in nau8825_xtalk_work()
823 nau8825->xtalk_protect = false; in nau8825_xtalk_work()
833 if (nau8825->xtalk_enable && nau8825->xtalk_state != in nau8825_xtalk_cancel()
835 cancel_work_sync(&nau8825->xtalk_work); in nau8825_xtalk_cancel()
840 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_xtalk_cancel()
841 nau8825->xtalk_protect = false; in nau8825_xtalk_cancel()
915 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_adc_event()
921 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_adc_event()
925 if (!nau8825->irq) in nau8825_adc_event()
926 regmap_update_bits(nau8825->regmap, in nau8825_adc_event()
930 return -EINVAL; in nau8825_adc_event()
939 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_pump_event()
946 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_pump_event()
950 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_pump_event()
954 return -EINVAL; in nau8825_pump_event()
963 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_output_dac_event()
969 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_output_dac_event()
973 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_output_dac_event()
977 return -EINVAL; in nau8825_output_dac_event()
987 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8825_biq_coeff_get()
989 if (!component->regmap) in nau8825_biq_coeff_get()
990 return -EINVAL; in nau8825_biq_coeff_get()
992 regmap_raw_read(component->regmap, NAU8825_REG_BIQ_COF1, in nau8825_biq_coeff_get()
993 ucontrol->value.bytes.data, params->max); in nau8825_biq_coeff_get()
1001 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8825_biq_coeff_put()
1004 if (!component->regmap) in nau8825_biq_coeff_put()
1005 return -EINVAL; in nau8825_biq_coeff_put()
1007 data = kmemdup(ucontrol->value.bytes.data, in nau8825_biq_coeff_put()
1008 params->max, GFP_KERNEL | GFP_DMA); in nau8825_biq_coeff_put()
1010 return -ENOMEM; in nau8825_biq_coeff_put()
1012 regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, in nau8825_biq_coeff_put()
1014 regmap_raw_write(component->regmap, NAU8825_REG_BIQ_COF1, in nau8825_biq_coeff_put()
1015 data, params->max); in nau8825_biq_coeff_put()
1016 regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, in nau8825_biq_coeff_put()
1024 "ADC", "DAC"
1047 static const DECLARE_TLV_DB_MINMAX_MUTE(adc_vol_tlv, -10300, 2400);
1048 static const DECLARE_TLV_DB_MINMAX_MUTE(sidetone_vol_tlv, -4200, 0);
1049 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -5400, 0);
1050 static const DECLARE_TLV_DB_MINMAX(fepga_gain_tlv, -100, 3600);
1051 static const DECLARE_TLV_DB_MINMAX_MUTE(crosstalk_vol_tlv, -9600, 2400);
1065 SOC_ENUM("ADC Decimation Rate", nau8825_adc_decimation_enum),
1103 SND_SOC_DAPM_ADC_E("ADC", NULL, SND_SOC_NOPM, 0, 0,
1106 SND_SOC_DAPM_SUPPLY("ADC Clock", NAU8825_REG_ENA_CTRL, 7, 0, NULL, 0),
1107 SND_SOC_DAPM_SUPPLY("ADC Power", NAU8825_REG_ANALOG_ADC_2, 6, 0, NULL,
1110 /* ADC for button press detection. A dapm supply widget is used to
1160 /* HPOL/R are ungrounded by disabling 16 Ohm pull-downs on playback */
1180 {"ADC", NULL, "Frontend PGA"},
1181 {"ADC", NULL, "ADC Clock"},
1182 {"ADC", NULL, "ADC Power"},
1183 {"AIFTX", NULL, "ADC"},
1225 return -EINVAL; in nau8825_clock_check()
1229 return -EINVAL; in nau8825_clock_check()
1234 dev_err(nau8825->dev, "exceed the maximum frequency of CLK_ADC or CLK_DAC\n"); in nau8825_clock_check()
1235 return -EINVAL; in nau8825_clock_check()
1245 struct snd_soc_component *component = dai->component; in nau8825_hw_params()
1252 * DAC or ADC clock frequency is defined as Over Sampling Rate (OSR) in nau8825_hw_params()
1257 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in nau8825_hw_params()
1258 regmap_read(nau8825->regmap, NAU8825_REG_DAC_CTRL1, &osr); in nau8825_hw_params()
1260 if (nau8825_clock_check(nau8825, substream->stream, in nau8825_hw_params()
1263 return -EINVAL; in nau8825_hw_params()
1265 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_hw_params()
1269 regmap_read(nau8825->regmap, NAU8825_REG_ADC_RATE, &osr); in nau8825_hw_params()
1271 if (nau8825_clock_check(nau8825, substream->stream, in nau8825_hw_params()
1274 return -EINVAL; in nau8825_hw_params()
1276 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_hw_params()
1282 regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, &ctrl_val); in nau8825_hw_params()
1294 return -EINVAL; in nau8825_hw_params()
1296 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_hw_params()
1316 return -EINVAL; in nau8825_hw_params()
1319 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, in nau8825_hw_params()
1330 struct snd_soc_component *component = codec_dai->component; in nau8825_set_dai_fmt()
1341 return -EINVAL; in nau8825_set_dai_fmt()
1351 return -EINVAL; in nau8825_set_dai_fmt()
1372 return -EINVAL; in nau8825_set_dai_fmt()
1377 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, in nau8825_set_dai_fmt()
1381 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_set_dai_fmt()
1400 .name = "nau8825-hifi",
1419 * nau8825_enable_jack_detect - Specify a jack for event reporting
1432 struct regmap *regmap = nau8825->regmap; in nau8825_enable_jack_detect()
1434 nau8825->jack = jack; in nau8825_enable_jack_detect()
1479 /* Reset the intrruption status from rightmost bit if the corres- in nau8825_int_status_clear_all()
1493 struct snd_soc_dapm_context *dapm = nau8825->dapm; in nau8825_eject_jack()
1494 struct regmap *regmap = nau8825->regmap; in nau8825_eject_jack()
1512 /* Enable the insertion interruption, disable the ejection inter- in nau8825_eject_jack()
1513 * ruption, and then bypass de-bounce circuit. in nau8825_eject_jack()
1526 /* Disable ADC needed for interruptions at audo mode */ in nau8825_eject_jack()
1537 struct regmap *regmap = nau8825->regmap; in nau8825_setup_auto_irq()
1548 /* Enable ADC needed for interruptions */ in nau8825_setup_auto_irq()
1562 /* Not bypass de-bounce circuit */ in nau8825_setup_auto_irq()
1596 struct regmap *regmap = nau8825->regmap; in nau8825_jack_insert()
1597 struct snd_soc_dapm_context *dapm = nau8825->dapm; in nau8825_jack_insert()
1605 nau8825->high_imped = true; in nau8825_jack_insert()
1607 nau8825->high_imped = false; in nau8825_jack_insert()
1615 dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n"); in nau8825_jack_insert()
1635 dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n"); in nau8825_jack_insert()
1656 dev_err(nau8825->dev, "detection error; disable mic function\n"); in nau8825_jack_insert()
1674 struct regmap *regmap = nau8825->regmap; in nau8825_interrupt()
1678 dev_err(nau8825->dev, "failed to read irq status\n"); in nau8825_interrupt()
1695 * lower 8 bits - for long pressed buttons in nau8825_interrupt()
1697 nau8825->button_pressed = nau8825_button_decode( in nau8825_interrupt()
1700 event |= nau8825->button_pressed; in nau8825_interrupt()
1709 if (nau8825->xtalk_enable && !nau8825->high_imped) { in nau8825_interrupt()
1713 if (!nau8825->xtalk_protect) { in nau8825_interrupt()
1714 /* Raise protection for cross talk de- in nau8825_interrupt()
1716 * The driver has to cancel the pro- in nau8825_interrupt()
1721 nau8825->xtalk_protect = true; in nau8825_interrupt()
1724 nau8825->xtalk_protect = false; in nau8825_interrupt()
1727 if (nau8825->xtalk_protect) { in nau8825_interrupt()
1728 nau8825->xtalk_state = in nau8825_interrupt()
1730 schedule_work(&nau8825->xtalk_work); in nau8825_interrupt()
1737 if (nau8825->xtalk_protect) { in nau8825_interrupt()
1739 nau8825->xtalk_protect = false; in nau8825_interrupt()
1743 dev_warn(nau8825->dev, "Headset completion IRQ fired but no headset connected\n"); in nau8825_interrupt()
1753 if (nau8825->xtalk_state == NAU8825_XTALK_PREPARE) { in nau8825_interrupt()
1754 nau8825->xtalk_event = event; in nau8825_interrupt()
1755 nau8825->xtalk_event_mask = event_mask; in nau8825_interrupt()
1759 if (nau8825->xtalk_enable && nau8825->xtalk_protect) in nau8825_interrupt()
1760 schedule_work(&nau8825->xtalk_work); in nau8825_interrupt()
1794 if (event_mask && nau8825->xtalk_state == NAU8825_XTALK_DONE) in nau8825_interrupt()
1795 snd_soc_jack_report(nau8825->jack, event, event_mask); in nau8825_interrupt()
1802 struct regmap *regmap = nau8825->regmap; in nau8825_setup_buttons()
1806 nau8825->sar_voltage << NAU8825_SAR_TRACKING_GAIN_SFT); in nau8825_setup_buttons()
1809 nau8825->sar_compare_time << NAU8825_SAR_COMPARE_TIME_SFT); in nau8825_setup_buttons()
1812 nau8825->sar_sampling_time << NAU8825_SAR_SAMPLING_TIME_SFT); in nau8825_setup_buttons()
1816 (nau8825->sar_threshold_num - 1) << NAU8825_KEYDET_LEVELS_NR_SFT); in nau8825_setup_buttons()
1819 nau8825->sar_hysteresis << NAU8825_KEYDET_HYSTERESIS_SFT); in nau8825_setup_buttons()
1822 nau8825->key_debounce << NAU8825_KEYDET_SHORTKEY_DEBOUNCE_SFT); in nau8825_setup_buttons()
1825 (nau8825->sar_threshold[0] << 8) | nau8825->sar_threshold[1]); in nau8825_setup_buttons()
1827 (nau8825->sar_threshold[2] << 8) | nau8825->sar_threshold[3]); in nau8825_setup_buttons()
1829 (nau8825->sar_threshold[4] << 8) | nau8825->sar_threshold[5]); in nau8825_setup_buttons()
1831 (nau8825->sar_threshold[6] << 8) | nau8825->sar_threshold[7]); in nau8825_setup_buttons()
1841 struct regmap *regmap = nau8825->regmap; in nau8825_init_regs()
1846 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_init_regs()
1848 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_init_regs()
1854 nau8825->vref_impedance << NAU8825_BIAS_VMID_SEL_SFT); in nau8825_init_regs()
1864 nau8825->jkdet_enable ? 0 : NAU8825_JKDET_OUTPUT_EN); in nau8825_init_regs()
1867 nau8825->jkdet_pull_enable ? 0 : NAU8825_JKDET_PULL_EN); in nau8825_init_regs()
1870 nau8825->jkdet_pull_up ? NAU8825_JKDET_PULL_UP : 0); in nau8825_init_regs()
1873 /* jkdet_polarity - 1 is for active-low */ in nau8825_init_regs()
1874 nau8825->jkdet_polarity ? 0 : NAU8825_JACK_POLARITY); in nau8825_init_regs()
1878 nau8825->jack_insert_debounce << NAU8825_JACK_INSERT_DEBOUNCE_SFT); in nau8825_init_regs()
1881 nau8825->jack_eject_debounce << NAU8825_JACK_EJECT_DEBOUNCE_SFT); in nau8825_init_regs()
1887 /* Mask unneeded IRQs: 1 - disable, 0 - enable */ in nau8825_init_regs()
1891 NAU8825_MICBIAS_VOLTAGE_MASK, nau8825->micbias_voltage); in nau8825_init_regs()
1893 if (nau8825->sar_threshold_num) in nau8825_init_regs()
1912 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_init_regs()
1933 /* Config L/R channel */ in nau8825_init_regs()
1934 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL, in nau8825_init_regs()
1936 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL, in nau8825_init_regs()
1962 nau8825->dapm = dapm; in nau8825_component_probe()
1976 * nau8825_calc_fll_param - Calculate FLL parameters.
1992 * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. in nau8825_calc_fll_param()
2001 return -EINVAL; in nau8825_calc_fll_param()
2002 fll_param->clk_ref_div = fll_pre_scalar[i].val; in nau8825_calc_fll_param()
2010 return -EINVAL; in nau8825_calc_fll_param()
2011 fll_param->ratio = fll_ratio[i].val; in nau8825_calc_fll_param()
2014 * FDCO must be within the 90MHz - 124MHz or the FFL cannot be in nau8825_calc_fll_param()
2029 return -EINVAL; in nau8825_calc_fll_param()
2030 fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; in nau8825_calc_fll_param()
2032 /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional in nau8825_calc_fll_param()
2035 fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); in nau8825_calc_fll_param()
2036 fll_param->fll_int = (fvco >> 16) & 0x3FF; in nau8825_calc_fll_param()
2037 fll_param->fll_frac = fvco & 0xFFFF; in nau8825_calc_fll_param()
2044 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_fll_apply()
2046 NAU8825_CLK_SRC_MCLK | fll_param->mclk_src); in nau8825_fll_apply()
2048 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1, in nau8825_fll_apply()
2050 fll_param->ratio | (0x6 << NAU8825_ICTRL_LATCH_SFT)); in nau8825_fll_apply()
2051 /* FLL 16-bit fractional input */ in nau8825_fll_apply()
2052 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, fll_param->fll_frac); in nau8825_fll_apply()
2053 /* FLL 10-bit integer input */ in nau8825_fll_apply()
2054 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL3, in nau8825_fll_apply()
2055 NAU8825_FLL_INTEGER_MASK, fll_param->fll_int); in nau8825_fll_apply()
2056 /* FLL pre-scaler */ in nau8825_fll_apply()
2057 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4, in nau8825_fll_apply()
2059 fll_param->clk_ref_div << NAU8825_FLL_REF_DIV_SFT); in nau8825_fll_apply()
2061 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2063 /* Disable free-running mode */ in nau8825_fll_apply()
2064 regmap_update_bits(nau8825->regmap, in nau8825_fll_apply()
2066 if (fll_param->fll_frac) { in nau8825_fll_apply()
2068 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2073 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, in nau8825_fll_apply()
2078 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2081 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, in nau8825_fll_apply()
2097 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in nau8825_set_pll()
2100 dev_dbg(component->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", in nau8825_set_pll()
2106 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_set_pll()
2115 nau8825->mclk = devm_clk_get(nau8825->dev, "mclk"); in nau8825_mclk_prepare()
2116 if (IS_ERR(nau8825->mclk)) { in nau8825_mclk_prepare()
2117 dev_info(nau8825->dev, "No 'mclk' clock found, assume MCLK is managed externally"); in nau8825_mclk_prepare()
2121 if (!nau8825->mclk_freq) { in nau8825_mclk_prepare()
2122 ret = clk_prepare_enable(nau8825->mclk); in nau8825_mclk_prepare()
2124 dev_err(nau8825->dev, "Unable to prepare codec mclk\n"); in nau8825_mclk_prepare()
2129 if (nau8825->mclk_freq != freq) { in nau8825_mclk_prepare()
2130 freq = clk_round_rate(nau8825->mclk, freq); in nau8825_mclk_prepare()
2131 ret = clk_set_rate(nau8825->mclk, freq); in nau8825_mclk_prepare()
2133 dev_err(nau8825->dev, "Unable to set mclk rate\n"); in nau8825_mclk_prepare()
2136 nau8825->mclk_freq = freq; in nau8825_mclk_prepare()
2156 struct regmap *regmap = nau8825->regmap; in nau8825_configure_sysclk()
2163 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2164 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2165 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2171 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2189 if (nau8825_is_jack_inserted(nau8825->regmap)) { in nau8825_configure_sysclk()
2209 dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n"); in nau8825_configure_sysclk()
2211 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2212 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2213 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2219 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2241 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2259 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2260 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2261 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2267 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2285 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2286 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2287 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2292 dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id); in nau8825_configure_sysclk()
2293 return -EINVAL; in nau8825_configure_sysclk()
2296 dev_dbg(nau8825->dev, "Sysclk is %dHz and clock id is %d\n", freq, in nau8825_configure_sysclk()
2311 struct regmap *regmap = nau8825->regmap; in nau8825_resume_setup()
2320 * bypass de-bounce circuit. in nau8825_resume_setup()
2349 if (nau8825->mclk_freq) { in nau8825_set_bias_level()
2350 ret = clk_prepare_enable(nau8825->mclk); in nau8825_set_bias_level()
2352 dev_err(nau8825->dev, "Unable to prepare component mclk\n"); in nau8825_set_bias_level()
2364 regmap_update_bits(nau8825->regmap, NAU8825_REG_MIC_BIAS, in nau8825_set_bias_level()
2367 regmap_update_bits(nau8825->regmap, in nau8825_set_bias_level()
2374 regmap_write(nau8825->regmap, in nau8825_set_bias_level()
2376 /* Disable ADC needed for interruptions at audo mode */ in nau8825_set_bias_level()
2377 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_set_bias_level()
2379 if (nau8825->mclk_freq) in nau8825_set_bias_level()
2380 clk_disable_unprepare(nau8825->mclk); in nau8825_set_bias_level()
2390 disable_irq(nau8825->irq); in nau8825_suspend()
2393 snd_soc_dapm_disable_pin(nau8825->dapm, "SAR"); in nau8825_suspend()
2394 snd_soc_dapm_disable_pin(nau8825->dapm, "MICBIAS"); in nau8825_suspend()
2395 snd_soc_dapm_sync(nau8825->dapm); in nau8825_suspend()
2396 regcache_cache_only(nau8825->regmap, true); in nau8825_suspend()
2397 regcache_mark_dirty(nau8825->regmap); in nau8825_suspend()
2407 regcache_cache_only(nau8825->regmap, false); in nau8825_resume()
2408 regcache_sync(nau8825->regmap); in nau8825_resume()
2409 nau8825->xtalk_protect = true; in nau8825_resume()
2412 nau8825->xtalk_protect = false; in nau8825_resume()
2413 enable_irq(nau8825->irq); in nau8825_resume()
2448 struct device *dev = nau8825->dev; in nau8825_print_device_properties()
2450 dev_dbg(dev, "jkdet-enable: %d\n", nau8825->jkdet_enable); in nau8825_print_device_properties()
2451 dev_dbg(dev, "jkdet-pull-enable: %d\n", nau8825->jkdet_pull_enable); in nau8825_print_device_properties()
2452 dev_dbg(dev, "jkdet-pull-up: %d\n", nau8825->jkdet_pull_up); in nau8825_print_device_properties()
2453 dev_dbg(dev, "jkdet-polarity: %d\n", nau8825->jkdet_polarity); in nau8825_print_device_properties()
2454 dev_dbg(dev, "micbias-voltage: %d\n", nau8825->micbias_voltage); in nau8825_print_device_properties()
2455 dev_dbg(dev, "vref-impedance: %d\n", nau8825->vref_impedance); in nau8825_print_device_properties()
2457 dev_dbg(dev, "sar-threshold-num: %d\n", nau8825->sar_threshold_num); in nau8825_print_device_properties()
2458 for (i = 0; i < nau8825->sar_threshold_num; i++) in nau8825_print_device_properties()
2459 dev_dbg(dev, "sar-threshold[%d]=%d\n", i, in nau8825_print_device_properties()
2460 nau8825->sar_threshold[i]); in nau8825_print_device_properties()
2462 dev_dbg(dev, "sar-hysteresis: %d\n", nau8825->sar_hysteresis); in nau8825_print_device_properties()
2463 dev_dbg(dev, "sar-voltage: %d\n", nau8825->sar_voltage); in nau8825_print_device_properties()
2464 dev_dbg(dev, "sar-compare-time: %d\n", nau8825->sar_compare_time); in nau8825_print_device_properties()
2465 dev_dbg(dev, "sar-sampling-time: %d\n", nau8825->sar_sampling_time); in nau8825_print_device_properties()
2466 dev_dbg(dev, "short-key-debounce: %d\n", nau8825->key_debounce); in nau8825_print_device_properties()
2467 dev_dbg(dev, "jack-insert-debounce: %d\n", in nau8825_print_device_properties()
2468 nau8825->jack_insert_debounce); in nau8825_print_device_properties()
2469 dev_dbg(dev, "jack-eject-debounce: %d\n", in nau8825_print_device_properties()
2470 nau8825->jack_eject_debounce); in nau8825_print_device_properties()
2471 dev_dbg(dev, "crosstalk-enable: %d\n", in nau8825_print_device_properties()
2472 nau8825->xtalk_enable); in nau8825_print_device_properties()
2479 nau8825->jkdet_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2480 "nuvoton,jkdet-enable"); in nau8825_read_device_properties()
2481 nau8825->jkdet_pull_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2482 "nuvoton,jkdet-pull-enable"); in nau8825_read_device_properties()
2483 nau8825->jkdet_pull_up = device_property_read_bool(dev, in nau8825_read_device_properties()
2484 "nuvoton,jkdet-pull-up"); in nau8825_read_device_properties()
2485 ret = device_property_read_u32(dev, "nuvoton,jkdet-polarity", in nau8825_read_device_properties()
2486 &nau8825->jkdet_polarity); in nau8825_read_device_properties()
2488 nau8825->jkdet_polarity = 1; in nau8825_read_device_properties()
2489 ret = device_property_read_u32(dev, "nuvoton,micbias-voltage", in nau8825_read_device_properties()
2490 &nau8825->micbias_voltage); in nau8825_read_device_properties()
2492 nau8825->micbias_voltage = 6; in nau8825_read_device_properties()
2493 ret = device_property_read_u32(dev, "nuvoton,vref-impedance", in nau8825_read_device_properties()
2494 &nau8825->vref_impedance); in nau8825_read_device_properties()
2496 nau8825->vref_impedance = 2; in nau8825_read_device_properties()
2497 ret = device_property_read_u32(dev, "nuvoton,sar-threshold-num", in nau8825_read_device_properties()
2498 &nau8825->sar_threshold_num); in nau8825_read_device_properties()
2500 nau8825->sar_threshold_num = 4; in nau8825_read_device_properties()
2501 ret = device_property_read_u32_array(dev, "nuvoton,sar-threshold", in nau8825_read_device_properties()
2502 nau8825->sar_threshold, nau8825->sar_threshold_num); in nau8825_read_device_properties()
2504 nau8825->sar_threshold[0] = 0x08; in nau8825_read_device_properties()
2505 nau8825->sar_threshold[1] = 0x12; in nau8825_read_device_properties()
2506 nau8825->sar_threshold[2] = 0x26; in nau8825_read_device_properties()
2507 nau8825->sar_threshold[3] = 0x73; in nau8825_read_device_properties()
2509 ret = device_property_read_u32(dev, "nuvoton,sar-hysteresis", in nau8825_read_device_properties()
2510 &nau8825->sar_hysteresis); in nau8825_read_device_properties()
2512 nau8825->sar_hysteresis = 0; in nau8825_read_device_properties()
2513 ret = device_property_read_u32(dev, "nuvoton,sar-voltage", in nau8825_read_device_properties()
2514 &nau8825->sar_voltage); in nau8825_read_device_properties()
2516 nau8825->sar_voltage = 6; in nau8825_read_device_properties()
2517 ret = device_property_read_u32(dev, "nuvoton,sar-compare-time", in nau8825_read_device_properties()
2518 &nau8825->sar_compare_time); in nau8825_read_device_properties()
2520 nau8825->sar_compare_time = 1; in nau8825_read_device_properties()
2521 ret = device_property_read_u32(dev, "nuvoton,sar-sampling-time", in nau8825_read_device_properties()
2522 &nau8825->sar_sampling_time); in nau8825_read_device_properties()
2524 nau8825->sar_sampling_time = 1; in nau8825_read_device_properties()
2525 ret = device_property_read_u32(dev, "nuvoton,short-key-debounce", in nau8825_read_device_properties()
2526 &nau8825->key_debounce); in nau8825_read_device_properties()
2528 nau8825->key_debounce = 3; in nau8825_read_device_properties()
2529 ret = device_property_read_u32(dev, "nuvoton,jack-insert-debounce", in nau8825_read_device_properties()
2530 &nau8825->jack_insert_debounce); in nau8825_read_device_properties()
2532 nau8825->jack_insert_debounce = 7; in nau8825_read_device_properties()
2533 ret = device_property_read_u32(dev, "nuvoton,jack-eject-debounce", in nau8825_read_device_properties()
2534 &nau8825->jack_eject_debounce); in nau8825_read_device_properties()
2536 nau8825->jack_eject_debounce = 0; in nau8825_read_device_properties()
2537 nau8825->xtalk_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2538 "nuvoton,crosstalk-enable"); in nau8825_read_device_properties()
2540 nau8825->mclk = devm_clk_get(dev, "mclk"); in nau8825_read_device_properties()
2541 if (PTR_ERR(nau8825->mclk) == -EPROBE_DEFER) { in nau8825_read_device_properties()
2542 return -EPROBE_DEFER; in nau8825_read_device_properties()
2543 } else if (PTR_ERR(nau8825->mclk) == -ENOENT) { in nau8825_read_device_properties()
2545 nau8825->mclk = NULL; in nau8825_read_device_properties()
2547 } else if (IS_ERR(nau8825->mclk)) { in nau8825_read_device_properties()
2548 return -EINVAL; in nau8825_read_device_properties()
2558 ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL, in nau8825_setup_irq()
2563 dev_err(nau8825->dev, "Cannot request irq %d (%d)\n", in nau8825_setup_irq()
2564 nau8825->irq, ret); in nau8825_setup_irq()
2574 struct device *dev = &i2c->dev; in nau8825_i2c_probe()
2575 struct nau8825 *nau8825 = dev_get_platdata(&i2c->dev); in nau8825_i2c_probe()
2581 return -ENOMEM; in nau8825_i2c_probe()
2589 nau8825->regmap = devm_regmap_init_i2c(i2c, &nau8825_regmap_config); in nau8825_i2c_probe()
2590 if (IS_ERR(nau8825->regmap)) in nau8825_i2c_probe()
2591 return PTR_ERR(nau8825->regmap); in nau8825_i2c_probe()
2592 nau8825->dev = dev; in nau8825_i2c_probe()
2593 nau8825->irq = i2c->irq; in nau8825_i2c_probe()
2597 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_i2c_probe()
2598 nau8825->xtalk_protect = false; in nau8825_i2c_probe()
2599 nau8825->xtalk_baktab_initialized = false; in nau8825_i2c_probe()
2600 sema_init(&nau8825->xtalk_sem, 1); in nau8825_i2c_probe()
2601 INIT_WORK(&nau8825->xtalk_work, nau8825_xtalk_work); in nau8825_i2c_probe()
2605 nau8825_reset_chip(nau8825->regmap); in nau8825_i2c_probe()
2606 ret = regmap_read(nau8825->regmap, NAU8825_REG_I2C_DEVICE_ID, &value); in nau8825_i2c_probe()
2615 return -ENODEV; in nau8825_i2c_probe()
2620 if (i2c->irq) in nau8825_i2c_probe()
2623 return devm_snd_soc_register_component(&i2c->dev, in nau8825_i2c_probe()