Lines Matching +full:adc +full:- +full:channel +full:- +full:clk +full:- +full:src
1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk.h>
35 /* the ADC threshold of headset */
38 /* the ADC threshold of headset */
60 /* ratio for input clk freq */
83 { 64, 2 }, /* OSR 64, SRC 1/4 */
84 { 256, 0 }, /* OSR 256, SRC 1 */
85 { 128, 1 }, /* OSR 128, SRC 1/2 */
87 { 32, 3 }, /* OSR 32, SRC 1/8 */
91 { 32, 3 }, /* OSR 32, SRC 1/8 */
92 { 64, 2 }, /* OSR 64, SRC 1/4 */
93 { 128, 1 }, /* OSR 128, SRC 1/2 */
94 { 256, 0 }, /* OSR 256, SRC 1 */
203 ret = down_timeout(&nau8824->jd_sem, timeout); in nau8824_sema_acquire()
205 dev_warn(nau8824->dev, "Acquire semaphore timeout\n"); in nau8824_sema_acquire()
207 ret = down_interruptible(&nau8824->jd_sem); in nau8824_sema_acquire()
209 dev_warn(nau8824->dev, "Acquire semaphore fail\n"); in nau8824_sema_acquire()
217 up(&nau8824->jd_sem); in nau8824_sema_release()
296 "Off", "NC", "u-law", "A-law" };
351 static const DECLARE_TLV_DB_MINMAX(hp_vol_tlv, -3000, 0);
353 static const DECLARE_TLV_DB_SCALE(dmic_vol_tlv, -12800, 50, 0);
356 SOC_ENUM("ADC Companding", nau8824_companding_adc_enum),
359 SOC_ENUM("ADC Decimation Rate", nau8824_adc_decimation_enum),
394 SOC_ENUM("ADC CH0 Select", nau8824_adc_ch0_enum),
395 SOC_ENUM("ADC CH1 Select", nau8824_adc_ch1_enum),
396 SOC_ENUM("ADC CH2 Select", nau8824_adc_ch2_enum),
397 SOC_ENUM("ADC CH3 Select", nau8824_adc_ch3_enum),
399 SOC_SINGLE("ADC CH0 TX Switch", NAU8824_REG_TDM_CTRL, 0, 1, 0),
400 SOC_SINGLE("ADC CH1 TX Switch", NAU8824_REG_TDM_CTRL, 1, 1, 0),
401 SOC_SINGLE("ADC CH2 TX Switch", NAU8824_REG_TDM_CTRL, 2, 1, 0),
402 SOC_SINGLE("ADC CH3 TX Switch", NAU8824_REG_TDM_CTRL, 3, 1, 0),
404 SOC_ENUM("DACL Channel Source", nau8824_dac_left_sel_enum),
405 SOC_ENUM("DACR Channel Source", nau8824_dac_right_sel_enum),
423 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8824_output_dac_event()
429 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, in nau8824_output_dac_event()
433 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, in nau8824_output_dac_event()
437 return -EINVAL; in nau8824_output_dac_event()
446 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8824_spk_event()
451 regmap_update_bits(nau8824->regmap, in nau8824_spk_event()
456 regmap_update_bits(nau8824->regmap, in nau8824_spk_event()
461 return -EINVAL; in nau8824_spk_event()
470 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8824_pump_event()
477 regmap_update_bits(nau8824->regmap, in nau8824_pump_event()
482 regmap_update_bits(nau8824->regmap, in nau8824_pump_event()
487 return -EINVAL; in nau8824_pump_event()
496 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in system_clock_control()
498 struct regmap *regmap = nau8824->regmap; in system_clock_control()
503 dev_dbg(nau8824->dev, "system clock control : POWER OFF\n"); in system_clock_control()
516 dev_dbg(nau8824->dev, "system clock control : POWER ON\n"); in system_clock_control()
555 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in dmic_clock_control()
557 int src; in dmic_clock_control() local
563 for (src = 0; src < 5; src++) { in dmic_clock_control()
564 if ((0x1 << (8 - src)) * nau8824->fs <= DMIC_CLK) in dmic_clock_control()
567 dev_dbg(nau8824->dev, "dmic src %d for mclk %d\n", src, nau8824->fs * 256); in dmic_clock_control()
568 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in dmic_clock_control()
569 NAU8824_CLK_DMIC_SRC_MASK, (src << NAU8824_CLK_DMIC_SRC_SFT)); in dmic_clock_control()
669 SND_SOC_DAPM_MIXER("Left ADC", NAU8824_REG_POWER_UP_CONTROL,
672 SND_SOC_DAPM_MIXER("Right ADC", NAU8824_REG_POWER_UP_CONTROL,
748 {"Left ADC", "MIC Switch", "MIC1"},
749 {"Left ADC", "HSMIC Switch", "HSMIC1"},
750 {"Right ADC", "MIC Switch", "MIC2"},
751 {"Right ADC", "HSMIC Switch", "HSMIC2"},
753 {"ADCL", NULL, "Left ADC"},
754 {"ADCR", NULL, "Right ADC"},
806 struct snd_soc_jack *jack = nau8824->jack; in nau8824_is_jack_inserted()
809 if (nau8824->irq && jack) in nau8824_is_jack_inserted()
810 insert = jack->status & SND_JACK_HEADPHONE; in nau8824_is_jack_inserted()
819 /* Reset the intrruption status from rightmost bit if the corres- in nau8824_int_status_clear_all()
833 struct snd_soc_dapm_context *dapm = nau8824->dapm; in nau8824_dapm_disable_pin()
834 const char *prefix = dapm->component->name_prefix; in nau8824_dapm_disable_pin()
848 struct snd_soc_dapm_context *dapm = nau8824->dapm; in nau8824_dapm_enable_pin()
849 const char *prefix = dapm->component->name_prefix; in nau8824_dapm_enable_pin()
863 struct snd_soc_dapm_context *dapm = nau8824->dapm; in nau8824_eject_jack()
864 struct regmap *regmap = nau8824->regmap; in nau8824_eject_jack()
874 * interruption, and then bypass de-bounce circuit. in nau8824_eject_jack()
888 if (dapm->bias_level < SND_SOC_BIAS_PREPARE) in nau8824_eject_jack()
896 struct snd_soc_dapm_context *dapm = nau8824->dapm; in nau8824_jdet_work()
897 struct regmap *regmap = nau8824->regmap; in nau8824_jdet_work()
908 dev_dbg(nau8824->dev, "SAR ADC data 0x%02x\n", adc_value); in nau8824_jdet_work()
919 snd_soc_jack_report(nau8824->jack, event, event_mask); in nau8824_jdet_work()
931 struct regmap *regmap = nau8824->regmap; in nau8824_setup_auto_irq()
940 if (nau8824->dapm->bias_level < SND_SOC_BIAS_PREPARE) in nau8824_setup_auto_irq()
975 struct regmap *regmap = nau8824->regmap; in nau8824_interrupt()
979 dev_err(nau8824->dev, "failed to read irq status\n"); in nau8824_interrupt()
982 dev_dbg(nau8824->dev, "IRQ %x\n", active_irq); in nau8824_interrupt()
992 cancel_work_sync(&nau8824->jdet_work); in nau8824_interrupt()
1003 dev_dbg(nau8824->dev, "button %x pressed\n", event); in nau8824_interrupt()
1019 cancel_work_sync(&nau8824->jdet_work); in nau8824_interrupt()
1020 schedule_work(&nau8824->jdet_work); in nau8824_interrupt()
1034 snd_soc_jack_report(nau8824->jack, event, event_mask); in nau8824_interrupt()
1046 return -EINVAL; in nau8824_clock_check()
1050 return -EINVAL; in nau8824_clock_check()
1055 dev_err(nau8824->dev, "exceed the maximum frequency of CLK_ADC or CLK_DAC\n"); in nau8824_clock_check()
1056 return -EINVAL; in nau8824_clock_check()
1065 struct snd_soc_component *component = dai->component; in nau8824_hw_params()
1072 * DAC or ADC clock frequency is defined as Over Sampling Rate (OSR) in nau8824_hw_params()
1077 nau8824->fs = params_rate(params); in nau8824_hw_params()
1078 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in nau8824_hw_params()
1079 regmap_read(nau8824->regmap, in nau8824_hw_params()
1082 if (nau8824_clock_check(nau8824, substream->stream, in nau8824_hw_params()
1083 nau8824->fs, osr)) in nau8824_hw_params()
1084 return -EINVAL; in nau8824_hw_params()
1085 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in nau8824_hw_params()
1089 regmap_read(nau8824->regmap, in nau8824_hw_params()
1092 if (nau8824_clock_check(nau8824, substream->stream, in nau8824_hw_params()
1093 nau8824->fs, osr)) in nau8824_hw_params()
1094 return -EINVAL; in nau8824_hw_params()
1095 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in nau8824_hw_params()
1101 regmap_read(nau8824->regmap, in nau8824_hw_params()
1105 bclk_fs = snd_soc_params_to_bclk(params) / nau8824->fs; in nau8824_hw_params()
1115 return -EINVAL; in nau8824_hw_params()
1116 regmap_update_bits(nau8824->regmap, in nau8824_hw_params()
1136 return -EINVAL; in nau8824_hw_params()
1139 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1, in nau8824_hw_params()
1149 struct snd_soc_component *component = dai->component; in nau8824_set_fmt()
1162 return -EINVAL; in nau8824_set_fmt()
1172 return -EINVAL; in nau8824_set_fmt()
1193 return -EINVAL; in nau8824_set_fmt()
1196 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1, in nau8824_set_fmt()
1199 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_2, in nau8824_set_fmt()
1208 * nau8824_set_tdm_slot - configure DAI TDM.
1211 * 0xf for normal 4 channel TDM.
1212 * 0xf0 for shifted 4 channel TDM
1226 struct snd_soc_component *component = dai->component; in nau8824_set_tdm_slot()
1234 return -EINVAL; in nau8824_set_tdm_slot()
1248 regmap_update_bits(nau8824->regmap, NAU8824_REG_TDM_CTRL, in nau8824_set_tdm_slot()
1252 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_LEFT_TIME_SLOT, in nau8824_set_tdm_slot()
1259 * nau8824_calc_fll_param - Calculate FLL parameters.
1275 * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. in nau8824_calc_fll_param()
1284 return -EINVAL; in nau8824_calc_fll_param()
1285 fll_param->clk_ref_div = fll_pre_scalar[i].val; in nau8824_calc_fll_param()
1293 return -EINVAL; in nau8824_calc_fll_param()
1294 fll_param->ratio = fll_ratio[i].val; in nau8824_calc_fll_param()
1297 * FDCO must be within the 90MHz - 124MHz or the FFL cannot be in nau8824_calc_fll_param()
1312 return -EINVAL; in nau8824_calc_fll_param()
1313 fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; in nau8824_calc_fll_param()
1315 /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional in nau8824_calc_fll_param()
1318 fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); in nau8824_calc_fll_param()
1319 fll_param->fll_int = (fvco >> 16) & 0x3FF; in nau8824_calc_fll_param()
1320 fll_param->fll_frac = fvco & 0xFFFF; in nau8824_calc_fll_param()
1329 NAU8824_CLK_SRC_MCLK | fll_param->mclk_src); in nau8824_fll_apply()
1331 NAU8824_FLL_RATIO_MASK, fll_param->ratio); in nau8824_fll_apply()
1332 /* FLL 16-bit fractional input */ in nau8824_fll_apply()
1333 regmap_write(regmap, NAU8824_REG_FLL2, fll_param->fll_frac); in nau8824_fll_apply()
1334 /* FLL 10-bit integer input */ in nau8824_fll_apply()
1336 NAU8824_FLL_INTEGER_MASK, fll_param->fll_int); in nau8824_fll_apply()
1337 /* FLL pre-scaler */ in nau8824_fll_apply()
1340 fll_param->clk_ref_div << NAU8824_FLL_REF_DIV_SFT); in nau8824_fll_apply()
1344 /* Disable free-running mode */ in nau8824_fll_apply()
1347 if (fll_param->fll_frac) { in nau8824_fll_apply()
1375 dev_err(nau8824->dev, "Unsupported input clock %d\n", freq_in); in nau8824_set_pll()
1378 dev_dbg(nau8824->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", in nau8824_set_pll()
1382 nau8824_fll_apply(nau8824->regmap, &fll_param); in nau8824_set_pll()
1384 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in nau8824_set_pll()
1393 struct regmap *regmap = nau8824->regmap; in nau8824_config_sysclk()
1441 dev_err(nau8824->dev, "Invalid clock id (%d)\n", clk_id); in nau8824_config_sysclk()
1442 return -EINVAL; in nau8824_config_sysclk()
1445 dev_dbg(nau8824->dev, "Sysclk is %dHz and clock id is %d\n", freq, in nau8824_config_sysclk()
1462 if (nau8824->irq) { in nau8824_resume_setup()
1464 nau8824_int_status_clear_all(nau8824->regmap); in nau8824_resume_setup()
1468 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENA_CTRL, in nau8824_resume_setup()
1470 regmap_update_bits(nau8824->regmap, in nau8824_resume_setup()
1474 regmap_update_bits(nau8824->regmap, in nau8824_resume_setup()
1500 regmap_update_bits(nau8824->regmap, in nau8824_set_bias_level()
1502 regmap_update_bits(nau8824->regmap, in nau8824_set_bias_level()
1516 nau8824->dapm = dapm; in nau8824_component_probe()
1525 if (nau8824->irq) { in nau8824_suspend()
1526 disable_irq(nau8824->irq); in nau8824_suspend()
1529 regcache_cache_only(nau8824->regmap, true); in nau8824_suspend()
1530 regcache_mark_dirty(nau8824->regmap); in nau8824_suspend()
1539 regcache_cache_only(nau8824->regmap, false); in nau8824_resume()
1540 regcache_sync(nau8824->regmap); in nau8824_resume()
1541 if (nau8824->irq) { in nau8824_resume()
1546 enable_irq(nau8824->irq); in nau8824_resume()
1616 * nau8824_enable_jack_detect - Specify a jack for event reporting
1631 nau8824->jack = jack; in nau8824_enable_jack_detect()
1633 INIT_WORK(&nau8824->jdet_work, nau8824_jdet_work); in nau8824_enable_jack_detect()
1634 ret = devm_request_threaded_irq(nau8824->dev, nau8824->irq, NULL, in nau8824_enable_jack_detect()
1638 dev_err(nau8824->dev, "Cannot request irq %d (%d)\n", in nau8824_enable_jack_detect()
1639 nau8824->irq, ret); in nau8824_enable_jack_detect()
1654 struct regmap *regmap = nau8824->regmap; in nau8824_setup_buttons()
1658 nau8824->sar_voltage << NAU8824_SAR_TRACKING_GAIN_SFT); in nau8824_setup_buttons()
1661 nau8824->sar_compare_time << NAU8824_SAR_COMPARE_TIME_SFT); in nau8824_setup_buttons()
1664 nau8824->sar_sampling_time << NAU8824_SAR_SAMPLING_TIME_SFT); in nau8824_setup_buttons()
1668 (nau8824->sar_threshold_num - 1) << NAU8824_LEVELS_NR_SFT); in nau8824_setup_buttons()
1671 nau8824->sar_hysteresis << NAU8824_HYSTERESIS_SFT); in nau8824_setup_buttons()
1674 nau8824->key_debounce << NAU8824_SHORTKEY_DEBOUNCE_SFT); in nau8824_setup_buttons()
1677 (nau8824->sar_threshold[0] << 8) | nau8824->sar_threshold[1]); in nau8824_setup_buttons()
1679 (nau8824->sar_threshold[2] << 8) | nau8824->sar_threshold[3]); in nau8824_setup_buttons()
1681 (nau8824->sar_threshold[4] << 8) | nau8824->sar_threshold[5]); in nau8824_setup_buttons()
1683 (nau8824->sar_threshold[6] << 8) | nau8824->sar_threshold[7]); in nau8824_setup_buttons()
1688 struct regmap *regmap = nau8824->regmap; in nau8824_init_regs()
1693 (nau8824->vref_impedance << NAU8824_VMID_SEL_SFT)); in nau8824_init_regs()
1698 NAU8824_MICBIAS_VOLTAGE_MASK, nau8824->micbias_voltage); in nau8824_init_regs()
1705 /* Scaling for ADC and DAC clock */ in nau8824_init_regs()
1746 /* Config L/R channel */ in nau8824_init_regs()
1777 /* jkdet_polarity - 1 is for active-low */ in nau8824_init_regs()
1778 nau8824->jkdet_polarity ? 0 : NAU8824_JACK_LOGIC); in nau8824_init_regs()
1781 (nau8824->jack_eject_debounce << NAU8824_JACK_EJECT_DT_SFT)); in nau8824_init_regs()
1782 if (nau8824->sar_threshold_num) in nau8824_init_regs()
1789 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENA_CTRL, in nau8824_setup_irq()
1791 regmap_update_bits(nau8824->regmap, in nau8824_setup_irq()
1793 regmap_update_bits(nau8824->regmap, NAU8824_REG_INTERRUPT_SETTING_1, in nau8824_setup_irq()
1801 struct device *dev = nau8824->dev; in nau8824_print_device_properties()
1804 dev_dbg(dev, "jkdet-polarity: %d\n", nau8824->jkdet_polarity); in nau8824_print_device_properties()
1805 dev_dbg(dev, "micbias-voltage: %d\n", nau8824->micbias_voltage); in nau8824_print_device_properties()
1806 dev_dbg(dev, "vref-impedance: %d\n", nau8824->vref_impedance); in nau8824_print_device_properties()
1808 dev_dbg(dev, "sar-threshold-num: %d\n", nau8824->sar_threshold_num); in nau8824_print_device_properties()
1809 for (i = 0; i < nau8824->sar_threshold_num; i++) in nau8824_print_device_properties()
1810 dev_dbg(dev, "sar-threshold[%d]=%x\n", i, in nau8824_print_device_properties()
1811 nau8824->sar_threshold[i]); in nau8824_print_device_properties()
1813 dev_dbg(dev, "sar-hysteresis: %d\n", nau8824->sar_hysteresis); in nau8824_print_device_properties()
1814 dev_dbg(dev, "sar-voltage: %d\n", nau8824->sar_voltage); in nau8824_print_device_properties()
1815 dev_dbg(dev, "sar-compare-time: %d\n", nau8824->sar_compare_time); in nau8824_print_device_properties()
1816 dev_dbg(dev, "sar-sampling-time: %d\n", nau8824->sar_sampling_time); in nau8824_print_device_properties()
1817 dev_dbg(dev, "short-key-debounce: %d\n", nau8824->key_debounce); in nau8824_print_device_properties()
1818 dev_dbg(dev, "jack-eject-debounce: %d\n", in nau8824_print_device_properties()
1819 nau8824->jack_eject_debounce); in nau8824_print_device_properties()
1826 ret = device_property_read_u32(dev, "nuvoton,jkdet-polarity", in nau8824_read_device_properties()
1827 &nau8824->jkdet_polarity); in nau8824_read_device_properties()
1829 nau8824->jkdet_polarity = 1; in nau8824_read_device_properties()
1830 ret = device_property_read_u32(dev, "nuvoton,micbias-voltage", in nau8824_read_device_properties()
1831 &nau8824->micbias_voltage); in nau8824_read_device_properties()
1833 nau8824->micbias_voltage = 6; in nau8824_read_device_properties()
1834 ret = device_property_read_u32(dev, "nuvoton,vref-impedance", in nau8824_read_device_properties()
1835 &nau8824->vref_impedance); in nau8824_read_device_properties()
1837 nau8824->vref_impedance = 2; in nau8824_read_device_properties()
1838 ret = device_property_read_u32(dev, "nuvoton,sar-threshold-num", in nau8824_read_device_properties()
1839 &nau8824->sar_threshold_num); in nau8824_read_device_properties()
1841 nau8824->sar_threshold_num = 4; in nau8824_read_device_properties()
1842 ret = device_property_read_u32_array(dev, "nuvoton,sar-threshold", in nau8824_read_device_properties()
1843 nau8824->sar_threshold, nau8824->sar_threshold_num); in nau8824_read_device_properties()
1845 nau8824->sar_threshold[0] = 0x0a; in nau8824_read_device_properties()
1846 nau8824->sar_threshold[1] = 0x14; in nau8824_read_device_properties()
1847 nau8824->sar_threshold[2] = 0x26; in nau8824_read_device_properties()
1848 nau8824->sar_threshold[3] = 0x73; in nau8824_read_device_properties()
1850 ret = device_property_read_u32(dev, "nuvoton,sar-hysteresis", in nau8824_read_device_properties()
1851 &nau8824->sar_hysteresis); in nau8824_read_device_properties()
1853 nau8824->sar_hysteresis = 0; in nau8824_read_device_properties()
1854 ret = device_property_read_u32(dev, "nuvoton,sar-voltage", in nau8824_read_device_properties()
1855 &nau8824->sar_voltage); in nau8824_read_device_properties()
1857 nau8824->sar_voltage = 6; in nau8824_read_device_properties()
1858 ret = device_property_read_u32(dev, "nuvoton,sar-compare-time", in nau8824_read_device_properties()
1859 &nau8824->sar_compare_time); in nau8824_read_device_properties()
1861 nau8824->sar_compare_time = 1; in nau8824_read_device_properties()
1862 ret = device_property_read_u32(dev, "nuvoton,sar-sampling-time", in nau8824_read_device_properties()
1863 &nau8824->sar_sampling_time); in nau8824_read_device_properties()
1865 nau8824->sar_sampling_time = 1; in nau8824_read_device_properties()
1866 ret = device_property_read_u32(dev, "nuvoton,short-key-debounce", in nau8824_read_device_properties()
1867 &nau8824->key_debounce); in nau8824_read_device_properties()
1869 nau8824->key_debounce = 0; in nau8824_read_device_properties()
1870 ret = device_property_read_u32(dev, "nuvoton,jack-eject-debounce", in nau8824_read_device_properties()
1871 &nau8824->jack_eject_debounce); in nau8824_read_device_properties()
1873 nau8824->jack_eject_debounce = 1; in nau8824_read_device_properties()
1881 struct device *dev = &i2c->dev; in nau8824_i2c_probe()
1888 return -ENOMEM; in nau8824_i2c_probe()
1895 nau8824->regmap = devm_regmap_init_i2c(i2c, &nau8824_regmap_config); in nau8824_i2c_probe()
1896 if (IS_ERR(nau8824->regmap)) in nau8824_i2c_probe()
1897 return PTR_ERR(nau8824->regmap); in nau8824_i2c_probe()
1898 nau8824->dev = dev; in nau8824_i2c_probe()
1899 nau8824->irq = i2c->irq; in nau8824_i2c_probe()
1900 sema_init(&nau8824->jd_sem, 1); in nau8824_i2c_probe()
1904 ret = regmap_read(nau8824->regmap, NAU8824_REG_I2C_DEVICE_ID, &value); in nau8824_i2c_probe()
1910 nau8824_reset_chip(nau8824->regmap); in nau8824_i2c_probe()
1913 if (i2c->irq) in nau8824_i2c_probe()