Lines Matching full:switch
227 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPL1_REG, 0, 1, 0),
228 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPL1_REG, 1, 1, 0),
229 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPL1_REG, 2, 1, 0),
230 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPL1_REG, 3, 1, 0),
231 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPL1_REG, 4, 1, 0),
232 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPL1_REG, 5, 1, 0),
233 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPL1_REG, 6, 1, 0),
234 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPL1_REG, 7, 1, 0),
235 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPL2_REG, 0, 1, 0),
236 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPL2_REG, 1, 1, 0),
237 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPL2_REG, 2, 1, 0),
238 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPL2_REG, 3, 1, 0),
239 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPL2_REG, 4, 1, 0),
240 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPL2_REG, 5, 1, 0),
241 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPL2_REG, 6, 1, 0),
242 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPL2_REG, 7, 1, 0),
243 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 0, 0, 0),
247 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPR1_REG, 0, 1, 0),
248 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPR1_REG, 1, 1, 0),
249 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPR1_REG, 2, 1, 0),
250 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPR1_REG, 3, 1, 0),
251 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPR1_REG, 4, 1, 0),
252 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPR1_REG, 5, 1, 0),
253 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPR1_REG, 6, 1, 0),
254 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPR1_REG, 7, 1, 0),
255 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPR2_REG, 0, 1, 0),
256 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPR2_REG, 1, 1, 0),
257 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPR2_REG, 2, 1, 0),
258 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPR2_REG, 3, 1, 0),
259 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPR2_REG, 4, 1, 0),
260 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPR2_REG, 5, 1, 0),
261 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPR2_REG, 6, 1, 0),
262 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPR2_REG, 7, 1, 0),
263 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 1, 0, 0),
267 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSL1_REG, 0, 1, 0),
268 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSL1_REG, 1, 1, 0),
269 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSL1_REG, 2, 1, 0),
270 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSL1_REG, 3, 1, 0),
271 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSL1_REG, 4, 1, 0),
272 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSL1_REG, 5, 1, 0),
273 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSL1_REG, 6, 1, 0),
274 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSL1_REG, 7, 1, 0),
275 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSL2_REG, 0, 1, 0),
276 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSL2_REG, 1, 1, 0),
277 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSL2_REG, 2, 1, 0),
278 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSL2_REG, 3, 1, 0),
279 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSL2_REG, 4, 1, 0),
280 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSL2_REG, 5, 1, 0),
281 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSL2_REG, 6, 1, 0),
282 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSL2_REG, 7, 1, 0),
283 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 2, 0, 0),
287 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSR1_REG, 0, 1, 0),
288 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSR1_REG, 1, 1, 0),
289 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSR1_REG, 2, 1, 0),
290 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSR1_REG, 3, 1, 0),
291 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSR1_REG, 4, 1, 0),
292 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSR1_REG, 5, 1, 0),
293 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSR1_REG, 6, 1, 0),
294 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSR1_REG, 7, 1, 0),
295 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSR2_REG, 0, 1, 0),
296 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSR2_REG, 1, 1, 0),
297 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSR2_REG, 2, 1, 0),
298 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSR2_REG, 3, 1, 0),
299 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSR2_REG, 4, 1, 0),
300 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSR2_REG, 5, 1, 0),
301 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSR2_REG, 6, 1, 0),
302 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSR2_REG, 7, 1, 0),
303 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 3, 0, 0),
307 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAL1_REG, 0, 1, 0),
308 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAL1_REG, 1, 1, 0),
309 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAL1_REG, 2, 1, 0),
310 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAL1_REG, 3, 1, 0),
311 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAL1_REG, 4, 1, 0),
312 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAL1_REG, 5, 1, 0),
313 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAL1_REG, 6, 1, 0),
314 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAL1_REG, 7, 1, 0),
315 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAL2_REG, 0, 1, 0),
316 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAL2_REG, 1, 1, 0),
317 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAL2_REG, 2, 1, 0),
318 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAL2_REG, 3, 1, 0),
319 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAL2_REG, 4, 1, 0),
320 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAL2_REG, 5, 1, 0),
321 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAL2_REG, 6, 1, 0),
322 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAL2_REG, 7, 1, 0),
323 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 4, 0, 0),
327 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAR1_REG, 0, 1, 0),
328 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAR1_REG, 1, 1, 0),
329 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAR1_REG, 2, 1, 0),
330 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAR1_REG, 3, 1, 0),
331 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAR1_REG, 4, 1, 0),
332 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAR1_REG, 5, 1, 0),
333 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAR1_REG, 6, 1, 0),
334 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAR1_REG, 7, 1, 0),
335 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAR2_REG, 0, 1, 0),
336 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAR2_REG, 1, 1, 0),
337 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAR2_REG, 2, 1, 0),
338 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAR2_REG, 3, 1, 0),
339 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAR2_REG, 4, 1, 0),
340 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAR2_REG, 5, 1, 0),
341 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAR2_REG, 6, 1, 0),
342 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAR2_REG, 7, 1, 0),
343 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 5, 0, 0),
347 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOL1_REG, 0, 1, 0),
348 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOL1_REG, 1, 1, 0),
349 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOL1_REG, 2, 1, 0),
350 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOL1_REG, 3, 1, 0),
351 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOL1_REG, 4, 1, 0),
352 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOL1_REG, 5, 1, 0),
353 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOL1_REG, 6, 1, 0),
354 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOL1_REG, 7, 1, 0),
355 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOL2_REG, 0, 1, 0),
356 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOL2_REG, 1, 1, 0),
357 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOL2_REG, 2, 1, 0),
358 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOL2_REG, 3, 1, 0),
359 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOL2_REG, 4, 1, 0),
360 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOL2_REG, 5, 1, 0),
361 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOL2_REG, 6, 1, 0),
362 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOL2_REG, 7, 1, 0),
363 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 6, 0, 0),
367 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOR1_REG, 0, 1, 0),
368 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOR1_REG, 1, 1, 0),
369 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOR1_REG, 2, 1, 0),
370 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOR1_REG, 3, 1, 0),
371 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOR1_REG, 4, 1, 0),
372 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOR1_REG, 5, 1, 0),
373 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOR1_REG, 6, 1, 0),
374 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOR1_REG, 7, 1, 0),
375 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOR2_REG, 0, 1, 0),
376 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOR2_REG, 1, 1, 0),
377 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOR2_REG, 2, 1, 0),
378 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOR2_REG, 3, 1, 0),
379 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOR2_REG, 4, 1, 0),
380 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOR2_REG, 5, 1, 0),
381 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOR2_REG, 6, 1, 0),
382 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOR2_REG, 7, 1, 0),
383 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 7, 0, 0),
387 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX1_REG, 0, 1, 0),
388 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX1_REG, 1, 1, 0),
389 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX1_REG, 2, 1, 0),
390 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX1_REG, 3, 1, 0),
391 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX1_REG, 4, 1, 0),
392 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX1_REG, 5, 1, 0),
393 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT1_TX1_REG, 6, 1, 0),
394 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT1_TX1_REG, 7, 1, 0),
398 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX2_REG, 0, 1, 0),
399 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX2_REG, 1, 1, 0),
400 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX2_REG, 2, 1, 0),
401 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX2_REG, 3, 1, 0),
402 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX2_REG, 4, 1, 0),
403 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX2_REG, 5, 1, 0),
404 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT1_TX2_REG, 6, 1, 0),
405 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT1_TX2_REG, 7, 1, 0),
409 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX3_REG, 0, 1, 0),
410 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX3_REG, 1, 1, 0),
411 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX3_REG, 2, 1, 0),
412 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX3_REG, 3, 1, 0),
413 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX3_REG, 4, 1, 0),
414 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX3_REG, 5, 1, 0),
415 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_PORT1_TX3_REG, 6, 1, 0),
419 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX4_REG, 0, 1, 0),
420 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX4_REG, 1, 1, 0),
421 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX4_REG, 2, 1, 0),
422 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX4_REG, 3, 1, 0),
423 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX4_REG, 4, 1, 0),
424 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX4_REG, 5, 1, 0),
425 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_PORT1_TX4_REG, 6, 1, 0),
429 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX5_REG, 0, 1, 0),
430 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX5_REG, 1, 1, 0),
431 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX5_REG, 2, 1, 0),
432 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX5_REG, 3, 1, 0),
433 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX5_REG, 4, 1, 0),
434 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX5_REG, 5, 1, 0),
435 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_PORT1_TX5_REG, 6, 1, 0),
439 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX6_REG, 0, 1, 0),
440 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX6_REG, 1, 1, 0),
441 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX6_REG, 2, 1, 0),
442 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX6_REG, 3, 1, 0),
443 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX6_REG, 4, 1, 0),
444 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX6_REG, 5, 1, 0),
445 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_PORT1_TX6_REG, 6, 1, 0),
449 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX7_REG, 0, 1, 0),
450 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX7_REG, 1, 1, 0),
451 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX7_REG, 2, 1, 0),
452 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX7_REG, 3, 1, 0),
453 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX7_REG, 4, 1, 0),
454 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX7_REG, 5, 1, 0),
455 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_PORT1_TX7_REG, 6, 1, 0),
459 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX8_REG, 0, 1, 0),
460 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX8_REG, 1, 1, 0),
461 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX8_REG, 2, 1, 0),
462 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX8_REG, 3, 1, 0),
463 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX8_REG, 4, 1, 0),
464 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX8_REG, 5, 1, 0),
465 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_PORT1_TX8_REG, 6, 1, 0),
469 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX1_REG, 0, 1, 0),
470 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX1_REG, 1, 1, 0),
471 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX1_REG, 2, 1, 0),
472 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX1_REG, 3, 1, 0),
473 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX1_REG, 4, 1, 0),
474 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX1_REG, 5, 1, 0),
475 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT2_TX1_REG, 6, 1, 0),
476 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT2_TX1_REG, 7, 1, 0),
480 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX2_REG, 0, 1, 0),
481 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX2_REG, 1, 1, 0),
482 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX2_REG, 2, 1, 0),
483 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX2_REG, 3, 1, 0),
484 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX2_REG, 4, 1, 0),
485 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX2_REG, 5, 1, 0),
486 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT2_TX2_REG, 6, 1, 0),
487 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT2_TX2_REG, 7, 1, 0),
532 SOC_SINGLE("DMIC1 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
534 SOC_SINGLE("DMIC2 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
536 SOC_SINGLE("ADC HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
573 SOC_SINGLE("Port1 Playback Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
575 SOC_SINGLE("Port2 Playback Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
577 SOC_SINGLE("Port1 Capture Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
579 SOC_SINGLE("Port2 Capture Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
620 SND_SOC_DAPM_OUT_DRV("Headset Switch",
622 SND_SOC_DAPM_OUT_DRV("Earpiece Switch",
624 SND_SOC_DAPM_OUT_DRV("Speaker Left Switch",
626 SND_SOC_DAPM_OUT_DRV("Speaker Right Switch",
628 SND_SOC_DAPM_OUT_DRV("Haptic Left Switch",
630 SND_SOC_DAPM_OUT_DRV("Haptic Right Switch",
763 { "PORT1_1_RX", "Port1 Playback Switch", "PORT1_SDI" },
764 { "PORT1_2_RX", "Port1 Playback Switch", "PORT1_SDI" },
765 { "PORT1_3_RX", "Port1 Playback Switch", "PORT1_SDI" },
766 { "PORT1_4_RX", "Port1 Playback Switch", "PORT1_SDI" },
767 { "PORT1_5_RX", "Port1 Playback Switch", "PORT1_SDI" },
768 { "PORT1_6_RX", "Port1 Playback Switch", "PORT1_SDI" },
769 { "PORT1_7_RX", "Port1 Playback Switch", "PORT1_SDI" },
770 { "PORT1_8_RX", "Port1 Playback Switch", "PORT1_SDI" },
772 { "PORT2_1_RX", "Port2 Playback Switch", "PORT2_SDI" },
773 { "PORT2_2_RX", "Port2 Playback Switch", "PORT2_SDI" },
776 { "HPL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
777 { "HPL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
778 { "HPL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
779 { "HPL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
780 { "HPL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
781 { "HPL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
782 { "HPL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
783 { "HPL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
785 { "HPL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
786 { "HPL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
788 { "HPL Mixer", "ADCL Switch", "ADC Left" },
789 { "HPL Mixer", "ADCR Switch", "ADC Right" },
790 { "HPL Mixer", "DMIC1L Switch", "DMIC1 Left" },
791 { "HPL Mixer", "DMIC1R Switch", "DMIC1 Right" },
792 { "HPL Mixer", "DMIC2L Switch", "DMIC2 Left" },
793 { "HPL Mixer", "DMIC2R Switch", "DMIC2 Right" },
794 { "HPL Mixer", "Sidetone Switch", "Sidetone" },
798 { "HPR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
799 { "HPR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
800 { "HPR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
801 { "HPR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
802 { "HPR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
803 { "HPR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
804 { "HPR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
805 { "HPR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
808 { "HPR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
809 { "HPR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
811 { "HPR Mixer", "ADCL Switch", "ADC Left" },
812 { "HPR Mixer", "ADCR Switch", "ADC Right" },
813 { "HPR Mixer", "DMIC1L Switch", "DMIC1 Left" },
814 { "HPR Mixer", "DMIC1R Switch", "DMIC1 Right" },
815 { "HPR Mixer", "DMIC2L Switch", "DMIC2 Left" },
816 { "HPR Mixer", "DMIC2L Switch", "DMIC2 Right" },
817 { "HPR Mixer", "Sidetone Switch", "Sidetone" },
821 { "HPOUTL", "Headset Switch", "HPL DAC"},
822 { "HPOUTR", "Headset Switch", "HPR DAC"},
825 { "EPOUT", "Earpiece Switch", "HPL DAC" },
828 { "LSL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
829 { "LSL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
830 { "LSL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
831 { "LSL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
832 { "LSL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
833 { "LSL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
834 { "LSL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
835 { "LSL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
838 { "LSL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
839 { "LSL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
841 { "LSL Mixer", "ADCL Switch", "ADC Left" },
842 { "LSL Mixer", "ADCR Switch", "ADC Right" },
843 { "LSL Mixer", "DMIC1L Switch", "DMIC1 Left" },
844 { "LSL Mixer", "DMIC1R Switch", "DMIC1 Right" },
845 { "LSL Mixer", "DMIC2L Switch", "DMIC2 Left" },
846 { "LSL Mixer", "DMIC2R Switch", "DMIC2 Right" },
847 { "LSL Mixer", "Sidetone Switch", "Sidetone" },
851 { "LSR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
852 { "LSR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
853 { "LSR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
854 { "LSR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
855 { "LSR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
856 { "LSR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
857 { "LSR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
858 { "LSR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
861 { "LSR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
862 { "LSR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
864 { "LSR Mixer", "ADCL Switch", "ADC Left" },
865 { "LSR Mixer", "ADCR Switch", "ADC Right" },
866 { "LSR Mixer", "DMIC1L Switch", "DMIC1 Left" },
867 { "LSR Mixer", "DMIC1R Switch", "DMIC1 Right" },
868 { "LSR Mixer", "DMIC2L Switch", "DMIC2 Left" },
869 { "LSR Mixer", "DMIC2R Switch", "DMIC2 Right" },
870 { "LSR Mixer", "Sidetone Switch", "Sidetone" },
874 { "LSOUTL", "Speaker Left Switch", "LSL DAC"},
875 { "LSOUTR", "Speaker Left Switch", "LSR DAC"},
878 { "HAL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
879 { "HAL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
880 { "HAL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
881 { "HAL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
882 { "HAL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
883 { "HAL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
884 { "HAL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
885 { "HAL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
888 { "HAL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
889 { "HAL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
891 { "HAL Mixer", "ADCL Switch", "ADC Left" },
892 { "HAL Mixer", "ADCR Switch", "ADC Right" },
893 { "HAL Mixer", "DMIC1L Switch", "DMIC1 Left" },
894 { "HAL Mixer", "DMIC1R Switch", "DMIC1 Right" },
895 { "HAL Mixer", "DMIC2L Switch", "DMIC2 Left" },
896 { "HAL Mixer", "DMIC2R Switch", "DMIC2 Right" },
897 { "HAL Mixer", "Sidetone Switch", "Sidetone" },
901 { "HAR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
902 { "HAR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
903 { "HAR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
904 { "HAR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
905 { "HAR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
906 { "HAR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
907 { "HAR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
908 { "HAR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
911 { "HAR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
912 { "HAR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
914 { "HAR Mixer", "ADCL Switch", "ADC Left" },
915 { "HAR Mixer", "ADCR Switch", "ADC Right" },
916 { "HAR Mixer", "DMIC1L Switch", "DMIC1 Left" },
917 { "HAR Mixer", "DMIC1R Switch", "DMIC1 Right" },
918 { "HAR Mixer", "DMIC2L Switch", "DMIC2 Left" },
919 { "HAR Mixer", "DMIC2R Switch", "DMIC2 Right" },
920 { "HAR Mixer", "Sideton Switch", "Sidetone" },
924 { "HAOUTL", "Haptic Left Switch", "HAL DAC" },
925 { "HAOUTR", "Haptic Right Switch", "HAR DAC" },
928 { "LOL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
929 { "LOL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
930 { "LOL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
931 { "LOL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
932 { "LOL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
933 { "LOL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
934 { "LOL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
935 { "LOL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
938 { "LOL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
939 { "LOL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
941 { "LOL Mixer", "ADCL Switch", "ADC Left" },
942 { "LOL Mixer", "ADCR Switch", "ADC Right" },
943 { "LOL Mixer", "DMIC1L Switch", "DMIC1 Left" },
944 { "LOL Mixer", "DMIC1R Switch", "DMIC1 Right" },
945 { "LOL Mixer", "DMIC2L Switch", "DMIC2 Left" },
946 { "LOL Mixer", "DMIC2R Switch", "DMIC2 Right" },
947 { "LOL Mixer", "Sidetone Switch", "Sidetone" },
951 { "LOR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
952 { "LOR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
953 { "LOR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
954 { "LOR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
955 { "LOR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
956 { "LOR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
957 { "LOR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
958 { "LOR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
961 { "LOR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
962 { "LOR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
964 { "LOR Mixer", "ADCL Switch", "ADC Left" },
965 { "LOR Mixer", "ADCR Switch", "ADC Right" },
966 { "LOR Mixer", "DMIC1L Switch", "DMIC1 Left" },
967 { "LOR Mixer", "DMIC1R Switch", "DMIC1 Right" },
968 { "LOR Mixer", "DMIC2L Switch", "DMIC2 Left" },
969 { "LOR Mixer", "DMIC2R Switch", "DMIC2 Right" },
970 { "LOR Mixer", "Sidetone Switch", "Sidetone" },
979 { "Port1_1 Mixer", "ADCL Switch", "ADC Left" },
980 { "Port1_1 Mixer", "ADCR Switch", "ADC Right" },
981 { "Port1_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
982 { "Port1_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
983 { "Port1_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
984 { "Port1_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },
986 { "Port1_2 Mixer", "ADCL Switch", "ADC Left" },
987 { "Port1_2 Mixer", "ADCR Switch", "ADC Right" },
988 { "Port1_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
989 { "Port1_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
990 { "Port1_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
991 { "Port1_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },
993 { "Port1_3 Mixer", "ADCL Switch", "ADC Left" },
994 { "Port1_3 Mixer", "ADCR Switch", "ADC Right" },
995 { "Port1_3 Mixer", "DMIC1L Switch", "DMIC1 Left" },
996 { "Port1_3 Mixer", "DMIC1R Switch", "DMIC1 Right" },
997 { "Port1_3 Mixer", "DMIC2L Switch", "DMIC2 Left" },
998 { "Port1_3 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1000 { "Port1_4 Mixer", "ADCL Switch", "ADC Left" },
1001 { "Port1_4 Mixer", "ADCR Switch", "ADC Right" },
1002 { "Port1_4 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1003 { "Port1_4 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1004 { "Port1_4 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1005 { "Port1_4 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1007 { "Port1_5 Mixer", "ADCL Switch", "ADC Left" },
1008 { "Port1_5 Mixer", "ADCR Switch", "ADC Right" },
1009 { "Port1_5 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1010 { "Port1_5 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1011 { "Port1_5 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1012 { "Port1_5 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1014 { "Port1_6 Mixer", "ADCL Switch", "ADC Left" },
1015 { "Port1_6 Mixer", "ADCR Switch", "ADC Right" },
1016 { "Port1_6 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1017 { "Port1_6 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1018 { "Port1_6 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1019 { "Port1_6 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1021 { "Port1_7 Mixer", "ADCL Switch", "ADC Left" },
1022 { "Port1_7 Mixer", "ADCR Switch", "ADC Right" },
1023 { "Port1_7 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1024 { "Port1_7 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1025 { "Port1_7 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1026 { "Port1_7 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1028 { "Port1_8 Mixer", "ADCL Switch", "ADC Left" },
1029 { "Port1_8 Mixer", "ADCR Switch", "ADC Right" },
1030 { "Port1_8 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1031 { "Port1_8 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1032 { "Port1_8 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1033 { "Port1_8 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1035 { "Port2_1 Mixer", "ADCL Switch", "ADC Left" },
1036 { "Port2_1 Mixer", "ADCR Switch", "ADC Right" },
1037 { "Port2_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1038 { "Port2_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1039 { "Port2_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1040 { "Port2_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1042 { "Port2_2 Mixer", "ADCL Switch", "ADC Left" },
1043 { "Port2_2 Mixer", "ADCR Switch", "ADC Right" },
1044 { "Port2_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1045 { "Port2_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1046 { "Port2_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1047 { "Port2_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1061 { "PORT1_SDO", "Port1 Capture Switch", "P1_1_TX"},
1062 { "PORT1_SDO", "Port1 Capture Switch", "P1_2_TX"},
1063 { "PORT1_SDO", "Port1 Capture Switch", "P1_3_TX"},
1064 { "PORT1_SDO", "Port1 Capture Switch", "P1_4_TX"},
1065 { "PORT1_SDO", "Port1 Capture Switch", "P1_5_TX"},
1066 { "PORT1_SDO", "Port1 Capture Switch", "P1_6_TX"},
1067 { "PORT1_SDO", "Port1 Capture Switch", "P1_7_TX"},
1068 { "PORT1_SDO", "Port1 Capture Switch", "P1_8_TX"},
1070 { "PORT2_SDO", "Port2 Capture Switch", "P2_1_TX"},
1071 { "PORT2_SDO", "Port2 Capture Switch", "P2_2_TX"},
1103 { "Sidetone", "Sidetone Switch", "Sidetone Mixer" },
1114 switch (params_rate(params)) { in lm49453_hw_params()
1149 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { in lm49453_set_dai_fmt()
1168 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { in lm49453_set_dai_fmt()
1200 switch (freq) { in lm49453_set_dai_sysclk()
1261 switch (level) { in lm49453_set_bias_level()