Lines Matching +full:0 +full:x1e0
13 #define WM8766_REG_DACL1 0x00
14 #define WM8766_REG_DACR1 0x01
15 #define WM8766_VOL_MASK 0x1ff /* incl. update bit */
17 #define WM8766_REG_DACCTRL1 0x02
18 #define WM8766_DAC_MUTEALL (1 << 0)
23 #define WM8766_DAC_PL_MASK 0x1e0
30 #define WM8766_REG_IFCTRL 0x03
31 #define WM8766_IF_FMT_RIGHTJ (0 << 0)
32 #define WM8766_IF_FMT_LEFTJ (1 << 0)
33 #define WM8766_IF_FMT_I2S (2 << 0)
34 #define WM8766_IF_FMT_DSP (3 << 0)
38 #define WM8766_IF_IWL_16BIT (0 << 4)
42 #define WM8766_IF_MASK 0x3f
46 #define WM8766_REG_DACL2 0x04
47 #define WM8766_REG_DACR2 0x05
48 #define WM8766_REG_DACL3 0x06
49 #define WM8766_REG_DACR3 0x07
50 #define WM8766_REG_MASTDA 0x08
51 #define WM8766_REG_DACCTRL2 0x09
52 #define WM8766_DAC2_ZCD (1 << 0)
53 #define WM8766_DAC2_ZFLAG_ALL (0 << 1)
63 #define WM8766_REG_DACCTRL3 0x0a
68 #define WM8766_DAC3_POWER_MASK 0x1e
70 #define WM8766_DAC3_DAC128FS (0 << 6)
76 #define WM8766_DAC3_MSTR_MASK 0x1e0
77 #define WM8766_REG_MUTE1 0x0c
79 #define WM8766_REG_MUTE2 0x0f
81 #define WM8766_REG_RESET 0x1f
83 #define WM8766_REG_COUNT 0x10 /* don't cache the RESET register */
112 #define WM8766_FLAG_STEREO (1 << 0)