Lines Matching +full:multi +full:- +full:word
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/ak4xxx-adda.h>
27 #define ICEREG(ice, x) ((ice)->port + ICE1712_REG_##x)
31 #define ICE1712_SERR_ASSERT_DS_DMA 0x40 /* disabled SERR# assertion for the DS DMA Ch-C irq ot…
40 #define ICE1712_IRQ_PROPCM 0x10 /* professional multi-track */
41 #define ICE1712_IRQ_FM 0x08 /* FM/MIDI - legacy */
47 #define ICE1712_REG_INDEX 0x03 /* byte - indirect CCIxx regs */
48 #define ICE1712_REG_DATA 0x04 /* byte - indirect CCIxx regs */
61 #define ICE1712_REG_AC97_DATA 0x0a /* word (little endian) */
71 #define ICE1712_REG_CONCAP_ADDR 0x14 /* dword - consumer capture */
72 #define ICE1712_REG_CONCAP_COUNT 0x18 /* word - current/base count */
76 #define ICE1712_REG_TIMER 0x1e /* word */
104 #define ICEDS(ice, x) ((ice)->dmapath_port + ICE1712_DS_##x)
106 #define ICE1712_DS_INTMASK 0x00 /* word - interrupt mask */
107 #define ICE1712_DS_INTSTAT 0x02 /* word - interrupt status */
108 #define ICE1712_DS_DATA 0x04 /* dword - channel data */
109 #define ICE1712_DS_INDEX 0x08 /* dword - channel index */
115 #define ICE1712_DSC_ADDR0 0x00 /* dword - base address 0 */
116 #define ICE1712_DSC_COUNT0 0x01 /* word - count 0 */
117 #define ICE1712_DSC_ADDR1 0x02 /* dword - base address 1 */
118 #define ICE1712_DSC_COUNT1 0x03 /* word - count 1 */
119 #define ICE1712_DSC_CONTROL 0x04 /* byte - control & status */
125 #define ICE1712_16BIT 0x04 /* 16-bit data */
128 #define ICE1712_DSC_RATE 0x05 /* dword - rate */
129 #define ICE1712_DSC_VOLUME 0x06 /* word - volume control */
132 * Professional multi-track direct control registers
135 #define ICEMT(ice, x) ((ice)->profi_port + ICE1712_MT_##x)
137 #define ICE1712_MT_IRQ 0x00 /* byte - interrupt mask */
142 #define ICE1712_MT_RATE 0x01 /* byte - sampling rate select */
144 #define ICE1712_MT_I2S_FORMAT 0x02 /* byte - I2S data format */
145 #define ICE1712_MT_AC97_INDEX 0x04 /* byte - AC'97 index */
146 #define ICE1712_MT_AC97_CMD 0x05 /* byte - AC'97 command & status */
148 #define ICE1712_MT_AC97_DATA 0x06 /* word - AC'97 data */
149 #define ICE1712_MT_PLAYBACK_ADDR 0x10 /* dword - playback address */
150 #define ICE1712_MT_PLAYBACK_SIZE 0x14 /* word - playback size */
151 #define ICE1712_MT_PLAYBACK_COUNT 0x16 /* word - playback count */
152 #define ICE1712_MT_PLAYBACK_CONTROL 0x18 /* byte - control */
156 #define ICE1712_MT_CAPTURE_ADDR 0x20 /* dword - capture address */
157 #define ICE1712_MT_CAPTURE_SIZE 0x24 /* word - capture size */
158 #define ICE1712_MT_CAPTURE_COUNT 0x26 /* word - capture count */
159 #define ICE1712_MT_CAPTURE_CONTROL 0x28 /* byte - control */
161 #define ICE1712_MT_ROUTE_PSDOUT03 0x30 /* word */
162 #define ICE1712_MT_ROUTE_SPDOUT 0x32 /* word */
164 #define ICE1712_MT_MONITOR_VOLUME 0x38 /* word */
185 /* PCI[61] AC-Link Configuration */
187 #define ICE1712_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
191 #define ICE1712_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
214 unsigned int subvendor; /* PCI[2c-2f] */
248 #define ice_has_con_ac97(ice) (!((ice)->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97))
326 unsigned int has_spdif:1; /* VT1720/4 - has SPDIF I/O */
327 unsigned int force_pdma4:1; /* VT1720/4 - PDMA4 as non-spdif */
328 unsigned int force_rdma1:1; /* VT1720/4 - RDMA1 as non-spdif */
338 const struct snd_pcm_hw_constraint_list *hw_rates; /* card-specific rate constraints */
360 /* misc operators - move to another place? */
366 /* other board-specific data */
397 ice->gpio.set_dir(ice, bits); in snd_ice1712_gpio_set_dir()
402 return ice->gpio.get_dir(ice); in snd_ice1712_gpio_get_dir()
407 ice->gpio.set_mask(ice, bits); in snd_ice1712_gpio_set_mask()
412 ice->gpio.set_data(ice, val); in snd_ice1712_gpio_write()
417 return ice->gpio.get_data(ice); in snd_ice1712_gpio_read()
427 mutex_lock(&ice->gpio_mutex); in snd_ice1712_save_gpio_status()
428 ice->gpio.saved[0] = ice->gpio.direction; in snd_ice1712_save_gpio_status()
429 ice->gpio.saved[1] = ice->gpio.write_mask; in snd_ice1712_save_gpio_status()
434 ice->gpio.set_dir(ice, ice->gpio.saved[0]); in snd_ice1712_restore_gpio_status()
435 ice->gpio.set_mask(ice, ice->gpio.saved[1]); in snd_ice1712_restore_gpio_status()
436 ice->gpio.direction = ice->gpio.saved[0]; in snd_ice1712_restore_gpio_status()
437 ice->gpio.write_mask = ice->gpio.saved[1]; in snd_ice1712_restore_gpio_status()
438 mutex_unlock(&ice->gpio_mutex); in snd_ice1712_restore_gpio_status()
458 ice->gpio.direction |= mask; in snd_ice1712_gpio_write_bits()
459 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); in snd_ice1712_gpio_write_bits()
469 ice->gpio.direction &= ~mask; in snd_ice1712_gpio_read_bits()
470 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); in snd_ice1712_gpio_read_bits()