Lines Matching +full:multi +full:- +full:word
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
103 #define VT1724_REG_GPIO_DATA 0x14 /* word */
104 #define VT1724_REG_GPIO_WRITE_MASK 0x16 /* word */
106 bit3 - during reset used for Eeprom power-on strapping
114 * Professional multi-track direct control registers
117 #define ICEMT1724(ice, x) ((ice)->profi_port + VT1724_MT_##x)
119 #define VT1724_MT_IRQ 0x00 /* byte - interrupt mask */
129 #define VT1724_MT_RATE 0x01 /* byte - sampling rate select */
131 #define VT1724_MT_I2S_FORMAT 0x02 /* byte - I2S data format */
135 #define VT1724_MT_DMA_INT_MASK 0x03 /* byte -DMA Interrupt Mask */
137 #define VT1724_MT_AC97_INDEX 0x04 /* byte - AC'97 index */
138 #define VT1724_MT_AC97_CMD 0x05 /* byte - AC'97 command & status */
145 #define VT1724_MT_AC97_DATA 0x06 /* word - AC'97 data */
146 #define VT1724_MT_PLAYBACK_ADDR 0x10 /* dword - playback address */
147 #define VT1724_MT_PLAYBACK_SIZE 0x14 /* dword - playback size */
148 #define VT1724_MT_DMA_CONTROL 0x18 /* byte - control */
173 #define VT1724_MT_PLAYBACK_COUNT 0x1c /* word - playback count */
174 #define VT1724_MT_CAPTURE_ADDR 0x20 /* dword - capture address */
175 #define VT1724_MT_CAPTURE_SIZE 0x24 /* word - capture size */
176 #define VT1724_MT_CAPTURE_COUNT 0x26 /* word - capture count */
178 #define VT1724_MT_ROUTE_PLAYBACK 0x2c /* word */
180 #define VT1724_MT_RDMA1_ADDR 0x30 /* dword - RDMA1 capture address */
181 #define VT1724_MT_RDMA1_SIZE 0x34 /* word - RDMA1 capture size */
182 #define VT1724_MT_RDMA1_COUNT 0x36 /* word - RDMA1 capture count */
184 #define VT1724_MT_SPDIF_CTRL 0x3c /* word */
190 #define VT1724_MT_PDMA4_SIZE 0x44 /* word */
191 #define VT1724_MT_PDMA4_COUNT 0x46 /* word */
193 #define VT1724_MT_PDMA3_SIZE 0x54 /* word */
194 #define VT1724_MT_PDMA3_COUNT 0x56 /* word */
196 #define VT1724_MT_PDMA2_SIZE 0x64 /* word */
197 #define VT1724_MT_PDMA2_COUNT 0x66 /* word */
199 #define VT1724_MT_PDMA1_SIZE 0x74 /* word */
200 #define VT1724_MT_PDMA1_COUNT 0x76 /* word */