Lines Matching +full:0 +full:x43f00000
37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
59 #define WIDGET_CHIP_CTRL 0x15
60 #define WIDGET_DSP_CTRL 0x16
70 #define SCP_SET 0
107 #define VNODE_START_NID 0x80
117 #define EFFECT_START_NID 0x90
170 #define DSP_CAPTURE_INIT_LATENCY 0
181 int direct; /* 0:output; 1:input*/
187 #define EFX_DIR_OUT 0
193 .mid = 0x96,
194 .reqs = {0, 1},
197 .def_vals = {0x3F800000, 0x3F2B851F}
201 .mid = 0x96,
205 .def_vals = {0x3F800000, 0x3F266666}
209 .mid = 0x96,
213 .def_vals = {0x00000000, 0x3F000000}
217 .mid = 0x96,
221 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
225 .mid = 0x96,
229 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 .mid = 0x96,
238 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 .mid = 0x95,
245 .reqs = {0, 1, 2, 3},
248 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 .mid = 0x95,
256 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 .mid = 0x95,
264 .def_vals = {0x00000000, 0x3F3D70A4}
268 .mid = 0x95,
272 .def_vals = {0x3F800000, 0x3F000000}
276 .mid = 0x95,
280 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 0x00000000}
290 #define TUNING_CTL_START_NID 0xC0
313 int direct; /* 0:output; 1:input*/
321 .mid = 0x95,
324 .def_val = 0x41F00000
329 .mid = 0x95,
332 .def_val = 0x3F3D70A4
337 .mid = 0x96,
340 .def_val = 0x00000000
345 .mid = 0x96,
348 .def_val = 0x00000000
353 .mid = 0x96,
356 .def_val = 0x00000000
361 .mid = 0x96,
364 .def_val = 0x00000000
369 .mid = 0x96,
372 .def_val = 0x00000000
377 .mid = 0x96,
380 .def_val = 0x00000000
385 .mid = 0x96,
388 .def_val = 0x00000000
393 .mid = 0x96,
396 .def_val = 0x00000000
401 .mid = 0x96,
404 .def_val = 0x00000000
409 .mid = 0x96,
412 .def_val = 0x00000000
435 .mid = 0x95,
441 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 0x44FA0000, 0x3F800000, 0x3F800000,
443 0x3F800000, 0x00000000, 0x00000000 }
446 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 0x44FA0000, 0x3F19999A, 0x3F866666,
448 0x3F800000, 0x00000000, 0x00000000 }
451 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 0x450AC000, 0x4017AE14, 0x3F6B851F,
453 0x3F800000, 0x00000000, 0x00000000 }
456 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 0x44FA0000, 0x40400000, 0x3F28F5C3,
458 0x3F800000, 0x00000000, 0x00000000 }
461 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 0x44E10000, 0x3FB33333, 0x3FB9999A,
463 0x3F800000, 0x3E3A2E43, 0x00000000 }
466 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 0x45098000, 0x3F266666, 0x3FC00000,
468 0x3F800000, 0x00000000, 0x00000000 }
471 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 0x45193000, 0x3F8E147B, 0x3F75C28F,
473 0x3F800000, 0x00000000, 0x00000000 }
476 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 0x45007000, 0x3F451EB8, 0x3F7851EC,
478 0x3F800000, 0x00000000, 0x00000000 }
481 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 0x451F6000, 0x3F266666, 0x3FA7D945,
483 0x3F800000, 0x3CF5C28F, 0x00000000 }
486 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 0x44FA0000, 0x3FB2718B, 0x3F800000,
488 0xBC07010E, 0x00000000, 0x00000000 }
491 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 0x3F0A3D71, 0x00000000, 0x00000000 }
496 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 0x44FA0000, 0x3F800000, 0x3F800000,
498 0x3E4CCCCD, 0x00000000, 0x00000000 }
501 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 0x3F800000, 0x00000000, 0x00000000 }
506 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 0x44FA0000, 0x3F800000, 0x3F1A043C,
508 0x3F800000, 0x00000000, 0x00000000 }
531 .mid = 0x96,
538 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 0x00000000, 0x00000000, 0x00000000,
540 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000 }
544 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 0x40000000, 0x00000000, 0x00000000,
546 0x00000000, 0x00000000, 0x40000000,
547 0x40000000, 0x40000000 }
550 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 0x40C00000, 0x40466666, 0x00000000,
552 0x00000000, 0x00000000, 0x00000000,
553 0x40466666, 0x40466666 }
556 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 0x00000000, 0x00000000, 0x40000000,
559 0x40466666, 0x40800000 }
562 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 0x40466666, 0x40866666, 0xBF99999A,
564 0xBF99999A, 0x00000000, 0x00000000,
565 0x40800000, 0x40800000 }
568 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 0x3F8CCCCD, 0x40800000, 0x40800000,
570 0x40800000, 0x00000000, 0x3F8CCCCD,
571 0x40466666, 0x40466666 }
574 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 0x40000000, 0x00000000, 0x00000000,
576 0x00000000, 0x3F8CCCCD, 0x40000000,
577 0x40000000, 0x40000000 }
580 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 0x40000000, 0x40000000, 0x00000000,
582 0xBF99999A, 0xBF99999A, 0x00000000,
583 0x40466666, 0x40C00000 }
586 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 0xBF99999A, 0x00000000, 0x00000000,
589 0x40800000, 0x40800000 }
592 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 0xBF99999A, 0x00000000, 0x40466666,
594 0x40800000, 0x40466666, 0x00000000,
595 0x00000000, 0x3F8CCCCD }
607 SPEAKER_BASS_REDIRECT = 0x15,
608 SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 /* Between 0x16-0x1a are the X-Bass reqs. */
610 SPEAKER_FULL_RANGE_FRONT_L_R = 0x1a,
611 SPEAKER_FULL_RANGE_CENTER_LFE = 0x1b,
612 SPEAKER_FULL_RANGE_REAR_L_R = 0x1c,
613 SPEAKER_FULL_RANGE_SURROUND_L_R = 0x1d,
614 SPEAKER_BASS_REDIRECT_SUB_GAIN = 0x1e,
619 * module ID 0x96, the output effects module.
625 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 SPEAKER_TUNING_USE_SPEAKER_EQ = 0x1f,
636 SPEAKER_TUNING_ENABLE_CENTER_EQ = 0x20,
637 SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL = 0x21,
638 SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL = 0x22,
639 SPEAKER_TUNING_CENTER_VOL_LEVEL = 0x23,
640 SPEAKER_TUNING_LFE_VOL_LEVEL = 0x24,
641 SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL = 0x25,
642 SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL = 0x26,
643 SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL = 0x27,
644 SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 SPEAKER_TUNING_FRONT_LEFT_INVERT = 0x29,
650 SPEAKER_TUNING_FRONT_RIGHT_INVERT = 0x2a,
651 SPEAKER_TUNING_CENTER_INVERT = 0x2b,
652 SPEAKER_TUNING_LFE_INVERT = 0x2c,
653 SPEAKER_TUNING_REAR_LEFT_INVERT = 0x2d,
654 SPEAKER_TUNING_REAR_RIGHT_INVERT = 0x2e,
655 SPEAKER_TUNING_SURROUND_LEFT_INVERT = 0x2f,
656 SPEAKER_TUNING_SURROUND_RIGHT_INVERT = 0x30,
658 SPEAKER_TUNING_FRONT_LEFT_DELAY = 0x31,
659 SPEAKER_TUNING_FRONT_RIGHT_DELAY = 0x32,
660 SPEAKER_TUNING_CENTER_DELAY = 0x33,
661 SPEAKER_TUNING_LFE_DELAY = 0x34,
662 SPEAKER_TUNING_REAR_LEFT_DELAY = 0x35,
663 SPEAKER_TUNING_REAR_RIGHT_DELAY = 0x36,
664 SPEAKER_TUNING_SURROUND_LEFT_DELAY = 0x37,
665 SPEAKER_TUNING_SURROUND_RIGHT_DELAY = 0x38,
667 SPEAKER_TUNING_MAIN_VOLUME = 0x39,
668 SPEAKER_TUNING_MUTE = 0x3a,
709 #define DSP_VOL_OUT 0
720 .mid = 0x32,
724 .mid = 0x37,
738 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 .target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 .vals = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
764 .vals = { 0xff, 0x2c, 0xf5, 0x32 }
767 .vals = { 0x38, 0xa8, 0x3e, 0x4c }
770 .vals = { 0xff, 0xff, 0xff, 0x7f }
781 .val = 0xa0
784 .val = 0xc0
787 .val = 0x80
793 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
794 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
796 VENDOR_DSPIO_STATUS = 0xF01,
797 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
798 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
799 VENDOR_DSPIO_DSP_INIT = 0x703,
800 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
801 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
804 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
805 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
806 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
807 VENDOR_CHIPIO_DATA_LOW = 0x300,
808 VENDOR_CHIPIO_DATA_HIGH = 0x400,
810 VENDOR_CHIPIO_8051_WRITE_DIRECT = 0x500,
811 VENDOR_CHIPIO_8051_READ_DIRECT = 0xD00,
813 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
814 VENDOR_CHIPIO_STATUS = 0xF01,
815 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
816 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
818 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
819 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
820 VENDOR_CHIPIO_8051_PMEM_READ = 0xF08,
821 VENDOR_CHIPIO_8051_IRAM_WRITE = 0x709,
822 VENDOR_CHIPIO_8051_IRAM_READ = 0xF09,
824 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
825 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
827 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
828 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
829 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
830 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
831 VENDOR_CHIPIO_FLAG_SET = 0x70F,
832 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
833 VENDOR_CHIPIO_PARAM_SET = 0x710,
834 VENDOR_CHIPIO_PARAM_GET = 0xF10,
836 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
837 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
838 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
839 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
841 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
842 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
843 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
844 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
846 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
847 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
848 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
849 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
850 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
851 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
853 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
861 CONTROL_FLAG_C_MGR = 0,
918 /* 0: None, 1: Mic1In*/
920 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
966 VENDOR_STATUS_DSPIO_OK = 0x00,
968 VENDOR_STATUS_DSPIO_BUSY = 0x01,
970 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
972 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
980 VENDOR_STATUS_CHIPIO_OK = 0x00,
982 VENDOR_STATUS_CHIPIO_BUSY = 0x01
989 SR_6_000 = 0x00,
990 SR_8_000 = 0x01,
991 SR_9_600 = 0x02,
992 SR_11_025 = 0x03,
993 SR_16_000 = 0x04,
994 SR_22_050 = 0x05,
995 SR_24_000 = 0x06,
996 SR_32_000 = 0x07,
997 SR_44_100 = 0x08,
998 SR_48_000 = 0x09,
999 SR_88_200 = 0x0A,
1000 SR_96_000 = 0x0B,
1001 SR_144_000 = 0x0C,
1002 SR_176_400 = 0x0D,
1003 SR_192_000 = 0x0E,
1004 SR_384_000 = 0x0F,
1006 SR_COUNT = 0x10,
1008 SR_RATE_UNKNOWN = 0x1F
1013 DSP_DOWNLOAD_INIT = 0,
1019 #define get_hdafmt_chs(fmt) (fmt & 0xf)
1020 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
1021 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
1022 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
1160 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1161 { 0x0c, 0x411111f0 }, /* N/A */
1162 { 0x0d, 0x411111f0 }, /* N/A */
1163 { 0x0e, 0x411111f0 }, /* N/A */
1164 { 0x0f, 0x0321101f }, /* HP */
1165 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1166 { 0x11, 0x03a11021 }, /* Mic */
1167 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1168 { 0x13, 0x411111f0 }, /* N/A */
1169 { 0x18, 0x411111f0 }, /* N/A */
1175 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1176 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1177 { 0x0d, 0x014510f0 }, /* Digital Out */
1178 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1179 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1180 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1181 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1182 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1183 { 0x13, 0x908700f0 }, /* What U Hear In*/
1184 { 0x18, 0x50d000f0 }, /* N/A */
1190 { 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1191 { 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1192 { 0x0d, 0x014510f0 }, /* Digital Out */
1193 { 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1194 { 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1195 { 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1196 { 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1197 { 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1198 { 0x13, 0x908700f0 }, /* What U Hear In*/
1199 { 0x18, 0x50d000f0 }, /* N/A */
1205 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1206 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1207 { 0x0d, 0x014510f0 }, /* Digital Out */
1208 { 0x0e, 0x01c520f0 }, /* SPDIF In */
1209 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1210 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1211 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1212 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1213 { 0x13, 0x908700f0 }, /* What U Hear In*/
1214 { 0x18, 0x50d000f0 }, /* N/A */
1220 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1221 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1222 { 0x0d, 0x014510f0 }, /* Digital Out */
1223 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1224 { 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1225 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1226 { 0x11, 0x01a170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1227 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1228 { 0x13, 0x908700f0 }, /* What U Hear In*/
1229 { 0x18, 0x50d000f0 }, /* N/A */
1235 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1236 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1237 { 0x0d, 0x014510f0 }, /* Digital Out */
1238 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1239 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1240 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1241 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1242 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1243 { 0x13, 0x908700f0 }, /* What U Hear In*/
1244 { 0x18, 0x500000f0 }, /* N/A */
1249 { 0x0b, 0x01017010 },
1250 { 0x0c, 0x014510f0 },
1251 { 0x0d, 0x414510f0 },
1252 { 0x0e, 0x01c520f0 },
1253 { 0x0f, 0x01017114 },
1254 { 0x10, 0x01017011 },
1255 { 0x11, 0x018170ff },
1256 { 0x12, 0x01a170f0 },
1257 { 0x13, 0x908700f0 },
1258 { 0x18, 0x500000f0 },
1263 SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1264 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1265 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1266 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1267 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1268 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1269 SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1270 SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1271 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1272 SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1273 SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1274 SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1275 SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1276 SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1277 SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1278 SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1286 unsigned int dac2port; /* ParamID 0x0d value. */
1321 { .dac2port = 0x24,
1325 .mmio_gpio_count = 0,
1326 .scp_cmds_count = 0,
1330 { .dac2port = 0x21,
1333 .hda_gpio_set = 0,
1334 .mmio_gpio_count = 0,
1335 .scp_cmds_count = 0,
1344 { .dac2port = 0x24,
1349 .scp_cmds_count = 0,
1353 { .dac2port = 0x21,
1357 .mmio_gpio_set = { 0 },
1358 .scp_cmds_count = 0,
1367 { .dac2port = 0x18,
1371 .mmio_gpio_set = { 0, 1, 1 },
1372 .scp_cmds_count = 0,
1375 { .dac2port = 0x12,
1379 .mmio_gpio_set = { 1, 1, 0 },
1380 .scp_cmds_count = 0,
1389 { .dac2port = 0x24,
1393 .mmio_gpio_set = { 1, 1, 0 },
1394 .scp_cmds_count = 0,
1398 { .dac2port = 0x21,
1402 .mmio_gpio_set = { 0, 1, 1 },
1403 .scp_cmds_count = 0,
1412 { .dac2port = 0xa4,
1414 .mmio_gpio_count = 0,
1416 .scp_cmd_mid = { 0x96, 0x96 },
1421 .chipio_write_addr = 0x0018b03c,
1422 .chipio_write_data = 0x00000012
1425 { .dac2port = 0xa1,
1427 .mmio_gpio_count = 0,
1429 .scp_cmd_mid = { 0x96, 0x96 },
1434 .chipio_write_addr = 0x0018b03c,
1435 .chipio_write_data = 0x00000012
1443 { .dac2port = 0x58,
1446 .mmio_gpio_pin = { 0 },
1449 .scp_cmd_mid = { 0x96, 0x96 },
1454 .chipio_write_addr = 0x0018b03c,
1455 .chipio_write_data = 0x00000000
1458 { .dac2port = 0x58,
1461 .mmio_gpio_pin = { 0 },
1464 .scp_cmd_mid = { 0x96, 0x96 },
1469 .chipio_write_addr = 0x0018b03c,
1470 .chipio_write_data = 0x00000010
1482 response = snd_hda_codec_read(codec, nid, 0, verb, parm); in codec_send_command()
1485 return ((response == -1) ? -1 : 0); in codec_send_command()
1492 converter_format & 0xffff, res); in codec_set_converter_format()
1499 unsigned char converter_stream_channel = 0; in codec_set_converter_stream_channel()
1501 converter_stream_channel = (stream << 4) | (channel & 0x0f); in codec_set_converter_stream_channel()
1516 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_send()
1519 return 0; in chipio_send()
1536 return 0; in chipio_write_address()
1540 chip_addx & 0xffff); in chipio_write_address()
1548 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx; in chipio_write_address()
1562 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); in chipio_write_data()
1573 (spec->curr_chip_addx + 4) : ~0U; in chipio_write_data()
1584 int status = 0; in chipio_write_data_multiple()
1591 while ((count-- != 0) && (status == 0)) in chipio_write_data_multiple()
1607 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); in chipio_read_data()
1611 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in chipio_read_data()
1616 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in chipio_read_data()
1618 0); in chipio_read_data()
1624 (spec->curr_chip_addx + 4) : ~0U; in chipio_read_data()
1642 if (err < 0) in chipio_write()
1646 if (err < 0) in chipio_write()
1666 if (err < 0) in chipio_write_no_mutex()
1670 if (err < 0) in chipio_write_no_mutex()
1691 if (status < 0) in chipio_write_multiple()
1715 if (err < 0) in chipio_read()
1719 if (err < 0) in chipio_read()
1737 flag_bit = (flag_state ? 1 : 0); in chipio_set_control_flag()
1739 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_flag()
1754 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1758 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param()
1759 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1762 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param()
1780 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1783 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) { in chipio_set_control_param_no_mutex()
1784 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1787 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_set_control_param_no_mutex()
1859 * 0x80-0xFF.
1867 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr); in chipio_8051_write_direct()
1878 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1879 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0); in chipio_enable_clocks()
1880 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1881 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1882 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1884 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1885 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b); in chipio_enable_clocks()
1886 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1888 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in chipio_enable_clocks()
1889 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); in chipio_enable_clocks()
1904 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); in dspio_send()
1905 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) in dspio_send()
1922 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write_wait()
1923 VENDOR_DSPIO_STATUS, 0); in dspio_write_wait()
1943 scp_data & 0xffff); in dspio_write()
1944 if (status < 0) in dspio_write()
1949 if (status < 0) in dspio_write()
1953 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_write()
1954 VENDOR_DSPIO_STATUS, 0); in dspio_write()
1959 -EIO : 0; in dspio_write()
1968 int status = 0; in dspio_write_multiple()
1974 count = 0; in dspio_write_multiple()
1977 if (status != 0) in dspio_write_multiple()
1989 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); in dspio_read()
1993 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); in dspio_read()
1998 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, in dspio_read()
1999 VENDOR_DSPIO_SCP_READ_DATA, 0); in dspio_read()
2001 return 0; in dspio_read()
2007 int status = 0; in dspio_read_multiple()
2016 count = 0; in dspio_read_multiple()
2019 if (status != 0) in dspio_read_multiple()
2025 if (status == 0) { in dspio_read_multiple()
2028 if (status != 0) in dspio_read_multiple()
2047 unsigned int header = 0; in make_scp_header()
2049 header = (data_size & 0x1f) << 27; in make_scp_header()
2050 header |= (error_flag & 0x01) << 26; in make_scp_header()
2051 header |= (resp_flag & 0x01) << 25; in make_scp_header()
2052 header |= (device_flag & 0x01) << 24; in make_scp_header()
2053 header |= (req & 0x7f) << 17; in make_scp_header()
2054 header |= (get_flag & 0x01) << 16; in make_scp_header()
2055 header |= (source_id & 0xff) << 8; in make_scp_header()
2056 header |= target_id & 0xff; in make_scp_header()
2072 *data_size = (header >> 27) & 0x1f; in extract_scp_header()
2074 *error_flag = (header >> 26) & 0x01; in extract_scp_header()
2076 *resp_flag = (header >> 25) & 0x01; in extract_scp_header()
2078 *device_flag = (header >> 24) & 0x01; in extract_scp_header()
2080 *req = (header >> 17) & 0x7f; in extract_scp_header()
2082 *get_flag = (header >> 16) & 0x01; in extract_scp_header()
2084 *source_id = (header >> 8) & 0xff; in extract_scp_header()
2086 *target_id = header & 0xff; in extract_scp_header()
2100 unsigned int dummy = 0; in dspio_clear_response_queue()
2106 } while (status == 0 && time_before(jiffies, timeout)); in dspio_clear_response_queue()
2112 unsigned int data = 0; in dspio_get_response_data()
2115 if (dspio_read(codec, &data) < 0) in dspio_get_response_data()
2118 if ((data & 0x00ffffff) == spec->wait_scp_header) { in dspio_get_response_data()
2124 return 0; in dspio_get_response_data()
2142 unsigned int scp_send_size = 0; in dspio_send_scp_message()
2151 *bytes_returned = 0; in dspio_send_scp_message()
2172 spec->wait_scp_header &= 0xffff0000; in dspio_send_scp_message()
2181 if (status < 0) { in dspio_send_scp_message()
2182 spec->wait_scp = 0; in dspio_send_scp_message()
2188 memset(return_buf, 0, return_buf_size); in dspio_send_scp_message()
2199 status = 0; in dspio_send_scp_message()
2203 spec->wait_scp = 0; in dspio_send_scp_message()
2227 int status = 0; in dspio_scp()
2233 memset(&scp_send, 0, sizeof(scp_send)); in dspio_scp()
2234 memset(&scp_reply, 0, sizeof(scp_reply)); in dspio_scp()
2236 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) in dspio_scp()
2244 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { in dspio_scp()
2250 0, 0, 0, len/sizeof(unsigned int)); in dspio_scp()
2251 if (data != NULL && len > 0) { in dspio_scp()
2256 ret_bytes = 0; in dspio_scp()
2262 if (status < 0) { in dspio_scp()
2275 return 0; in dspio_scp()
2315 return dspio_set_param(codec, mod_id, 0x20, req, &data, in dspio_set_uint_param()
2322 return dspio_set_param(codec, mod_id, 0x00, req, &data, in dspio_set_uint_param_no_source()
2331 int status = 0; in dspio_alloc_dma_chan()
2335 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_alloc_dma_chan()
2336 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0, in dspio_alloc_dma_chan()
2339 if (status < 0) { in dspio_alloc_dma_chan()
2344 if ((*dma_chan + 1) == 0) { in dspio_alloc_dma_chan()
2360 int status = 0; in dspio_free_dma_chan()
2361 unsigned int dummy = 0; in dspio_free_dma_chan()
2366 status = dspio_scp(codec, MASTERCONTROL, 0x20, in dspio_free_dma_chan()
2370 if (status < 0) { in dspio_free_dma_chan()
2390 if (err < 0) in dsp_set_run_state()
2396 if (halt_state != 0) { in dsp_set_run_state()
2401 if (err < 0) in dsp_set_run_state()
2408 if (err < 0) in dsp_set_run_state()
2412 return 0; in dsp_set_run_state()
2425 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); in dsp_reset()
2434 return 0; in dsp_reset()
2468 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); in dsp_is_dma_active()
2477 int status = 0; in dsp_dma_setup_common()
2503 active = 0; in dsp_dma_setup_common()
2511 if (status < 0) { in dsp_dma_setup_common()
2526 if (status < 0) { in dsp_dma_setup_common()
2536 if (status < 0) { in dsp_dma_setup_common()
2547 if (status < 0) { in dsp_dma_setup_common()
2556 if (status < 0) { in dsp_dma_setup_common()
2564 if (status < 0) { in dsp_dma_setup_common()
2571 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " in dsp_dma_setup_common()
2572 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", in dsp_dma_setup_common()
2578 return 0; in dsp_dma_setup_common()
2589 int status = 0; in dsp_dma_setup()
2596 unsigned int dma_cfg = 0; in dsp_dma_setup()
2597 unsigned int adr_ofs = 0; in dsp_dma_setup()
2598 unsigned int xfr_cnt = 0; in dsp_dma_setup()
2618 incr_field = 0; in dsp_dma_setup()
2631 if (status < 0) { in dsp_dma_setup()
2638 (code ? 0 : 1)); in dsp_dma_setup()
2642 if (status < 0) { in dsp_dma_setup()
2656 if (status < 0) { in dsp_dma_setup()
2663 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " in dsp_dma_setup()
2664 "ADROFS=0x%x, XFRCNT=0x%x\n", in dsp_dma_setup()
2669 return 0; in dsp_dma_setup()
2678 unsigned int reg = 0; in dsp_dma_start()
2679 int status = 0; in dsp_dma_start()
2687 if (status < 0) { in dsp_dma_start()
2699 if (status < 0) { in dsp_dma_start()
2714 unsigned int reg = 0; in dsp_dma_stop()
2715 int status = 0; in dsp_dma_stop()
2723 if (status < 0) { in dsp_dma_stop()
2734 if (status < 0) { in dsp_dma_stop()
2760 int status = 0; in dsp_allocate_router_ports()
2764 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2765 if (status < 0) in dsp_allocate_router_ports()
2772 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2776 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2780 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_allocate_router_ports()
2781 if (status < 0) in dsp_allocate_router_ports()
2784 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, in dsp_allocate_router_ports()
2785 VENDOR_CHIPIO_PORT_ALLOC_GET, 0); in dsp_allocate_router_ports()
2789 return (res < 0) ? res : 0; in dsp_allocate_router_ports()
2797 int status = 0; in dsp_free_router_ports()
2799 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2800 if (status < 0) in dsp_free_router_ports()
2803 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in dsp_free_router_ports()
2807 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); in dsp_free_router_ports()
2829 rate_multi, 0, port_map); in dsp_allocate_ports()
2843 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; in dsp_allocate_ports_format()
2869 if (status < 0) { in dsp_free_ports()
2890 DMA_STATE_STOP = 0,
2902 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0); in dma_convert_to_hda_format()
2907 return 0; in dma_convert_to_hda_format()
2926 if (status < 0) in dma_reset()
2929 return 0; in dma_reset()
2944 return 0; in dma_set_state()
2948 return 0; in dma_set_state()
2966 return 0; in dma_xfer()
2991 static const u32 g_magic_value = 0x4c46584d;
2992 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
3006 return p->count == 0; in is_last()
3023 #define INVALID_DMA_CHANNEL (~0U)
3045 status = chipio_write(codec, data[0], data[1]); in dspxfr_hci_write()
3046 if (status < 0) { in dspxfr_hci_write()
3053 return 0; in dspxfr_hci_write()
3062 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3079 int status = 0; in dspxfr_one_seg()
3111 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { in dspxfr_one_seg()
3121 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0; in dspxfr_one_seg()
3123 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); in dspxfr_one_seg()
3143 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; in dspxfr_one_seg()
3147 hda_frame_size_words = ((sample_rate_div == 0) ? 0 : in dspxfr_one_seg()
3150 if (hda_frame_size_words == 0) { in dspxfr_one_seg()
3160 "chpadr=0x%08x frmsz=%u nchan=%u " in dspxfr_one_seg()
3178 while (words_to_write != 0) { in dspxfr_one_seg()
3185 if (status < 0) in dspxfr_one_seg()
3189 if (status < 0) in dspxfr_one_seg()
3196 if (status < 0) in dspxfr_one_seg()
3199 if (status < 0) in dspxfr_one_seg()
3206 if (status < 0) in dspxfr_one_seg()
3208 if (remainder_words != 0) { in dspxfr_one_seg()
3213 if (status < 0) in dspxfr_one_seg()
3215 remainder_words = 0; in dspxfr_one_seg()
3219 if (status < 0) in dspxfr_one_seg()
3238 if (status < 0) in dspxfr_one_seg()
3246 if (remainder_words != 0) { in dspxfr_one_seg()
3259 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3276 unsigned short hda_format = 0; in dspxfr_image()
3278 unsigned char stream_id = 0; in dspxfr_image()
3302 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0; in dspxfr_image()
3307 if (status < 0) { in dspxfr_image()
3316 if (status < 0) in dspxfr_image()
3322 if (status < 0) { in dspxfr_image()
3329 port_map_mask = 0; in dspxfr_image()
3332 if (status < 0) { in dspxfr_image()
3339 WIDGET_CHIP_CTRL, stream_id, 0, &response); in dspxfr_image()
3340 if (status < 0) { in dspxfr_image()
3354 if (status < 0) in dspxfr_image()
3364 if (port_map_mask != 0) in dspxfr_image()
3367 if (status < 0) in dspxfr_image()
3371 WIDGET_CHIP_CTRL, 0, 0, &response); in dspxfr_image()
3394 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); in dspload_post_setup()
3395 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); in dspload_post_setup()
3398 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); in dspload_post_setup()
3408 * @reloc: Relocation address for loading single-segment overlays, or 0 for
3411 * @router_chans: number of audio router channels to be allocated (0 means use
3427 int status = 0; in dspload_image()
3432 if (router_chans == 0) { in dspload_image()
3452 if (status < 0) in dspload_image()
3459 if (status < 0) in dspload_image()
3469 } while (0); in dspload_image()
3477 unsigned int data = 0; in dspload_is_loaded()
3478 int status = 0; in dspload_is_loaded()
3480 status = chipio_read(codec, 0x40004, &data); in dspload_is_loaded()
3481 if ((status < 0) || (data != 1)) in dspload_is_loaded()
3514 * the mmio address 0x320 is used to set GPIO pins. The format for the data
3527 gpio_data = gpio_pin & 0xF; in ca0113_mmio_gpio_set()
3528 gpio_data |= ((enable << 8) & 0x100); in ca0113_mmio_gpio_set()
3530 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3547 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3548 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3549 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3550 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3551 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3553 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3554 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3556 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3557 write_val = (target & 0xff); in ca0113_mmio_command_set()
3561 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3567 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3568 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3569 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3571 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3572 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3573 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3574 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3586 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3587 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3588 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3589 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3590 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3592 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3593 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3595 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3596 write_val = (target & 0xff); in ca0113_mmio_command_set_type2()
3600 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3602 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3603 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3604 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3606 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3607 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3608 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3609 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3628 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3629 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ca0132_gpio_init()
3630 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23); in ca0132_gpio_init()
3633 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ca0132_gpio_init()
3634 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); in ca0132_gpio_init()
3649 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3650 AC_VERB_SET_GPIO_DIRECTION, 0x07); in ca0132_gpio_setup()
3651 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3652 AC_VERB_SET_GPIO_MASK, 0x07); in ca0132_gpio_setup()
3653 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3654 AC_VERB_SET_GPIO_DATA, 0x04); in ca0132_gpio_setup()
3655 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3656 AC_VERB_SET_GPIO_DATA, 0x06); in ca0132_gpio_setup()
3659 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3660 AC_VERB_SET_GPIO_DIRECTION, 0x1E); in ca0132_gpio_setup()
3661 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3662 AC_VERB_SET_GPIO_MASK, 0x1F); in ca0132_gpio_setup()
3663 snd_hda_codec_write(codec, 0x01, 0, in ca0132_gpio_setup()
3664 AC_VERB_SET_GPIO_DATA, 0x0C); in ca0132_gpio_setup()
3676 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3678 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3693 /* Set GPIO bit 1 to 0 for rear mic */
3694 R3DI_REAR_MIC = 0,
3700 /* Set GPIO bit 2 to 0 for headphone */
3701 R3DI_HEADPHONE_OUT = 0,
3707 R3DI_DSP_DOWNLOADING = 0,
3719 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_mic_set()
3729 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_mic_set()
3739 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0); in r3di_gpio_dsp_status_set()
3744 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3748 /* Set DOWNLOADING bit to 0. */ in r3di_gpio_dsp_status_set()
3751 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3758 snd_hda_codec_write(codec, codec->core.afg, 0, in r3di_gpio_dsp_status_set()
3773 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); in ca0132_playback_pcm_prepare()
3775 return 0; in ca0132_playback_pcm_prepare()
3785 return 0; in ca0132_playback_pcm_cleanup()
3792 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_playback_pcm_cleanup()
3794 return 0; in ca0132_playback_pcm_cleanup()
3806 return 0; in ca0132_playback_pcm_delay()
3870 stream_tag, 0, format); in ca0132_capture_pcm_prepare()
3872 return 0; in ca0132_capture_pcm_prepare()
3882 return 0; in ca0132_capture_pcm_cleanup()
3885 return 0; in ca0132_capture_pcm_cleanup()
3897 return 0; in ca0132_capture_pcm_delay()
3923 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3941 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3950 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3970 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
3971 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
3972 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
3973 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
3974 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
3975 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
3976 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
3977 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
3978 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
3979 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
3980 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
3981 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
3982 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
3983 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
3984 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
3985 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
3986 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
3990 * This table counts from float 0 to 1 in increments of .01, which is
3994 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
3995 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
3996 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
3997 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
3998 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
3999 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4000 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4001 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4002 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4003 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4004 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4005 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4006 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4007 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4008 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4009 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4010 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4018 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4019 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4020 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4021 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4022 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4023 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4024 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4025 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4026 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4027 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4028 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4029 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4030 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4031 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4032 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4033 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4034 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4041 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4042 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4043 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4044 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4045 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4046 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4047 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4048 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4049 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4050 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4051 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4052 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4053 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4054 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4055 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4056 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4057 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4058 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4059 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4060 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4061 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4062 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4063 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4064 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4065 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4066 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4067 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4071 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4072 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4073 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4074 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4075 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4076 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4077 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4078 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4079 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4080 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4081 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4082 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4083 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4084 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4085 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4086 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4087 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4091 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4092 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4093 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4094 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4095 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4096 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4097 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4098 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4099 0x41C00000
4105 int i = 0; in tuning_ctl_set()
4107 for (i = 0; i < TUNING_CTLS_COUNT; i++) in tuning_ctl_set()
4112 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20, in tuning_ctl_set()
4130 return 0; in tuning_ctl_get()
4143 return 0; in voice_focus_ctl_info()
4158 return 0; in voice_focus_ctl_put()
4174 uinfo->value.integer.min = 0; in mic_svm_ctl_info()
4178 return 0; in mic_svm_ctl_info()
4193 return 0; in mic_svm_ctl_put()
4200 return 0; in mic_svm_ctl_put()
4209 uinfo->value.integer.min = 0; in equalizer_ctl_info()
4213 return 0; in equalizer_ctl_info()
4228 return 0; in equalizer_ctl_put()
4238 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4239 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4248 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in add_tuning_control()
4252 knew.tlv.c = 0; in add_tuning_control()
4253 knew.tlv.p = 0; in add_tuning_control()
4273 return 0; in add_tuning_control()
4276 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in add_tuning_control()
4286 for (i = 0; i < TUNING_CTLS_COUNT; i++) { in add_tuning_ctls()
4292 if (err < 0) in add_tuning_ctls()
4296 return 0; in add_tuning_ctls()
4309 /* EQ defaults to 0dB. */ in ca0132_init_tuning_defaults()
4351 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4352 if (err < 0) in ca0132_select_out()
4356 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4357 if (err < 0) in ca0132_select_out()
4361 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4362 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4363 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4364 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4365 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4366 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4367 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4368 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4371 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4372 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4376 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4377 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4378 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4384 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_select_out()
4385 if (err < 0) in ca0132_select_out()
4389 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp); in ca0132_select_out()
4390 if (err < 0) in ca0132_select_out()
4394 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4395 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00); in ca0132_select_out()
4396 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4397 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_select_out()
4398 snd_hda_codec_write(codec, spec->out_pins[1], 0, in ca0132_select_out()
4399 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02); in ca0132_select_out()
4400 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_select_out()
4401 AC_VERB_SET_EAPD_BTLENABLE, 0x02); in ca0132_select_out()
4404 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, in ca0132_select_out()
4405 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4406 snd_hda_set_pin_ctl(codec, spec->out_pins[0], in ca0132_select_out()
4409 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, in ca0132_select_out()
4410 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_select_out()
4418 return err < 0 ? err : 0; in ca0132_select_out()
4436 for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++) in ae5_mmio_select_out()
4452 return 0; in ca0132_alt_set_full_range_speaker()
4455 tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE; in ca0132_alt_set_full_range_speaker()
4456 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4458 if (err < 0) in ca0132_alt_set_full_range_speaker()
4463 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4465 if (err < 0) in ca0132_alt_set_full_range_speaker()
4468 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4470 if (err < 0) in ca0132_alt_set_full_range_speaker()
4478 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_set_full_range_speaker()
4480 if (err < 0) in ca0132_alt_set_full_range_speaker()
4484 return 0; in ca0132_alt_set_full_range_speaker()
4500 err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp); in ca0132_alt_surround_set_bass_redirection()
4501 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4507 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_surround_set_bass_redirection()
4509 if (err < 0) in ca0132_alt_surround_set_bass_redirection()
4513 return 0; in ca0132_alt_surround_set_bass_redirection()
4528 for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) { in ca0132_alt_select_out_get_quirk_data()
4546 return 0; in ca0132_alt_select_out_quirk_set()
4553 gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4554 AC_VERB_GET_GPIO_DATA, 0); in ca0132_alt_select_out_quirk_set()
4561 snd_hda_codec_write(codec, codec->core.afg, 0, in ca0132_alt_select_out_quirk_set()
4566 for (i = 0; i < out_info->mmio_gpio_count; i++) { in ca0132_alt_select_out_quirk_set()
4573 for (i = 0; i < out_info->scp_cmds_count; i++) { in ca0132_alt_select_out_quirk_set()
4578 if (err < 0) in ca0132_alt_select_out_quirk_set()
4583 chipio_set_control_param(codec, 0x0d, out_info->dac2port); in ca0132_alt_select_out_quirk_set()
4595 zxr_headphone_gain_set(codec, 0); in ca0132_alt_select_out_quirk_set()
4606 return 0; in ca0132_alt_select_out_quirk_set()
4614 pin_ctl = snd_hda_codec_read(codec, nid, 0, in ca0132_set_out_node_pincfg()
4615 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in ca0132_set_out_node_pincfg()
4665 err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE); in ca0132_alt_select_out()
4666 if (err < 0) in ca0132_alt_select_out()
4669 if (ca0132_alt_select_out_quirk_set(codec) < 0) in ca0132_alt_select_out()
4677 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4678 AC_VERB_SET_EAPD_BTLENABLE, 0x01); in ca0132_alt_select_out()
4681 ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0); in ca0132_alt_select_out()
4683 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0); in ca0132_alt_select_out()
4685 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0); in ca0132_alt_select_out()
4687 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0); in ca0132_alt_select_out()
4699 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); in ca0132_alt_select_out()
4700 if (err < 0) in ca0132_alt_select_out()
4706 snd_hda_codec_write(codec, spec->out_pins[0], 0, in ca0132_alt_select_out()
4707 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in ca0132_alt_select_out()
4710 ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0); in ca0132_alt_select_out()
4711 ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0); in ca0132_alt_select_out()
4712 ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0); in ca0132_alt_select_out()
4723 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE); in ca0132_alt_select_out()
4725 err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO); in ca0132_alt_select_out()
4727 if (err < 0) in ca0132_alt_select_out()
4740 /* Set speaker EQ bypass attenuation to 0. */ in ca0132_alt_select_out()
4741 err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO); in ca0132_alt_select_out()
4742 if (err < 0) in ca0132_alt_select_out()
4749 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4751 if (err < 0) in ca0132_alt_select_out()
4758 err = ca0132_alt_surround_set_bass_redirection(codec, 0); in ca0132_alt_select_out()
4761 err = dspio_set_uint_param(codec, 0x96, in ca0132_alt_select_out()
4763 if (err < 0) in ca0132_alt_select_out()
4768 if (err < 0) in ca0132_alt_select_out()
4775 return err < 0 ? err : 0; in ca0132_alt_select_out()
4791 jack->block_report = 0; in ca0132_unsol_hp_delayed()
4812 return 0; in ca0132_set_vipsource()
4814 /* if CrystalVoice if off, vipsource should be 0 */ in ca0132_set_vipsource()
4816 (val == 0)) { in ca0132_set_vipsource()
4817 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_set_vipsource()
4824 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4826 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4834 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_vipsource()
4836 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_set_vipsource()
4850 return 0; in ca0132_alt_set_vipsource()
4854 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_set_vipsource()
4855 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_set_vipsource()
4857 /* if CrystalVoice is off, vipsource should be 0 */ in ca0132_alt_set_vipsource()
4859 (val == 0) || spec->in_enum_val == REAR_LINE_IN) { in ca0132_alt_set_vipsource()
4861 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_alt_set_vipsource()
4864 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4869 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_set_vipsource()
4881 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4888 chipio_set_conn_rate(codec, 0x0F, SR_16_000); in ca0132_alt_set_vipsource()
4894 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_set_vipsource()
4897 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_alt_set_vipsource()
4903 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_set_vipsource()
4904 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_set_vipsource()
4942 ca0132_mic_boost_set(codec, 0); in ca0132_select_mic()
4950 ca0132_set_dmic(codec, 0); in ca0132_select_mic()
4953 ca0132_effects_set(codec, VOICE_FOCUS, 0); in ca0132_select_mic()
4958 return 0; in ca0132_select_mic()
4976 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_select_in()
4977 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_select_in()
4986 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
4997 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5001 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5007 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5017 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5019 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5021 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5022 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5025 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5026 chipio_write(codec, 0x18B09C, 0x0000000C); in ca0132_alt_select_in()
5029 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5030 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5033 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5034 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5042 ca0132_mic_boost_set(codec, 0); in ca0132_alt_select_in()
5046 ca0113_mmio_gpio_set(codec, 0, false); in ca0132_alt_select_in()
5052 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ca0132_alt_select_in()
5055 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5060 dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO); in ca0132_alt_select_in()
5069 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5075 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5080 chipio_write(codec, 0x18B098, 0x00000000); in ca0132_alt_select_in()
5081 chipio_write(codec, 0x18B09C, 0x00000000); in ca0132_alt_select_in()
5086 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5087 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5093 ca0113_mmio_gpio_set(codec, 0, true); in ca0132_alt_select_in()
5102 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f); in ca0132_alt_select_in()
5113 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_select_in()
5115 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_select_in()
5117 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_select_in()
5118 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_select_in()
5122 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5123 chipio_write(codec, 0x18B09C, 0x000000CC); in ca0132_alt_select_in()
5126 chipio_write(codec, 0x18B098, 0x0000000C); in ca0132_alt_select_in()
5127 chipio_write(codec, 0x18B09C, 0x0000004C); in ca0132_alt_select_in()
5138 return 0; in ca0132_alt_select_in()
5170 * They return 0 if no changed. Return 1 if changed.
5186 ca0132_voicefx.reqs[0], tmp); in ca0132_voicefx_set()
5199 int err = 0; in ca0132_effects_set()
5202 if ((idx < 0) || (idx >= num_fx)) in ca0132_effects_set()
5203 return 0; /* no changed */ in ca0132_effects_set()
5209 val = 0; in ca0132_effects_set()
5214 val = 0; in ca0132_effects_set()
5222 val = 0; in ca0132_effects_set()
5226 val = 0; in ca0132_effects_set()
5241 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_effects_set()
5246 * to module ID 0x47. No clue why. in ca0132_effects_set()
5260 dspio_set_uint_param(codec, 0x47, 0x00, tmp); in ca0132_effects_set()
5266 val = 0; in ca0132_effects_set()
5269 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", in ca0132_effects_set()
5272 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; in ca0132_effects_set()
5274 ca0132_effects[idx].reqs[0], on); in ca0132_effects_set()
5276 if (err < 0) in ca0132_effects_set()
5277 return 0; /* no changed */ in ca0132_effects_set()
5289 int i, ret = 0; in ca0132_pe_switch_set()
5310 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0, in stop_mic1()
5311 AC_VERB_GET_CONV, 0); in stop_mic1()
5312 if (oldval != 0) in stop_mic1()
5313 snd_hda_codec_write(codec, spec->adcs[0], 0, in stop_mic1()
5315 0); in stop_mic1()
5324 if (oldval != 0) in resume_mic1()
5325 snd_hda_codec_write(codec, spec->adcs[0], 0, in resume_mic1()
5337 int i, ret = 0; in ca0132_cvoice_switch_set()
5350 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); in ca0132_cvoice_switch_set()
5365 int ret = 0; in ca0132_mic_boost_set()
5368 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5369 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); in ca0132_mic_boost_set()
5371 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_mic_boost_set()
5372 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); in ca0132_mic_boost_set()
5380 int ret = 0; in ca0132_alt_mic_boost_set()
5382 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, in ca0132_alt_mic_boost_set()
5383 HDA_INPUT, 0, HDA_AMP_VOLMASK, val); in ca0132_alt_mic_boost_set()
5391 for (i = 0; i < 4; i++) in ae5_headphone_gain_set()
5392 ca0113_mmio_command_set(codec, 0x48, 0x11 + i, in ae5_headphone_gain_set()
5394 return 0; in ae5_headphone_gain_set()
5405 return 0; in zxr_headphone_gain_set()
5413 hda_nid_t shared_nid = 0; in ca0132_vnode_switch_set()
5415 int ret = 0; in ca0132_vnode_switch_set()
5462 0, dir); in ca0132_vnode_switch_set()
5477 dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ, in ca0132_alt_bass_redirection_xover_set()
5495 int i = 0; in ca0132_alt_slider_ctl_set()
5508 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5512 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5517 for (i = 0; i < OUT_EFFECTS_COUNT; i++) in ca0132_alt_slider_ctl_set()
5521 dspio_set_param(codec, ca0132_effects[i].mid, 0x20, in ca0132_alt_slider_ctl_set()
5528 return 0; in ca0132_alt_slider_ctl_set()
5544 return 0; in ca0132_alt_xbass_xover_slider_ctl_get()
5557 return 0; in ca0132_alt_slider_ctl_get()
5573 return 0; in ca0132_alt_xbass_xover_slider_info()
5583 uinfo->value.integer.min = 0; in ca0132_alt_effect_slider_info()
5587 return 0; in ca0132_alt_effect_slider_info()
5607 return 0; in ca0132_alt_xbass_xover_slider_put()
5617 return 0; in ca0132_alt_xbass_xover_slider_put()
5632 return 0; in ca0132_alt_effect_slider_put()
5639 return 0; in ca0132_alt_effect_slider_put()
5646 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5664 return 0; in ca0132_alt_mic_boost_info()
5673 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val; in ca0132_alt_mic_boost_get()
5674 return 0; in ca0132_alt_mic_boost_get()
5682 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_mic_boost_put()
5686 return 0; in ca0132_alt_mic_boost_put()
5718 return 0; in ae5_headphone_gain_info()
5727 ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val; in ae5_headphone_gain_get()
5728 return 0; in ae5_headphone_gain_get()
5736 int sel = ucontrol->value.enumerated.item[0]; in ae5_headphone_gain_put()
5740 return 0; in ae5_headphone_gain_put()
5771 return 0; in ae5_sound_filter_info()
5780 ucontrol->value.enumerated.item[0] = spec->ae5_filter_val; in ae5_sound_filter_get()
5781 return 0; in ae5_sound_filter_get()
5789 int sel = ucontrol->value.enumerated.item[0]; in ae5_sound_filter_put()
5793 return 0; in ae5_sound_filter_put()
5800 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, in ae5_sound_filter_put()
5821 return 0; in ca0132_alt_input_source_info()
5830 ucontrol->value.enumerated.item[0] = spec->in_enum_val; in ca0132_alt_input_source_get()
5831 return 0; in ca0132_alt_input_source_get()
5839 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_input_source_put()
5850 return 0; in ca0132_alt_input_source_put()
5873 return 0; in ca0132_alt_output_select_get_info()
5882 ucontrol->value.enumerated.item[0] = spec->out_enum_val; in ca0132_alt_output_select_get()
5883 return 0; in ca0132_alt_output_select_get()
5891 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_output_select_put()
5896 return 0; in ca0132_alt_output_select_put()
5924 return 0; in ca0132_alt_speaker_channel_cfg_get_info()
5933 ucontrol->value.enumerated.item[0] = spec->channel_cfg_val; in ca0132_alt_speaker_channel_cfg_get()
5934 return 0; in ca0132_alt_speaker_channel_cfg_get()
5942 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_speaker_channel_cfg_put()
5946 return 0; in ca0132_alt_speaker_channel_cfg_put()
5977 return 0; in ca0132_alt_svm_setting_info()
5986 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting; in ca0132_alt_svm_setting_get()
5987 return 0; in ca0132_alt_svm_setting_get()
5995 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_svm_setting_put()
6001 return 0; in ca0132_alt_svm_setting_put()
6009 case 0: in ca0132_alt_svm_setting_put()
6041 return 0; in ca0132_alt_eq_preset_info()
6050 ucontrol->value.enumerated.item[0] = spec->eq_preset_val; in ca0132_alt_eq_preset_get()
6051 return 0; in ca0132_alt_eq_preset_get()
6059 int i, err = 0; in ca0132_alt_eq_preset_put()
6060 int sel = ucontrol->value.enumerated.item[0]; in ca0132_alt_eq_preset_put()
6064 return 0; in ca0132_alt_eq_preset_put()
6069 * Idx 0 is default. in ca0132_alt_eq_preset_put()
6072 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) { in ca0132_alt_eq_preset_put()
6076 if (err < 0) in ca0132_alt_eq_preset_put()
6080 if (err >= 0) in ca0132_alt_eq_preset_put()
6098 return 0; in ca0132_voicefx_info()
6107 ucontrol->value.enumerated.item[0] = spec->voicefx_val; in ca0132_voicefx_get()
6108 return 0; in ca0132_voicefx_get()
6116 int i, err = 0; in ca0132_voicefx_put()
6117 int sel = ucontrol->value.enumerated.item[0]; in ca0132_voicefx_put()
6120 return 0; in ca0132_voicefx_put()
6126 * Idx 0 is default. in ca0132_voicefx_put()
6129 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { in ca0132_voicefx_put()
6133 if (err < 0) in ca0132_voicefx_put()
6137 if (err >= 0) { in ca0132_voicefx_put()
6140 ca0132_voicefx_set(codec, (sel ? 1 : 0)); in ca0132_voicefx_put()
6165 return 0; in ca0132_switch_get()
6171 return 0; in ca0132_switch_get()
6175 if (nid == spec->input_pins[0]) { in ca0132_switch_get()
6177 return 0; in ca0132_switch_get()
6182 return 0; in ca0132_switch_get()
6187 return 0; in ca0132_switch_get()
6192 return 0; in ca0132_switch_get()
6195 return 0; in ca0132_switch_get()
6208 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", in ca0132_switch_put()
6249 if (nid == spec->input_pins[0]) { in ca0132_switch_put()
6268 changed = 0; in ca0132_switch_put()
6278 changed = 0; in ca0132_switch_put()
6286 changed = 0; in ca0132_switch_put()
6317 ca0132_alt_vol_ctls[dsp_dir].reqs[0], in ca0132_alt_dsp_volume_put()
6349 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6359 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_info()
6388 return 0; in ca0132_volume_get()
6399 hda_nid_t shared_nid = 0; in ca0132_volume_put()
6423 0, dir); in ca0132_volume_put()
6446 hda_nid_t vnid = 0; in ca0132_alt_volume_put()
6450 case 0x02: in ca0132_alt_volume_put()
6453 case 0x07: in ca0132_alt_volume_put()
6495 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6505 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); in ca0132_volume_tlv()
6523 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6540 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); in ca0132_alt_add_effect_slider()
6575 VOICEFX, 1, 0, HDA_INPUT); in add_voicefx()
6587 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT); in add_ca0132_alt_eq_presets()
6604 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_svm_enum()
6621 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_output_enum()
6638 SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT); in ca0132_alt_add_speaker_channel_cfg_enum()
6681 HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0, in ca0132_alt_add_bass_redirection_crossover()
6713 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_input_enum()
6722 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6729 MIC_BOOST_ENUM, 1, 0, HDA_INPUT); in ca0132_alt_add_mic_boost_enum()
6747 AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_headphone_gain_enum()
6764 AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT); in ae5_add_sound_filter_enum()
6792 * I think this has to do with the pin for rear surround being 0x11,
6793 * and the center/lfe being 0x10. Usually the pin order is the opposite.
6811 int err = 0; in ca0132_alt_add_chmap_ctls()
6824 elem, hinfo->channels_max, 0, &chmap); in ca0132_alt_add_chmap_ctls()
6825 if (err < 0) in ca0132_alt_add_chmap_ctls()
6840 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6841 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6842 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6843 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6845 0x12, 1, HDA_INPUT),
6863 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6865 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6866 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6867 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6868 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6869 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6870 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6871 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
6873 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6874 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6885 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
6887 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
6888 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
6889 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
6890 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
6891 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
6892 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
6895 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6896 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6906 int err = 0; in ca0132_build_controls()
6909 for (i = 0; i < spec->num_mixers; i++) { in ca0132_build_controls()
6911 if (err < 0) in ca0132_build_controls()
6916 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, in ca0132_build_controls()
6925 if (err < 0) in ca0132_build_controls()
6933 for (i = 0; i < num_fx; i++) { in ca0132_build_controls()
6944 if (err < 0) in ca0132_build_controls()
6954 if (err < 0) in ca0132_build_controls()
6958 if (err < 0) in ca0132_build_controls()
6962 "Enable OutFX", 0); in ca0132_build_controls()
6963 if (err < 0) in ca0132_build_controls()
6968 if (err < 0) in ca0132_build_controls()
6972 for (i = 0; i < num_sliders; i++) { in ca0132_build_controls()
6977 if (err < 0) in ca0132_build_controls()
6984 if (err < 0) in ca0132_build_controls()
6988 "PlayEnhancement", 0); in ca0132_build_controls()
6989 if (err < 0) in ca0132_build_controls()
6994 if (err < 0) in ca0132_build_controls()
6998 if (err < 0) in ca0132_build_controls()
7008 if (err < 0) in ca0132_build_controls()
7011 if (err < 0) in ca0132_build_controls()
7014 if (err < 0) in ca0132_build_controls()
7017 if (err < 0) in ca0132_build_controls()
7020 if (err < 0) in ca0132_build_controls()
7023 if (err < 0) in ca0132_build_controls()
7026 if (err < 0) in ca0132_build_controls()
7034 if (err < 0) in ca0132_build_controls()
7043 if (err < 0) in ca0132_build_controls()
7046 if (err < 0) in ca0132_build_controls()
7051 if (err < 0) in ca0132_build_controls()
7063 if (err < 0) in ca0132_build_controls()
7069 if (err < 0) in ca0132_build_controls()
7072 if (err < 0) in ca0132_build_controls()
7079 if (err < 0) in ca0132_build_controls()
7086 return 0; in ca0132_build_controls()
7092 int err = 0; in dbpro_build_controls()
7097 if (err < 0) in dbpro_build_controls()
7103 if (err < 0) in dbpro_build_controls()
7107 return 0; in dbpro_build_controls()
7167 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; in ca0132_build_pcms()
7172 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in ca0132_build_pcms()
7193 return 0; in ca0132_build_pcms()
7210 return 0; in ca0132_build_pcms()
7223 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; in dbpro_build_pcms()
7227 return 0; in dbpro_build_pcms()
7244 return 0; in dbpro_build_pcms()
7252 snd_hda_codec_write(codec, pin, 0, in init_output()
7257 snd_hda_codec_write(codec, dac, 0, in init_output()
7266 snd_hda_codec_write(codec, pin, 0, in init_input()
7268 AMP_IN_UNMUTE(0)); in init_input()
7271 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, in init_input()
7272 AMP_IN_UNMUTE(0)); in init_input()
7274 /* init to 0 dB and unmute. */ in init_input()
7275 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7276 HDA_AMP_VOLMASK, 0x5a); in init_input()
7277 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, in init_input()
7278 HDA_AMP_MUTE, 0); in init_input()
7304 ca0132_set_vipsource(codec, 0); in ca0132_set_dmic()
7308 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7311 val |= 0x80; in ca0132_set_dmic()
7312 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7315 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7320 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_set_dmic()
7324 val &= 0x5f; in ca0132_set_dmic()
7325 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_set_dmic()
7328 if (!(spec->dmic_ctl & 0x20)) in ca0132_set_dmic()
7329 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); in ca0132_set_dmic()
7348 * Bit 2-0: MPIO select in ca0132_init_dmic()
7352 val = 0x01; in ca0132_init_dmic()
7353 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7357 * Bit 2-0: Data1 MPIO select in ca0132_init_dmic()
7362 val = 0x83; in ca0132_init_dmic()
7363 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7366 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. in ca0132_init_dmic()
7367 * Bit 3-0: Channel mask in ca0132_init_dmic()
7374 val = 0x33; in ca0132_init_dmic()
7376 val = 0x23; in ca0132_init_dmic()
7379 snd_hda_codec_write(codec, spec->input_pins[0], 0, in ca0132_init_dmic()
7391 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7392 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in ca0132_init_analog_mic2()
7393 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7394 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7395 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7396 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7397 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7398 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D); in ca0132_init_analog_mic2()
7399 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7400 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in ca0132_init_analog_mic2()
7401 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init_analog_mic2()
7402 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in ca0132_init_analog_mic2()
7414 for (i = 0; i < spec->multiout.num_dacs; i++) in ca0132_refresh_widget_caps()
7417 for (i = 0; i < spec->num_outputs; i++) in ca0132_refresh_widget_caps()
7420 for (i = 0; i < spec->num_inputs; i++) { in ca0132_refresh_widget_caps()
7431 0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7436 0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7441 0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7470 dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp); in ca0132_alt_init_speaker_tuning()
7475 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7480 dspio_set_uint_param(codec, 0x96, i, tmp); in ca0132_alt_init_speaker_tuning()
7483 for (i = 0; i < 6; i++) in ca0132_alt_init_speaker_tuning()
7484 dspio_set_uint_param(codec, 0x96, in ca0132_alt_init_speaker_tuning()
7498 SNDRV_PCM_FORMAT_S32_LE, 32, 0); in ca0132_alt_create_dummy_stream()
7500 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id, in ca0132_alt_create_dummy_stream()
7501 0, stream_format); in ca0132_alt_create_dummy_stream()
7503 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]); in ca0132_alt_create_dummy_stream()
7518 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7522 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_init_analog_mics()
7528 chipio_set_conn_rate(codec, 0x0F, SR_96_000); in ca0132_alt_init_analog_mics()
7530 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_alt_init_analog_mics()
7534 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7535 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7547 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_connect_streams()
7548 chipio_set_stream_control(codec, 0x0C, 1); in sbz_connect_streams()
7550 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */ in sbz_connect_streams()
7551 chipio_write_no_mutex(codec, 0x18a020, 0x00000043); in sbz_connect_streams()
7553 /* Setup stream 0x14 with it's source and destination points */ in sbz_connect_streams()
7554 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91); in sbz_connect_streams()
7555 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000); in sbz_connect_streams()
7556 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000); in sbz_connect_streams()
7557 chipio_set_stream_channels(codec, 0x14, 2); in sbz_connect_streams()
7558 chipio_set_stream_control(codec, 0x14, 1); in sbz_connect_streams()
7579 chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0); in sbz_chipio_startup_data()
7580 chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1); in sbz_chipio_startup_data()
7581 chipio_write_no_mutex(codec, 0x190068, 0x0001fac6); in sbz_chipio_startup_data()
7582 chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7); in sbz_chipio_startup_data()
7584 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7586 chipio_set_stream_channels(codec, 0x0C, 6); in sbz_chipio_startup_data()
7587 chipio_set_stream_control(codec, 0x0C, 1); in sbz_chipio_startup_data()
7590 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0); in sbz_chipio_startup_data()
7591 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1); in sbz_chipio_startup_data()
7592 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2); in sbz_chipio_startup_data()
7593 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3); in sbz_chipio_startup_data()
7594 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4); in sbz_chipio_startup_data()
7595 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5); in sbz_chipio_startup_data()
7596 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6); in sbz_chipio_startup_data()
7597 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7); in sbz_chipio_startup_data()
7598 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8); in sbz_chipio_startup_data()
7599 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9); in sbz_chipio_startup_data()
7600 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca); in sbz_chipio_startup_data()
7601 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb); in sbz_chipio_startup_data()
7603 chipio_write_no_mutex(codec, 0x190038, 0x000140c2); in sbz_chipio_startup_data()
7604 chipio_write_no_mutex(codec, 0x19003c, 0x000141c3); in sbz_chipio_startup_data()
7605 chipio_write_no_mutex(codec, 0x190040, 0x000150c4); in sbz_chipio_startup_data()
7606 chipio_write_no_mutex(codec, 0x190044, 0x000151c5); in sbz_chipio_startup_data()
7607 chipio_write_no_mutex(codec, 0x190050, 0x000142c8); in sbz_chipio_startup_data()
7608 chipio_write_no_mutex(codec, 0x190054, 0x000143c9); in sbz_chipio_startup_data()
7609 chipio_write_no_mutex(codec, 0x190058, 0x000152ca); in sbz_chipio_startup_data()
7610 chipio_write_no_mutex(codec, 0x19005c, 0x000153cb); in sbz_chipio_startup_data()
7612 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in sbz_chipio_startup_data()
7619 * Custom DSP SCP commands where the src value is 0x00 instead of 0x20. This is
7631 for (i = 0; i < 2; i++) { in ca0132_alt_dsp_scp_startup()
7636 tmp = 0x00000003; in ca0132_alt_dsp_scp_startup()
7637 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7638 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7639 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7640 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7641 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7642 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7643 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7644 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7645 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7646 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7647 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7651 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7652 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp); in ca0132_alt_dsp_scp_startup()
7653 tmp = 0x00000001; in ca0132_alt_dsp_scp_startup()
7654 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp); in ca0132_alt_dsp_scp_startup()
7655 tmp = 0x00000004; in ca0132_alt_dsp_scp_startup()
7656 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7657 tmp = 0x00000005; in ca0132_alt_dsp_scp_startup()
7658 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7659 tmp = 0x00000000; in ca0132_alt_dsp_scp_startup()
7660 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); in ca0132_alt_dsp_scp_startup()
7674 chipio_set_stream_control(codec, 0x03, 0); in ca0132_alt_dsp_initial_mic_setup()
7675 chipio_set_stream_control(codec, 0x04, 0); in ca0132_alt_dsp_initial_mic_setup()
7681 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_alt_dsp_initial_mic_setup()
7683 chipio_set_stream_control(codec, 0x03, 1); in ca0132_alt_dsp_initial_mic_setup()
7684 chipio_set_stream_control(codec, 0x04, 1); in ca0132_alt_dsp_initial_mic_setup()
7688 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7689 chipio_write(codec, 0x18b09C, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7692 chipio_write(codec, 0x18b098, 0x0000000c); in ca0132_alt_dsp_initial_mic_setup()
7693 chipio_write(codec, 0x18b09c, 0x0000004c); in ca0132_alt_dsp_initial_mic_setup()
7704 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_post_dsp_register_set()
7705 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7706 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_post_dsp_register_set()
7707 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_register_set()
7708 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_post_dsp_register_set()
7710 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7711 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7712 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7713 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7714 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7715 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7716 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7717 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7718 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7719 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7720 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7721 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7723 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f); in ae5_post_dsp_register_set()
7724 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_post_dsp_register_set()
7725 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_register_set()
7735 chipio_set_control_param(codec, 3, 0); in ae5_post_dsp_param_setup()
7742 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae5_post_dsp_param_setup()
7743 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_post_dsp_param_setup()
7745 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7746 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae5_post_dsp_param_setup()
7747 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7748 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae5_post_dsp_param_setup()
7749 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_param_setup()
7750 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae5_post_dsp_param_setup()
7755 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7756 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_post_dsp_pll_setup()
7757 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7758 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_post_dsp_pll_setup()
7760 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7761 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x45); in ae5_post_dsp_pll_setup()
7762 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7763 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcc); in ae5_post_dsp_pll_setup()
7765 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7766 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x40); in ae5_post_dsp_pll_setup()
7767 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7768 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xcb); in ae5_post_dsp_pll_setup()
7770 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7771 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_pll_setup()
7772 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7773 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_pll_setup()
7775 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7776 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x51); in ae5_post_dsp_pll_setup()
7777 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_pll_setup()
7778 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x8d); in ae5_post_dsp_pll_setup()
7787 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae5_post_dsp_stream_setup()
7789 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae5_post_dsp_stream_setup()
7791 chipio_set_stream_channels(codec, 0x0C, 6); in ae5_post_dsp_stream_setup()
7792 chipio_set_stream_control(codec, 0x0C, 1); in ae5_post_dsp_stream_setup()
7794 chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0); in ae5_post_dsp_stream_setup()
7796 chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0); in ae5_post_dsp_stream_setup()
7797 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae5_post_dsp_stream_setup()
7798 chipio_set_stream_channels(codec, 0x18, 6); in ae5_post_dsp_stream_setup()
7799 chipio_set_stream_control(codec, 0x18, 1); in ae5_post_dsp_stream_setup()
7803 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7804 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae5_post_dsp_stream_setup()
7805 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_post_dsp_stream_setup()
7806 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae5_post_dsp_stream_setup()
7808 ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80); in ae5_post_dsp_stream_setup()
7819 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae5_post_dsp_startup_data()
7820 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae5_post_dsp_startup_data()
7821 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae5_post_dsp_startup_data()
7822 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae5_post_dsp_startup_data()
7824 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7826 ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12); in ae5_post_dsp_startup_data()
7827 ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00); in ae5_post_dsp_startup_data()
7828 ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48); in ae5_post_dsp_startup_data()
7829 ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05); in ae5_post_dsp_startup_data()
7830 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_post_dsp_startup_data()
7831 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7832 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7833 ca0113_mmio_gpio_set(codec, 0, true); in ae5_post_dsp_startup_data()
7835 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80); in ae5_post_dsp_startup_data()
7837 chipio_write_no_mutex(codec, 0x18b03c, 0x00000012); in ae5_post_dsp_startup_data()
7839 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae5_post_dsp_startup_data()
7840 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae5_post_dsp_startup_data()
7846 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3, 0x0001e2c4, 0x0001e3c5,
7847 0x0001e8c6, 0x0001e9c7, 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb
7857 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_setup_ports()
7858 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_setup_ports()
7861 addr = 0x190030; in ae7_post_dsp_setup_ports()
7862 for (i = 0; i < count; i++) { in ae7_post_dsp_setup_ports()
7866 addr += 0x04; in ae7_post_dsp_setup_ports()
7870 * Port setting always ends with a write of 0x1 to address 0x19042c. in ae7_post_dsp_setup_ports()
7872 chipio_write_no_mutex(codec, 0x19042c, 0x00000001); in ae7_post_dsp_setup_ports()
7874 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_post_dsp_setup_ports()
7875 ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40); in ae7_post_dsp_setup_ports()
7876 ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00); in ae7_post_dsp_setup_ports()
7877 ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00); in ae7_post_dsp_setup_ports()
7878 ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff); in ae7_post_dsp_setup_ports()
7879 ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff); in ae7_post_dsp_setup_ports()
7880 ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff); in ae7_post_dsp_setup_ports()
7881 ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f); in ae7_post_dsp_setup_ports()
7892 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81); in ae7_post_dsp_asi_stream_setup()
7893 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_post_dsp_asi_stream_setup()
7895 chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7896 chipio_set_stream_channels(codec, 0x0c, 6); in ae7_post_dsp_asi_stream_setup()
7897 chipio_set_stream_control(codec, 0x0c, 1); in ae7_post_dsp_asi_stream_setup()
7899 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_stream_setup()
7900 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_stream_setup()
7902 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_stream_setup()
7903 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_stream_setup()
7904 chipio_set_stream_control(codec, 0x18, 1); in ae7_post_dsp_asi_stream_setup()
7914 0x41, 0x45, 0x40, 0x43, 0x51 in ae7_post_dsp_pll_setup()
7917 0xc8, 0xcc, 0xcb, 0xc7, 0x8d in ae7_post_dsp_pll_setup()
7921 for (i = 0; i < ARRAY_SIZE(addr); i++) { in ae7_post_dsp_pll_setup()
7922 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7924 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_pll_setup()
7933 0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14 in ae7_post_dsp_asi_setup_ports()
7936 0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f in ae7_post_dsp_asi_setup_ports()
7942 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7943 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup_ports()
7944 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup_ports()
7945 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup_ports()
7947 chipio_write_no_mutex(codec, 0x189000, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7948 chipio_write_no_mutex(codec, 0x189004, 0x0001f101); in ae7_post_dsp_asi_setup_ports()
7949 chipio_write_no_mutex(codec, 0x189024, 0x00014004); in ae7_post_dsp_asi_setup_ports()
7950 chipio_write_no_mutex(codec, 0x189028, 0x0002000f); in ae7_post_dsp_asi_setup_ports()
7955 for (i = 0; i < ARRAY_SIZE(target); i++) in ae7_post_dsp_asi_setup_ports()
7956 ca0113_mmio_command_set(codec, 0x48, target[i], data[i]); in ae7_post_dsp_asi_setup_ports()
7958 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7959 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7960 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7962 chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56); in ae7_post_dsp_asi_setup_ports()
7963 chipio_set_stream_channels(codec, 0x21, 2); in ae7_post_dsp_asi_setup_ports()
7964 chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000); in ae7_post_dsp_asi_setup_ports()
7966 chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_post_dsp_asi_setup_ports()
7972 chipio_set_control_param_no_mutex(codec, 0x20, 0x21); in ae7_post_dsp_asi_setup_ports()
7974 chipio_write_no_mutex(codec, 0x18b038, 0x00000088); in ae7_post_dsp_asi_setup_ports()
7978 * seemingly sends data to the HDA node 0x09, which is the digital in ae7_post_dsp_asi_setup_ports()
7985 ca0113_mmio_gpio_set(codec, 0, 1); in ae7_post_dsp_asi_setup_ports()
7988 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup_ports()
7989 chipio_write_no_mutex(codec, 0x18b03c, 0x00000000); in ae7_post_dsp_asi_setup_ports()
7990 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00); in ae7_post_dsp_asi_setup_ports()
7991 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00); in ae7_post_dsp_asi_setup_ports()
7993 chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00); in ae7_post_dsp_asi_setup_ports()
7994 chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0); in ae7_post_dsp_asi_setup_ports()
7996 chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000); in ae7_post_dsp_asi_setup_ports()
7997 chipio_set_stream_channels(codec, 0x18, 6); in ae7_post_dsp_asi_setup_ports()
8016 chipio_8051_write_direct(codec, 0x93, 0x10); in ae7_post_dsp_asi_setup()
8018 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8019 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae7_post_dsp_asi_setup()
8020 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8021 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae7_post_dsp_asi_setup()
8023 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_post_dsp_asi_setup()
8024 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_post_dsp_asi_setup()
8029 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83); in ae7_post_dsp_asi_setup()
8030 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_post_dsp_asi_setup()
8031 snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00); in ae7_post_dsp_asi_setup()
8033 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8034 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x92); in ae7_post_dsp_asi_setup()
8035 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8036 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0xfa); in ae7_post_dsp_asi_setup()
8037 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8038 VENDOR_CHIPIO_8051_DATA_WRITE, 0x22); in ae7_post_dsp_asi_setup()
8043 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8044 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x43); in ae7_post_dsp_asi_setup()
8045 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae7_post_dsp_asi_setup()
8046 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc7); in ae7_post_dsp_asi_setup()
8066 for (idx = 0; idx < num_fx; idx++) { in ca0132_setup_defaults()
8067 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ca0132_setup_defaults()
8076 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ca0132_setup_defaults()
8079 dspio_set_uint_param(codec, 0x8f, 0x01, tmp); in ca0132_setup_defaults()
8083 dspio_set_uint_param(codec, 0x80, 0x00, tmp); in ca0132_setup_defaults()
8084 dspio_set_uint_param(codec, 0x80, 0x01, tmp); in ca0132_setup_defaults()
8088 dspio_set_uint_param(codec, 0x80, 0x05, tmp); in ca0132_setup_defaults()
8092 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ca0132_setup_defaults()
8114 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in r3d_setup_defaults()
8118 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in r3d_setup_defaults()
8122 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in r3d_setup_defaults()
8135 for (idx = 0; idx < num_fx; idx++) { in r3d_setup_defaults()
8136 for (i = 0; i <= ca0132_effects[idx].params; i++) { in r3d_setup_defaults()
8164 chipio_set_stream_control(codec, 0x03, 1); in sbz_setup_defaults()
8165 chipio_set_stream_control(codec, 0x04, 1); in sbz_setup_defaults()
8172 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in sbz_setup_defaults()
8173 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in sbz_setup_defaults()
8177 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in sbz_setup_defaults()
8181 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in sbz_setup_defaults()
8185 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in sbz_setup_defaults()
8191 for (idx = 0; idx < num_fx; idx++) { in sbz_setup_defaults()
8192 for (i = 0; i <= ca0132_effects[idx].params; i++) { in sbz_setup_defaults()
8220 chipio_set_stream_control(codec, 0x03, 1); in ae5_setup_defaults()
8221 chipio_set_stream_control(codec, 0x04, 1); in ae5_setup_defaults()
8225 dspio_set_uint_param(codec, 0x96, 0x29, tmp); in ae5_setup_defaults()
8226 dspio_set_uint_param(codec, 0x96, 0x2a, tmp); in ae5_setup_defaults()
8227 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae5_setup_defaults()
8228 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae5_setup_defaults()
8230 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_setup_defaults()
8231 ca0113_mmio_gpio_set(codec, 0, false); in ae5_setup_defaults()
8232 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae5_setup_defaults()
8236 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae5_setup_defaults()
8237 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae5_setup_defaults()
8241 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae5_setup_defaults()
8245 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae5_setup_defaults()
8249 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae5_setup_defaults()
8260 for (idx = 0; idx < num_fx; idx++) { in ae5_setup_defaults()
8261 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae5_setup_defaults()
8292 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8294 dspio_set_uint_param(codec, 0x96, in ae7_setup_defaults()
8297 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae7_setup_defaults()
8300 dspio_set_uint_param(codec, 0x80, 0x0d, tmp); in ae7_setup_defaults()
8301 dspio_set_uint_param(codec, 0x80, 0x0e, tmp); in ae7_setup_defaults()
8303 ca0113_mmio_gpio_set(codec, 0, false); in ae7_setup_defaults()
8307 dspio_set_uint_param(codec, 0x37, 0x08, tmp); in ae7_setup_defaults()
8308 dspio_set_uint_param(codec, 0x37, 0x10, tmp); in ae7_setup_defaults()
8312 dspio_set_uint_param(codec, 0x96, 0x3C, tmp); in ae7_setup_defaults()
8316 dspio_set_uint_param(codec, 0x31, 0x00, tmp); in ae7_setup_defaults()
8320 dspio_set_uint_param(codec, 0x32, 0x00, tmp); in ae7_setup_defaults()
8321 ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00); in ae7_setup_defaults()
8332 * Not sure why, but these are both set to 1. They're only set to 0 in ae7_setup_defaults()
8335 ca0113_mmio_gpio_set(codec, 0, true); in ae7_setup_defaults()
8339 ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04); in ae7_setup_defaults()
8340 ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04); in ae7_setup_defaults()
8341 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80); in ae7_setup_defaults()
8345 for (idx = 0; idx < num_fx; idx++) { in ae7_setup_defaults()
8346 for (i = 0; i <= ca0132_effects[idx].params; i++) { in ae7_setup_defaults()
8372 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8373 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0); in ca0132_init_flags()
8375 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8379 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); in ca0132_init_flags()
8381 CONTROL_FLAG_PORT_A_COMMON_MODE, 0); in ca0132_init_flags()
8383 CONTROL_FLAG_PORT_D_COMMON_MODE, 0); in ca0132_init_flags()
8385 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); in ca0132_init_flags()
8387 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); in ca0132_init_flags()
8401 chipio_set_conn_rate(codec, 0x0B, SR_48_000); in ca0132_init_params()
8402 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); in ca0132_init_params()
8403 chipio_set_control_param(codec, 0, 0); in ca0132_init_params()
8404 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0); in ca0132_init_params()
8441 codec->card->dev) != 0) in ca0132_download_dsp_images()
8448 codec->card->dev) != 0) in ca0132_download_dsp_images()
8463 codec->card->dev) != 0) in ca0132_download_dsp_images()
8468 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { in ca0132_download_dsp_images()
8515 if (dspio_get_response_data(codec) >= 0) in ca0132_process_dsp_response()
8516 spec->wait_scp = 0; in ca0132_process_dsp_response()
8568 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8575 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
8577 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8585 {0x15, 0x70D, 0xF0},
8586 {0x15, 0x70E, 0xFE},
8587 {0x15, 0x707, 0x75},
8588 {0x15, 0x707, 0xD3},
8589 {0x15, 0x707, 0x09},
8590 {0x15, 0x707, 0x53},
8591 {0x15, 0x707, 0xD4},
8592 {0x15, 0x707, 0xEF},
8593 {0x15, 0x707, 0x75},
8594 {0x15, 0x707, 0xD3},
8595 {0x15, 0x707, 0x09},
8596 {0x15, 0x707, 0x02},
8597 {0x15, 0x707, 0x37},
8598 {0x15, 0x707, 0x78},
8599 {0x15, 0x53C, 0xCE},
8600 {0x15, 0x575, 0xC9},
8601 {0x15, 0x53D, 0xCE},
8602 {0x15, 0x5B7, 0xC9},
8603 {0x15, 0x70D, 0xE8},
8604 {0x15, 0x70E, 0xFE},
8605 {0x15, 0x707, 0x02},
8606 {0x15, 0x707, 0x68},
8607 {0x15, 0x707, 0x62},
8608 {0x15, 0x53A, 0xCE},
8609 {0x15, 0x546, 0xC9},
8610 {0x15, 0x53B, 0xCE},
8611 {0x15, 0x5E8, 0xC9},
8617 {0x15, 0x70D, 0x20},
8618 {0x15, 0x70E, 0x19},
8619 {0x15, 0x707, 0x00},
8620 {0x15, 0x539, 0xCE},
8621 {0x15, 0x546, 0xC9},
8622 {0x15, 0x70D, 0xB7},
8623 {0x15, 0x70E, 0x09},
8624 {0x15, 0x707, 0x10},
8625 {0x15, 0x70D, 0xAF},
8626 {0x15, 0x70E, 0x09},
8627 {0x15, 0x707, 0x01},
8628 {0x15, 0x707, 0x05},
8629 {0x15, 0x70D, 0x73},
8630 {0x15, 0x70E, 0x09},
8631 {0x15, 0x707, 0x14},
8632 {0x15, 0x6FF, 0xC4},
8651 spec->cur_mic_boost = 0; in ca0132_init_chip()
8653 for (i = 0; i < VNODES_COUNT; i++) { in ca0132_init_chip()
8654 spec->vnode_lvol[i] = 0x5a; in ca0132_init_chip()
8655 spec->vnode_rvol[i] = 0x5a; in ca0132_init_chip()
8656 spec->vnode_lswitch[i] = 0; in ca0132_init_chip()
8657 spec->vnode_rswitch[i] = 0; in ca0132_init_chip()
8664 for (i = 0; i < num_fx; i++) { in ca0132_init_chip()
8665 on = (unsigned int)ca0132_effects[i].reqs[0]; in ca0132_init_chip()
8666 spec->effects_switch[i] = on ? 1 : 0; in ca0132_init_chip()
8674 spec->speaker_range_val[0] = 1; in ca0132_init_chip()
8678 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) in ca0132_init_chip()
8684 spec->voicefx_val = 0; in ca0132_init_chip()
8686 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; in ca0132_init_chip()
8707 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00); in r3di_gpio_shutdown()
8718 for (i = 0; i < 4; i++) in sbz_region2_exit()
8719 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8720 for (i = 0; i < 8; i++) in sbz_region2_exit()
8721 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
8723 ca0113_mmio_gpio_set(codec, 0, false); in sbz_region2_exit()
8732 static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13}; in sbz_set_pin_ctl_default()
8735 snd_hda_codec_write(codec, 0x11, 0, in sbz_set_pin_ctl_default()
8736 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40); in sbz_set_pin_ctl_default()
8738 for (i = 0; i < ARRAY_SIZE(pins); i++) in sbz_set_pin_ctl_default()
8739 snd_hda_codec_write(codec, pins[i], 0, in sbz_set_pin_ctl_default()
8740 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00); in sbz_set_pin_ctl_default()
8745 static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13}; in ca0132_clear_unsolicited()
8748 for (i = 0; i < ARRAY_SIZE(pins); i++) { in ca0132_clear_unsolicited()
8749 snd_hda_codec_write(codec, pins[i], 0, in ca0132_clear_unsolicited()
8750 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00); in ca0132_clear_unsolicited()
8758 if (dir >= 0) in sbz_gpio_shutdown_commands()
8759 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8761 if (mask >= 0) in sbz_gpio_shutdown_commands()
8762 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8765 if (data >= 0) in sbz_gpio_shutdown_commands()
8766 snd_hda_codec_write(codec, 0x01, 0, in sbz_gpio_shutdown_commands()
8772 static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01}; in zxr_dbpro_power_state_shutdown()
8775 for (i = 0; i < ARRAY_SIZE(pins); i++) in zxr_dbpro_power_state_shutdown()
8776 snd_hda_codec_write(codec, pins[i], 0, in zxr_dbpro_power_state_shutdown()
8777 AC_VERB_SET_POWER_STATE, 0x03); in zxr_dbpro_power_state_shutdown()
8782 chipio_set_stream_control(codec, 0x03, 0); in sbz_exit_chip()
8783 chipio_set_stream_control(codec, 0x04, 0); in sbz_exit_chip()
8786 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1); in sbz_exit_chip()
8787 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05); in sbz_exit_chip()
8788 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01); in sbz_exit_chip()
8790 chipio_set_stream_control(codec, 0x14, 0); in sbz_exit_chip()
8791 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8793 chipio_set_conn_rate(codec, 0x41, SR_192_000); in sbz_exit_chip()
8794 chipio_set_conn_rate(codec, 0x91, SR_192_000); in sbz_exit_chip()
8796 chipio_write(codec, 0x18a020, 0x00000083); in sbz_exit_chip()
8798 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03); in sbz_exit_chip()
8799 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07); in sbz_exit_chip()
8800 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06); in sbz_exit_chip()
8802 chipio_set_stream_control(codec, 0x0C, 0); in sbz_exit_chip()
8804 chipio_set_control_param(codec, 0x0D, 0x24); in sbz_exit_chip()
8809 snd_hda_codec_write(codec, 0x0B, 0, in sbz_exit_chip()
8810 AC_VERB_SET_EAPD_BTLENABLE, 0x00); in sbz_exit_chip()
8818 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in r3d_exit_chip()
8819 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b); in r3d_exit_chip()
8824 chipio_set_stream_control(codec, 0x03, 0); in ae5_exit_chip()
8825 chipio_set_stream_control(codec, 0x04, 0); in ae5_exit_chip()
8827 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae5_exit_chip()
8828 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8829 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_exit_chip()
8830 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae5_exit_chip()
8831 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae5_exit_chip()
8832 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00); in ae5_exit_chip()
8833 ca0113_mmio_gpio_set(codec, 0, false); in ae5_exit_chip()
8836 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae5_exit_chip()
8837 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae5_exit_chip()
8839 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae5_exit_chip()
8841 chipio_set_stream_control(codec, 0x18, 0); in ae5_exit_chip()
8842 chipio_set_stream_control(codec, 0x0c, 0); in ae5_exit_chip()
8844 snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83); in ae5_exit_chip()
8849 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8850 chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8); in ae7_exit_chip()
8851 chipio_set_stream_channels(codec, 0x21, 0); in ae7_exit_chip()
8852 chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09); in ae7_exit_chip()
8853 chipio_set_control_param(codec, 0x20, 0x01); in ae7_exit_chip()
8855 chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0); in ae7_exit_chip()
8857 chipio_set_stream_control(codec, 0x18, 0); in ae7_exit_chip()
8858 chipio_set_stream_control(codec, 0x0c, 0); in ae7_exit_chip()
8860 ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00); in ae7_exit_chip()
8861 snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83); in ae7_exit_chip()
8862 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae7_exit_chip()
8863 ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00); in ae7_exit_chip()
8864 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00); in ae7_exit_chip()
8865 ca0113_mmio_gpio_set(codec, 0, false); in ae7_exit_chip()
8867 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ae7_exit_chip()
8869 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in ae7_exit_chip()
8870 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in ae7_exit_chip()
8875 chipio_set_stream_control(codec, 0x03, 0); in zxr_exit_chip()
8876 chipio_set_stream_control(codec, 0x04, 0); in zxr_exit_chip()
8877 chipio_set_stream_control(codec, 0x14, 0); in zxr_exit_chip()
8878 chipio_set_stream_control(codec, 0x0C, 0); in zxr_exit_chip()
8880 chipio_set_conn_rate(codec, 0x41, SR_192_000); in zxr_exit_chip()
8881 chipio_set_conn_rate(codec, 0x91, SR_192_000); in zxr_exit_chip()
8883 chipio_write(codec, 0x18a020, 0x00000083); in zxr_exit_chip()
8885 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); in zxr_exit_chip()
8886 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53); in zxr_exit_chip()
8890 snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00); in zxr_exit_chip()
8895 ca0113_mmio_gpio_set(codec, 0, false); in zxr_exit_chip()
8897 ca0113_mmio_gpio_set(codec, 0, true); in zxr_exit_chip()
8923 unsigned int cur_address = 0x390; in sbz_dsp_startup_check()
8925 unsigned int failure = 0; in sbz_dsp_startup_check()
8933 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8935 cur_address += 0x4; in sbz_dsp_startup_check()
8937 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8938 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8950 while (failure && (reload != 0)) { in sbz_dsp_startup_check()
8955 failure = 0; in sbz_dsp_startup_check()
8956 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8958 cur_address += 0x4; in sbz_dsp_startup_check()
8960 for (i = 0; i < 4; i++) { in sbz_dsp_startup_check()
8961 if (dsp_data_check[i] == 0xa1a2a3a4) in sbz_dsp_startup_check()
8977 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
8982 * to 0 just incase a value has lingered from a boot into Windows.
8986 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8987 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8988 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8989 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8990 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8991 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
8992 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00); in ca0132_alt_vol_setup()
8993 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00); in ca0132_alt_vol_setup()
9003 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9004 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9006 chipio_write(codec, 0x18b0a4, 0x000000c2); in sbz_pre_dsp_setup()
9008 snd_hda_codec_write(codec, 0x11, 0, in sbz_pre_dsp_setup()
9009 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in sbz_pre_dsp_setup()
9014 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3d_pre_dsp_setup()
9016 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9017 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3d_pre_dsp_setup()
9018 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9019 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3d_pre_dsp_setup()
9020 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3d_pre_dsp_setup()
9021 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3d_pre_dsp_setup()
9023 snd_hda_codec_write(codec, 0x11, 0, in r3d_pre_dsp_setup()
9024 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44); in r3d_pre_dsp_setup()
9029 chipio_write(codec, 0x18b0a4, 0x000000c2); in r3di_pre_dsp_setup()
9031 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9032 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E); in r3di_pre_dsp_setup()
9033 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9034 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C); in r3di_pre_dsp_setup()
9035 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9036 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B); in r3di_pre_dsp_setup()
9038 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9039 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); in r3di_pre_dsp_setup()
9040 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9041 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); in r3di_pre_dsp_setup()
9042 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9043 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); in r3di_pre_dsp_setup()
9044 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in r3di_pre_dsp_setup()
9045 VENDOR_CHIPIO_8051_DATA_WRITE, 0x40); in r3di_pre_dsp_setup()
9047 snd_hda_codec_write(codec, 0x11, 0, in r3di_pre_dsp_setup()
9048 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04); in r3di_pre_dsp_setup()
9057 0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9058 0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9062 0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9063 0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9064 0x000000c1, 0x00000080
9068 0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9069 0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9070 0x000000c1, 0x00000080
9074 0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9075 0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9076 0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9077 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9081 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9082 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9083 0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9084 0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9085 0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9086 0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9087 0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9088 0x00000080, 0x00880680
9098 for (i = 0; i < 3; i++) in ca0132_mmio_init_sbz()
9099 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9104 tmp[0] = 0x00880480; in ca0132_mmio_init_sbz()
9105 tmp[1] = 0x00000080; in ca0132_mmio_init_sbz()
9108 tmp[0] = 0x00820680; in ca0132_mmio_init_sbz()
9109 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9112 tmp[0] = 0x00880680; in ca0132_mmio_init_sbz()
9113 tmp[1] = 0x00000083; in ca0132_mmio_init_sbz()
9116 tmp[0] = 0x00000000; in ca0132_mmio_init_sbz()
9117 tmp[1] = 0x00000000; in ca0132_mmio_init_sbz()
9121 for (i = 0; i < 2; i++) in ca0132_mmio_init_sbz()
9137 for (i = 0; i < count; i++) in ca0132_mmio_init_sbz()
9152 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9153 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9156 for (i = 0; i < count; i++) { in ca0132_mmio_init_ae5()
9159 * a different value to 0x20c. in ca0132_mmio_init_ae5()
9162 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9170 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9192 0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9193 0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9197 0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9198 0x01, 0x6b, 0x57
9203 * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9216 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9217 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x41); in ae5_register_set()
9218 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9219 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc8); in ae5_register_set()
9222 chipio_8051_write_direct(codec, 0x93, 0x10); in ae5_register_set()
9223 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9224 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x44); in ae5_register_set()
9225 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ae5_register_set()
9226 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xc2); in ae5_register_set()
9229 tmp[0] = 0x03; in ae5_register_set()
9230 tmp[1] = 0x03; in ae5_register_set()
9231 tmp[2] = 0x07; in ae5_register_set()
9233 tmp[0] = 0x0f; in ae5_register_set()
9234 tmp[1] = 0x0f; in ae5_register_set()
9235 tmp[2] = 0x0f; in ae5_register_set()
9238 for (i = cur_addr = 0; i < 3; i++, cur_addr++) in ae5_register_set()
9245 for (i = 0; cur_addr < 12; i++, cur_addr++) in ae5_register_set()
9251 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9254 ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9255 ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f); in ae5_register_set()
9257 ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f); in ae5_register_set()
9260 chipio_8051_write_direct(codec, 0x90, 0x00); in ae5_register_set()
9261 chipio_8051_write_direct(codec, 0x90, 0x10); in ae5_register_set()
9264 ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83); in ae5_register_set()
9266 chipio_write(codec, 0x18b0a4, 0x000000c2); in ae5_register_set()
9268 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9269 snd_hda_codec_write(codec, 0x01, 0, 0x7ff, 0x00); in ae5_register_set()
9298 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4); in ca0132_alt_init()
9307 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9308 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9309 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9310 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9311 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9314 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9318 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9319 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x49); in ca0132_alt_init()
9320 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_alt_init()
9321 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x88); in ca0132_alt_init()
9324 chipio_write(codec, 0x18b008, 0x000000f8); in ca0132_alt_init()
9325 chipio_write(codec, 0x18b008, 0x000000f0); in ca0132_alt_init()
9326 chipio_write(codec, 0x18b030, 0x00000020); in ca0132_alt_init()
9327 ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f); in ca0132_alt_init()
9363 return 0; in ca0132_init()
9414 for (i = 0; i < spec->num_outputs; i++) in ca0132_init()
9415 init_output(codec, spec->out_pins[i], spec->dacs[0]); in ca0132_init()
9417 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in ca0132_init()
9419 for (i = 0; i < spec->num_inputs; i++) in ca0132_init()
9426 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9427 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); in ca0132_init()
9428 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, in ca0132_init()
9429 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); in ca0132_init()
9457 return 0; in ca0132_init()
9466 init_output(codec, cfg->dig_out_pins[0], spec->dig_out); in dbpro_init()
9469 for (i = 0; i < spec->num_inputs; i++) in dbpro_init()
9472 return 0; in dbpro_init()
9537 return 0; in ca0132_suspend()
9564 spec->dacs[0] = 0x2; in ca0132_config()
9565 spec->dacs[1] = 0x3; in ca0132_config()
9566 spec->dacs[2] = 0x4; in ca0132_config()
9612 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9613 spec->out_pins[1] = 0x0f; in ca0132_config()
9614 spec->shared_out_nid = 0x2; in ca0132_config()
9615 spec->unsol_tag_hp = 0x0f; in ca0132_config()
9617 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9618 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9619 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9622 spec->input_pins[0] = 0x12; in ca0132_config()
9623 spec->input_pins[1] = 0x11; in ca0132_config()
9624 spec->input_pins[2] = 0x13; in ca0132_config()
9625 spec->shared_mic_nid = 0x7; in ca0132_config()
9626 spec->unsol_tag_amic1 = 0x11; in ca0132_config()
9631 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9632 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9633 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9634 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9635 spec->shared_out_nid = 0x2; in ca0132_config()
9639 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9640 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9641 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9644 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9645 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9646 spec->shared_mic_nid = 0x7; in ca0132_config()
9647 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9650 spec->dig_out = 0x05; in ca0132_config()
9652 spec->dig_in = 0x09; in ca0132_config()
9656 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9657 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9658 spec->out_pins[2] = 0x10; /* Center/LFE */ in ca0132_config()
9659 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9660 spec->shared_out_nid = 0x2; in ca0132_config()
9664 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9665 spec->adcs[1] = 0x8; /* Not connected, no front mic */ in ca0132_config()
9666 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9669 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9670 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9671 spec->shared_mic_nid = 0x7; in ca0132_config()
9672 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9675 spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */ in ca0132_config()
9678 spec->input_pins[0] = 0x11; /* RCA Line-in */ in ca0132_config()
9680 spec->dig_out = 0x05; in ca0132_config()
9683 spec->dig_in = 0x09; in ca0132_config()
9688 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9689 spec->out_pins[1] = 0x11; /* Rear headphone out */ in ca0132_config()
9690 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9691 spec->out_pins[3] = 0x0F; /* Rear surround */ in ca0132_config()
9692 spec->shared_out_nid = 0x2; in ca0132_config()
9696 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */ in ca0132_config()
9697 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */ in ca0132_config()
9698 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9701 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9702 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9703 spec->shared_mic_nid = 0x7; in ca0132_config()
9704 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9707 spec->dig_out = 0x05; in ca0132_config()
9712 spec->out_pins[0] = 0x0B; /* Line out */ in ca0132_config()
9713 spec->out_pins[1] = 0x0F; /* Rear headphone out */ in ca0132_config()
9714 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/ in ca0132_config()
9715 spec->out_pins[3] = 0x11; /* Rear surround */ in ca0132_config()
9716 spec->shared_out_nid = 0x2; in ca0132_config()
9720 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */ in ca0132_config()
9721 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */ in ca0132_config()
9722 spec->adcs[2] = 0x0a; /* what u hear */ in ca0132_config()
9725 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */ in ca0132_config()
9726 spec->input_pins[1] = 0x13; /* What U Hear */ in ca0132_config()
9727 spec->shared_mic_nid = 0x7; in ca0132_config()
9728 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9731 spec->dig_out = 0x05; in ca0132_config()
9736 spec->out_pins[0] = 0x0b; /* speaker out */ in ca0132_config()
9737 spec->out_pins[1] = 0x10; /* headphone out */ in ca0132_config()
9738 spec->shared_out_nid = 0x2; in ca0132_config()
9741 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ in ca0132_config()
9742 spec->adcs[1] = 0x8; /* analog mic2 */ in ca0132_config()
9743 spec->adcs[2] = 0xa; /* what u hear */ in ca0132_config()
9746 spec->input_pins[0] = 0x12; in ca0132_config()
9747 spec->input_pins[1] = 0x11; in ca0132_config()
9748 spec->input_pins[2] = 0x13; in ca0132_config()
9749 spec->shared_mic_nid = 0x7; in ca0132_config()
9750 spec->unsol_tag_amic1 = spec->input_pins[0]; in ca0132_config()
9753 spec->dig_out = 0x05; in ca0132_config()
9755 spec->dig_in = 0x09; in ca0132_config()
9780 spec->spec_init_verbs[0].nid = 0x0b; in ca0132_prepare_verbs()
9781 spec->spec_init_verbs[0].param = 0x78D; in ca0132_prepare_verbs()
9782 spec->spec_init_verbs[0].verb = 0x00; in ca0132_prepare_verbs()
9786 spec->spec_init_verbs[2].nid = 0x0b; in ca0132_prepare_verbs()
9788 spec->spec_init_verbs[2].verb = 0x02; in ca0132_prepare_verbs()
9790 spec->spec_init_verbs[3].nid = 0x10; in ca0132_prepare_verbs()
9791 spec->spec_init_verbs[3].param = 0x78D; in ca0132_prepare_verbs()
9792 spec->spec_init_verbs[3].verb = 0x02; in ca0132_prepare_verbs()
9794 spec->spec_init_verbs[4].nid = 0x10; in ca0132_prepare_verbs()
9796 spec->spec_init_verbs[4].verb = 0x02; in ca0132_prepare_verbs()
9800 return 0; in ca0132_prepare_verbs()
9814 case 0x11020033: in sbz_detect_quirk()
9817 case 0x1102003f: in sbz_detect_quirk()
9864 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9868 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9874 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9878 spec->mixers[0] = r3di_mixer; in patch_ca0132()
9882 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9886 spec->mixers[0] = desktop_mixer; in patch_ca0132()
9890 spec->mixers[0] = ca0132_mixer; in patch_ca0132()
9919 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
9937 if (err < 0) in patch_ca0132()
9941 if (err < 0) in patch_ca0132()
9944 return 0; in patch_ca0132()
9955 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),