43 	chip->comm_page->ext_box_status = cpu_to_le32(E3G_ASIC_NOT_LOADED);  in check_asic_status()
53 	box_status = le32_to_cpu(chip->comm_page->ext_box_status);  in check_asic_status()
66 	return le32_to_cpu(chip->comm_page->e3g_frq_register);  in get_frq_reg()
87 	if (ctl_reg != chip->comm_page->control_register ||  in write_control_reg()
88 	    frq_reg != chip->comm_page->e3g_frq_register || force) {  in write_control_reg()
89 		chip->comm_page->e3g_frq_register = frq_reg;  in write_control_reg()
90 		chip->comm_page->control_register = ctl_reg;  in write_control_reg()
181 	control_reg = le32_to_cpu(chip->comm_page->control_register);  in set_professional_spdif()
199 	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);  in detect_input_clocks()
267 		chip->comm_page->sample_rate = cpu_to_le32(rate);  in set_sample_rate()
278 	control_reg = le32_to_cpu(chip->comm_page->control_register);  in set_sample_rate()
317 	chip->comm_page->sample_rate = cpu_to_le32(rate);	/* ignored by the DSP */  in set_sample_rate()
335 	control_reg = le32_to_cpu(chip->comm_page->control_register) &  in set_input_clock()
337 	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);  in set_input_clock()
408 	control_reg = le32_to_cpu(chip->comm_page->control_register);  in dsp_set_digital_mode()