Lines Matching full:256
34 #define SRC_CTL 0x1A0000 /* 0x1A0000 + (256 * Chn) */
35 #define SRC_CCR 0x1A0004 /* 0x1A0004 + (256 * Chn) */
36 #define SRC_IMAP 0x1A0008 /* 0x1A0008 + (256 * Chn) */
37 #define SRC_CA 0x1A0010 /* 0x1A0010 + (256 * Chn) */
38 #define SRC_CF 0x1A0014 /* 0x1A0014 + (256 * Chn) */
39 #define SRC_SA 0x1A0018 /* 0x1A0018 + (256 * Chn) */
40 #define SRC_LA 0x1A001C /* 0x1A001C + (256 * Chn) */
41 #define SRC_CTLSWR 0x1A0020 /* 0x1A0020 + (256 * Chn) */
42 #define SRC_CD 0x1A0080 /* 0x1A0080 + (256 * Chn) + (4 * Regn) */
44 #define SRC_IP 0x1A102C /* 0x1A102C + (256 * Regn) */
45 #define SRC_ENB 0x1A282C /* 0x1A282C + (256 * Regn) */