Lines Matching +full:0 +full:xe0
43 #define OPL4_REG_TEST0 0x00
44 #define OPL4_REG_TEST1 0x01
46 #define OPL4_REG_MEMORY_CONFIGURATION 0x02
47 #define OPL4_MODE_BIT 0x01
48 #define OPL4_MTYPE_BIT 0x02
49 #define OPL4_TONE_HEADER_MASK 0x1c
50 #define OPL4_DEVICE_ID_MASK 0xe0
52 #define OPL4_REG_MEMORY_ADDRESS_HIGH 0x03
53 #define OPL4_REG_MEMORY_ADDRESS_MID 0x04
54 #define OPL4_REG_MEMORY_ADDRESS_LOW 0x05
55 #define OPL4_REG_MEMORY_DATA 0x06
61 * Wave Table Number low bits (0x08 to 0x1F)
63 #define OPL4_REG_TONE_NUMBER 0x08
65 /* Wave Table Number high bit, F-Number low bits (0x20 to 0x37) */
66 #define OPL4_REG_F_NUMBER 0x20
67 #define OPL4_TONE_NUMBER_BIT8 0x01
68 #define OPL4_F_NUMBER_LOW_MASK 0xfe
70 /* F-Number high bits, Octave, Pseudo-Reverb (0x38 to 0x4F) */
71 #define OPL4_REG_OCTAVE 0x38
72 #define OPL4_F_NUMBER_HIGH_MASK 0x07
73 #define OPL4_BLOCK_MASK 0xf0
74 #define OPL4_PSEUDO_REVERB_BIT 0x08
76 /* Total Level, Level Direct (0x50 to 0x67) */
77 #define OPL4_REG_LEVEL 0x50
78 #define OPL4_TOTAL_LEVEL_MASK 0xfe
79 #define OPL4_LEVEL_DIRECT_BIT 0x01
81 /* Key On, Damp, LFO RST, CH, Panpot (0x68 to 0x7F) */
82 #define OPL4_REG_MISC 0x68
83 #define OPL4_KEY_ON_BIT 0x80
84 #define OPL4_DAMP_BIT 0x40
85 #define OPL4_LFO_RESET_BIT 0x20
86 #define OPL4_OUTPUT_CHANNEL_BIT 0x10
87 #define OPL4_PAN_POT_MASK 0x0f
89 /* LFO, VIB (0x80 to 0x97) */
90 #define OPL4_REG_LFO_VIBRATO 0x80
91 #define OPL4_LFO_FREQUENCY_MASK 0x38
92 #define OPL4_VIBRATO_DEPTH_MASK 0x07
93 #define OPL4_CHORUS_SEND_MASK 0xc0 /* ML only */
95 /* Attack / Decay 1 rate (0x98 to 0xAF) */
96 #define OPL4_REG_ATTACK_DECAY1 0x98
97 #define OPL4_ATTACK_RATE_MASK 0xf0
98 #define OPL4_DECAY1_RATE_MASK 0x0f
100 /* Decay level / 2 rate (0xB0 to 0xC7) */
101 #define OPL4_REG_LEVEL_DECAY2 0xb0
102 #define OPL4_DECAY_LEVEL_MASK 0xf0
103 #define OPL4_DECAY2_RATE_MASK 0x0f
105 /* Release rate / Rate correction (0xC8 to 0xDF) */
106 #define OPL4_REG_RELEASE_CORRECTION 0xc8
107 #define OPL4_RELEASE_RATE_MASK 0x0f
108 #define OPL4_RATE_INTERPOLATION_MASK 0xf0
110 /* AM (0xE0 to 0xF7) */
111 #define OPL4_REG_TREMOLO 0xe0
112 #define OPL4_TREMOLO_DEPTH_MASK 0x07
113 #define OPL4_REVERB_SEND_MASK 0xe0 /* ML only */
116 #define OPL4_REG_MIX_CONTROL_FM 0xf8
117 #define OPL4_REG_MIX_CONTROL_PCM 0xf9
118 #define OPL4_MIX_LEFT_MASK 0x07
119 #define OPL4_MIX_RIGHT_MASK 0x38
121 #define OPL4_REG_ATC 0xfa
122 #define OPL4_ATC_BIT 0x01 /* ???, ML only */
125 #define OPL4_STATUS_BUSY 0x01
126 #define OPL4_STATUS_LOAD 0x02
215 static inline int snd_opl4_create_proc(struct snd_opl4 *opl4) { return 0; } in snd_opl4_create_proc()