39 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_disable_reg()  local
43 	irq_reg_writel(gc, mask, ct->regs.disable);  in irq_gc_mask_disable_reg()
44 	*ct->mask_cache &= ~mask;  in irq_gc_mask_disable_reg()
58 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_set_bit()  local
62 	*ct->mask_cache |= mask;  in irq_gc_mask_set_bit()
63 	irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask);  in irq_gc_mask_set_bit()
78 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_clr_bit()  local
82 	*ct->mask_cache &= ~mask;  in irq_gc_mask_clr_bit()
83 	irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask);  in irq_gc_mask_clr_bit()
98 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_unmask_enable_reg()  local
102 	irq_reg_writel(gc, mask, ct->regs.enable);  in irq_gc_unmask_enable_reg()
103 	*ct->mask_cache |= mask;  in irq_gc_unmask_enable_reg()
114 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_ack_set_bit()  local
118 	irq_reg_writel(gc, mask, ct->regs.ack);  in irq_gc_ack_set_bit()
130 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_ack_clr_bit()  local
134 	irq_reg_writel(gc, mask, ct->regs.ack);  in irq_gc_ack_clr_bit()
153 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_mask_disable_and_ack_set()  local
157 	irq_reg_writel(gc, mask, ct->regs.disable);  in irq_gc_mask_disable_and_ack_set()
158 	*ct->mask_cache &= ~mask;  in irq_gc_mask_disable_and_ack_set()
159 	irq_reg_writel(gc, mask, ct->regs.ack);  in irq_gc_mask_disable_and_ack_set()
170 	struct irq_chip_type *ct = irq_data_get_chip_type(d);  in irq_gc_eoi()  local
174 	irq_reg_writel(gc, mask, ct->regs.eoi);  in irq_gc_eoi()
256 	struct irq_chip_type *ct = gc->chip_types;  in irq_gc_init_mask_cache()  local
257 	u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask;  in irq_gc_init_mask_cache()
262 			mskptr = &ct[i].mask_cache_priv;  in irq_gc_init_mask_cache()
263 			mskreg = ct[i].regs.mask;  in irq_gc_init_mask_cache()
265 		ct[i].mask_cache = mskptr;  in irq_gc_init_mask_cache()
383 	struct irq_chip_type *ct;  in irq_map_generic_chip()  local
400 	ct = gc->chip_types;  in irq_map_generic_chip()
401 	chip = &ct->chip;  in irq_map_generic_chip()
422 	irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL);  in irq_map_generic_chip()
470 	struct irq_chip_type *ct = gc->chip_types;  in irq_setup_generic_chip()  local
471 	struct irq_chip *chip = &ct->chip;  in irq_setup_generic_chip()
496 		irq_set_chip_and_handler(i, chip, ct->handler);  in irq_setup_generic_chip()
514 	struct irq_chip_type *ct = gc->chip_types;  in irq_setup_alt_chip()  local
517 	for (i = 0; i < gc->num_ct; i++, ct++) {  in irq_setup_alt_chip()
518 		if (ct->type & type) {  in irq_setup_alt_chip()
519 			d->chip = &ct->chip;  in irq_setup_alt_chip()
520 			irq_data_to_desc(d)->handle_irq = ct->handler;  in irq_setup_alt_chip()
583 		struct irq_chip_type *ct = gc->chip_types;  in irq_gc_suspend()  local
585 		if (ct->chip.irq_suspend) {  in irq_gc_suspend()
589 				ct->chip.irq_suspend(data);  in irq_gc_suspend()
603 		struct irq_chip_type *ct = gc->chip_types;  in irq_gc_resume()  local
608 		if (ct->chip.irq_resume) {  in irq_gc_resume()
612 				ct->chip.irq_resume(data);  in irq_gc_resume()
626 		struct irq_chip_type *ct = gc->chip_types;  in irq_gc_shutdown()  local
628 		if (ct->chip.irq_pm_shutdown) {  in irq_gc_shutdown()
632 				ct->chip.irq_pm_shutdown(data);  in irq_gc_shutdown()