Lines Matching refs:__u64
292 __u64 sram_base_address;
293 __u64 dram_base_address;
294 __u64 dram_size;
313 __u64 dram_free_mem;
314 __u64 ctx_dram_mem;
329 __u64 busy_engines_mask_ext;
353 __u64 device_time;
354 __u64 host_time;
364 __u64 rx_throughput;
365 __u64 tx_throughput;
366 __u64 replay_cnt;
385 __u64 total_energy_consumption;
407 __u64 out_of_mem_drop_cnt;
408 __u64 parsing_drop_cnt;
409 __u64 queue_full_drop_cnt;
410 __u64 device_in_reset_drop_cnt;
411 __u64 max_cs_in_flight_drop_cnt;
428 __u64 return_pointer;
470 __u64 cb_handle;
485 __u64 cb_handle;
508 __u64 cb_handle;
515 __u64 signal_seq_arr;
553 __u64 chunks_restore;
556 __u64 chunks_execute;
561 __u64 chunks_store;
588 __u64 seq;
601 __u64 seq;
603 __u64 timeout_us;
645 __u64 mem_size;
651 __u64 handle;
665 __u64 hint_addr;
667 __u64 handle;
673 __u64 host_virt_addr;
683 __u64 hint_addr;
685 __u64 mem_size;
691 __u64 device_virt_addr;
711 __u64 device_virt_addr;
717 __u64 handle;
730 __u64 buffer_address;
733 __u64 buffer_size;
742 __u64 buffer_address;
745 __u64 buffer_size;
754 __u64 he_mask;
755 __u64 sp_mask;
766 __u64 start_addr0;
767 __u64 addr_mask0;
769 __u64 start_addr1;
770 __u64 addr_mask1;
783 __u64 event_types[HL_DEBUG_MAX_AUX_VALUES];
814 __u64 input_ptr;
816 __u64 output_ptr;