Lines Matching +full:min +full:- +full:sample +full:- +full:time
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
55 /* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
82 uint32_t bclk_delay; /* guaranteed time (ms) for which BCLK
87 /* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */
95 /* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
106 /* DMIC Configuration Request - SOF_IPC_DAI_DMIC_CONFIG */
121 * that delays the sampling time of data by half cycles of DMIC source clock
149 * range 1.0 - 3.2 MHz is usually supported microphones. Some microphones are
150 * multi-mode capable and there may be denied mic clock frequencies between
154 * The duty cycle could be set to 48-52% if not known. Generally these
158 * The microphone clock needs to be usually about 50-80 times the used audio
159 * sample rate. With highest sample rates above 48 kHz this can relaxed
162 * The parameter wake_up_time describes how long time the microphone needs
164 * will mute the captured audio for the given time. The min_clock_on_time
166 * will keep the clock active after capture stop if this time is not yet
175 uint32_t pdmclk_max; /**< Maximum microphone clock in Hz (min...N) */
177 uint32_t fifo_fs; /**< FIFO sample rate in Hz (8000..96000) */
182 uint16_t duty_min; /**< Min. mic clock duty cycle in % (20..80) */
183 uint16_t duty_max; /**< Max. mic clock duty cycle in % (min..80) */
188 uint32_t wake_up_time; /**< Time from clock start to data (us) */
189 uint32_t min_clock_on_time; /**< Min. time that clk is kept on (us) */