Lines Matching +full:6 +full:- +full:bit
1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
36 #define SDW_DP0_INT_TEST_FAIL BIT(0)
37 #define SDW_DP0_INT_PORT_READY BIT(1)
38 #define SDW_DP0_INT_BRA_FAILURE BIT(2)
39 #define SDW_DP0_SDCA_CASCADE BIT(3)
40 /* BIT(4) not allocated in SoundWire specification 1.2 */
41 #define SDW_DP0_INT_IMPDEF1 BIT(5)
42 #define SDW_DP0_INT_IMPDEF2 BIT(6)
43 #define SDW_DP0_INT_IMPDEF3 BIT(7)
46 #define SDW_DP0_PORTCTRL_NXTINVBANK BIT(4)
47 #define SDW_DP0_PORTCTRL_BPT_PAYLD GENMASK(7, 6)
61 #define SDW_SCP_INT1_PARITY BIT(0)
62 #define SDW_SCP_INT1_BUS_CLASH BIT(1)
63 #define SDW_SCP_INT1_IMPL_DEF BIT(2)
64 #define SDW_SCP_INT1_SCP2_CASCADE BIT(7)
65 #define SDW_SCP_INT1_PORT0_3 GENMASK(6, 3)
68 #define SDW_SCP_INTSTAT2_SCP3_CASCADE BIT(7)
69 #define SDW_SCP_INTSTAT2_PORT4_10 GENMASK(6, 0)
81 #define SDW_SCP_CTRL_CLK_STP_NOW BIT(1)
82 #define SDW_SCP_CTRL_FORCE_RESET BIT(7)
85 #define SDW_SCP_STAT_CLK_STP_NF BIT(0)
86 #define SDW_SCP_STAT_HPHY_NOK BIT(5)
87 #define SDW_SCP_STAT_CURR_BANK BIT(6)
90 #define SDW_SCP_SYSTEMCTRL_CLK_STP_PREP BIT(0)
91 #define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE BIT(2)
92 #define SDW_SCP_SYSTEMCTRL_WAKE_UP_EN BIT(3)
93 #define SDW_SCP_SYSTEMCTRL_HIGH_PHY BIT(4)
96 #define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1 BIT(2)
128 #define SDW_SCP_SDCA_INT_SDCA_0 BIT(0)
129 #define SDW_SCP_SDCA_INT_SDCA_1 BIT(1)
130 #define SDW_SCP_SDCA_INT_SDCA_2 BIT(2)
131 #define SDW_SCP_SDCA_INT_SDCA_3 BIT(3)
132 #define SDW_SCP_SDCA_INT_SDCA_4 BIT(4)
133 #define SDW_SCP_SDCA_INT_SDCA_5 BIT(5)
134 #define SDW_SCP_SDCA_INT_SDCA_6 BIT(6)
135 #define SDW_SCP_SDCA_INT_SDCA_7 BIT(7)
138 #define SDW_SCP_SDCA_INT_SDCA_8 BIT(0)
139 #define SDW_SCP_SDCA_INT_SDCA_9 BIT(1)
140 #define SDW_SCP_SDCA_INT_SDCA_10 BIT(2)
141 #define SDW_SCP_SDCA_INT_SDCA_11 BIT(3)
142 #define SDW_SCP_SDCA_INT_SDCA_12 BIT(4)
143 #define SDW_SCP_SDCA_INT_SDCA_13 BIT(5)
144 #define SDW_SCP_SDCA_INT_SDCA_14 BIT(6)
145 #define SDW_SCP_SDCA_INT_SDCA_15 BIT(7)
148 #define SDW_SCP_SDCA_INT_SDCA_16 BIT(0)
149 #define SDW_SCP_SDCA_INT_SDCA_17 BIT(1)
150 #define SDW_SCP_SDCA_INT_SDCA_18 BIT(2)
151 #define SDW_SCP_SDCA_INT_SDCA_19 BIT(3)
152 #define SDW_SCP_SDCA_INT_SDCA_20 BIT(4)
153 #define SDW_SCP_SDCA_INT_SDCA_21 BIT(5)
154 #define SDW_SCP_SDCA_INT_SDCA_22 BIT(6)
155 #define SDW_SCP_SDCA_INT_SDCA_23 BIT(7)
158 #define SDW_SCP_SDCA_INT_SDCA_24 BIT(0)
159 #define SDW_SCP_SDCA_INT_SDCA_25 BIT(1)
160 #define SDW_SCP_SDCA_INT_SDCA_26 BIT(2)
161 #define SDW_SCP_SDCA_INT_SDCA_27 BIT(3)
162 #define SDW_SCP_SDCA_INT_SDCA_28 BIT(4)
163 #define SDW_SCP_SDCA_INT_SDCA_29 BIT(5)
164 #define SDW_SCP_SDCA_INT_SDCA_30 BIT(6)
165 /* BIT(7) not allocated in SoundWire 1.2 specification */
168 #define SDW_SCP_SDCA_INTMASK_SDCA_0 BIT(0)
169 #define SDW_SCP_SDCA_INTMASK_SDCA_1 BIT(1)
170 #define SDW_SCP_SDCA_INTMASK_SDCA_2 BIT(2)
171 #define SDW_SCP_SDCA_INTMASK_SDCA_3 BIT(3)
172 #define SDW_SCP_SDCA_INTMASK_SDCA_4 BIT(4)
173 #define SDW_SCP_SDCA_INTMASK_SDCA_5 BIT(5)
174 #define SDW_SCP_SDCA_INTMASK_SDCA_6 BIT(6)
175 #define SDW_SCP_SDCA_INTMASK_SDCA_7 BIT(7)
178 #define SDW_SCP_SDCA_INTMASK_SDCA_8 BIT(0)
179 #define SDW_SCP_SDCA_INTMASK_SDCA_9 BIT(1)
180 #define SDW_SCP_SDCA_INTMASK_SDCA_10 BIT(2)
181 #define SDW_SCP_SDCA_INTMASK_SDCA_11 BIT(3)
182 #define SDW_SCP_SDCA_INTMASK_SDCA_12 BIT(4)
183 #define SDW_SCP_SDCA_INTMASK_SDCA_13 BIT(5)
184 #define SDW_SCP_SDCA_INTMASK_SDCA_14 BIT(6)
185 #define SDW_SCP_SDCA_INTMASK_SDCA_15 BIT(7)
188 #define SDW_SCP_SDCA_INTMASK_SDCA_16 BIT(0)
189 #define SDW_SCP_SDCA_INTMASK_SDCA_17 BIT(1)
190 #define SDW_SCP_SDCA_INTMASK_SDCA_18 BIT(2)
191 #define SDW_SCP_SDCA_INTMASK_SDCA_19 BIT(3)
192 #define SDW_SCP_SDCA_INTMASK_SDCA_20 BIT(4)
193 #define SDW_SCP_SDCA_INTMASK_SDCA_21 BIT(5)
194 #define SDW_SCP_SDCA_INTMASK_SDCA_22 BIT(6)
195 #define SDW_SCP_SDCA_INTMASK_SDCA_23 BIT(7)
198 #define SDW_SCP_SDCA_INTMASK_SDCA_24 BIT(0)
199 #define SDW_SCP_SDCA_INTMASK_SDCA_25 BIT(1)
200 #define SDW_SCP_SDCA_INTMASK_SDCA_26 BIT(2)
201 #define SDW_SCP_SDCA_INTMASK_SDCA_27 BIT(3)
202 #define SDW_SCP_SDCA_INTMASK_SDCA_28 BIT(4)
203 #define SDW_SCP_SDCA_INTMASK_SDCA_29 BIT(5)
204 #define SDW_SCP_SDCA_INTMASK_SDCA_30 BIT(6)
205 /* BIT(7) not allocated in SoundWire 1.2 specification */
217 /* PHY registers - CTRL and STAT are the same address */
229 #define SDW_SCP_SLEW_TIME_CTRL GENMASK(7, 6)
239 #define SDW_DPN_INT_TEST_FAIL BIT(0)
240 #define SDW_DPN_INT_PORT_READY BIT(1)
241 #define SDW_DPN_INT_IMPDEF1 BIT(5)
242 #define SDW_DPN_INT_IMPDEF2 BIT(6)
243 #define SDW_DPN_INT_IMPDEF3 BIT(7)
247 #define SDW_DPN_PORTCTRL_NXTINVBANK BIT(4)