Lines Matching +full:0 +full:x01
25 #define PALMAS_CHIP_OLD_ID 0x0000
26 #define PALMAS_CHIP_ID 0xC035
27 #define PALMAS_CHIP_CHARGER_ID 0xC036
44 #define PALMAS_PMIC_FEATURE_SMPS10_BOOST BIT(0)
140 int ch3_current; /* 0: off; 1: 10uA; 2: 400uA; 3: 800 uA */
142 /* Channel 0 current source can be used for battery detection.
146 int ch0_current; /* 0: off; 1: 5uA; 2: 15uA; 3: 20 uA */
163 * 0: reload default values from OTP on warm reset
174 * 0: i2c selection of voltage
186 * 0: Off
193 * 0: Off
265 PALMAS_EXT_CONTROL_ENABLE1 = 0x1,
266 PALMAS_EXT_CONTROL_ENABLE2 = 0x2,
267 PALMAS_EXT_CONTROL_NSLEEP = 0x4,
630 #define PALMAS_GPIO_0_MUXED (1 << 0)
639 #define PALMAS_LED1_MUXED (1 << 0)
642 #define PALMAS_PWM1_MUXED (1 << 0)
647 #define PALMAS_BASE_TO_REG(x, y) ((x & 0xFF) + y)
650 #define PALMAS_SMPS_DVS_BASE 0x020
651 #define PALMAS_RTC_BASE 0x100
652 #define PALMAS_VALIDITY_BASE 0x118
653 #define PALMAS_SMPS_BASE 0x120
654 #define PALMAS_LDO_BASE 0x150
655 #define PALMAS_DVFS_BASE 0x180
656 #define PALMAS_PMU_CONTROL_BASE 0x1A0
657 #define PALMAS_RESOURCE_BASE 0x1D4
658 #define PALMAS_PU_PD_OD_BASE 0x1F0
659 #define PALMAS_LED_BASE 0x200
660 #define PALMAS_INTERRUPT_BASE 0x210
661 #define PALMAS_USB_OTG_BASE 0x250
662 #define PALMAS_VIBRATOR_BASE 0x270
663 #define PALMAS_GPIO_BASE 0x280
664 #define PALMAS_USB_BASE 0x290
665 #define PALMAS_GPADC_BASE 0x2C0
666 #define PALMAS_TRIM_GPADC_BASE 0x3CD
669 #define PALMAS_SECONDS_REG 0x00
670 #define PALMAS_MINUTES_REG 0x01
671 #define PALMAS_HOURS_REG 0x02
672 #define PALMAS_DAYS_REG 0x03
673 #define PALMAS_MONTHS_REG 0x04
674 #define PALMAS_YEARS_REG 0x05
675 #define PALMAS_WEEKS_REG 0x06
676 #define PALMAS_ALARM_SECONDS_REG 0x08
677 #define PALMAS_ALARM_MINUTES_REG 0x09
678 #define PALMAS_ALARM_HOURS_REG 0x0A
679 #define PALMAS_ALARM_DAYS_REG 0x0B
680 #define PALMAS_ALARM_MONTHS_REG 0x0C
681 #define PALMAS_ALARM_YEARS_REG 0x0D
682 #define PALMAS_RTC_CTRL_REG 0x10
683 #define PALMAS_RTC_STATUS_REG 0x11
684 #define PALMAS_RTC_INTERRUPTS_REG 0x12
685 #define PALMAS_RTC_COMP_LSB_REG 0x13
686 #define PALMAS_RTC_COMP_MSB_REG 0x14
687 #define PALMAS_RTC_RES_PROG_REG 0x15
688 #define PALMAS_RTC_RESET_STATUS_REG 0x16
691 #define PALMAS_SECONDS_REG_SEC1_MASK 0x70
692 #define PALMAS_SECONDS_REG_SEC1_SHIFT 0x04
693 #define PALMAS_SECONDS_REG_SEC0_MASK 0x0F
694 #define PALMAS_SECONDS_REG_SEC0_SHIFT 0x00
697 #define PALMAS_MINUTES_REG_MIN1_MASK 0x70
698 #define PALMAS_MINUTES_REG_MIN1_SHIFT 0x04
699 #define PALMAS_MINUTES_REG_MIN0_MASK 0x0F
700 #define PALMAS_MINUTES_REG_MIN0_SHIFT 0x00
703 #define PALMAS_HOURS_REG_PM_NAM 0x80
704 #define PALMAS_HOURS_REG_PM_NAM_SHIFT 0x07
705 #define PALMAS_HOURS_REG_HOUR1_MASK 0x30
706 #define PALMAS_HOURS_REG_HOUR1_SHIFT 0x04
707 #define PALMAS_HOURS_REG_HOUR0_MASK 0x0F
708 #define PALMAS_HOURS_REG_HOUR0_SHIFT 0x00
711 #define PALMAS_DAYS_REG_DAY1_MASK 0x30
712 #define PALMAS_DAYS_REG_DAY1_SHIFT 0x04
713 #define PALMAS_DAYS_REG_DAY0_MASK 0x0F
714 #define PALMAS_DAYS_REG_DAY0_SHIFT 0x00
717 #define PALMAS_MONTHS_REG_MONTH1 0x10
718 #define PALMAS_MONTHS_REG_MONTH1_SHIFT 0x04
719 #define PALMAS_MONTHS_REG_MONTH0_MASK 0x0F
720 #define PALMAS_MONTHS_REG_MONTH0_SHIFT 0x00
723 #define PALMAS_YEARS_REG_YEAR1_MASK 0xf0
724 #define PALMAS_YEARS_REG_YEAR1_SHIFT 0x04
725 #define PALMAS_YEARS_REG_YEAR0_MASK 0x0F
726 #define PALMAS_YEARS_REG_YEAR0_SHIFT 0x00
729 #define PALMAS_WEEKS_REG_WEEK_MASK 0x07
730 #define PALMAS_WEEKS_REG_WEEK_SHIFT 0x00
733 #define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_MASK 0x70
734 #define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT 0x04
735 #define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK 0x0F
736 #define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT 0x00
739 #define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_MASK 0x70
740 #define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT 0x04
741 #define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK 0x0F
742 #define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT 0x00
745 #define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM 0x80
746 #define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT 0x07
747 #define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_MASK 0x30
748 #define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT 0x04
749 #define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK 0x0F
750 #define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT 0x00
753 #define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_MASK 0x30
754 #define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT 0x04
755 #define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK 0x0F
756 #define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT 0x00
759 #define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1 0x10
760 #define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT 0x04
761 #define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK 0x0F
762 #define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT 0x00
765 #define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_MASK 0xf0
766 #define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT 0x04
767 #define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK 0x0F
768 #define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT 0x00
771 #define PALMAS_RTC_CTRL_REG_RTC_V_OPT 0x80
772 #define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT 0x07
773 #define PALMAS_RTC_CTRL_REG_GET_TIME 0x40
774 #define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT 0x06
775 #define PALMAS_RTC_CTRL_REG_SET_32_COUNTER 0x20
776 #define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT 0x05
777 #define PALMAS_RTC_CTRL_REG_TEST_MODE 0x10
778 #define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT 0x04
779 #define PALMAS_RTC_CTRL_REG_MODE_12_24 0x08
780 #define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT 0x03
781 #define PALMAS_RTC_CTRL_REG_AUTO_COMP 0x04
782 #define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT 0x02
783 #define PALMAS_RTC_CTRL_REG_ROUND_30S 0x02
784 #define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT 0x01
785 #define PALMAS_RTC_CTRL_REG_STOP_RTC 0x01
786 #define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT 0x00
789 #define PALMAS_RTC_STATUS_REG_POWER_UP 0x80
790 #define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT 0x07
791 #define PALMAS_RTC_STATUS_REG_ALARM 0x40
792 #define PALMAS_RTC_STATUS_REG_ALARM_SHIFT 0x06
793 #define PALMAS_RTC_STATUS_REG_EVENT_1D 0x20
794 #define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT 0x05
795 #define PALMAS_RTC_STATUS_REG_EVENT_1H 0x10
796 #define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT 0x04
797 #define PALMAS_RTC_STATUS_REG_EVENT_1M 0x08
798 #define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT 0x03
799 #define PALMAS_RTC_STATUS_REG_EVENT_1S 0x04
800 #define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT 0x02
801 #define PALMAS_RTC_STATUS_REG_RUN 0x02
802 #define PALMAS_RTC_STATUS_REG_RUN_SHIFT 0x01
805 #define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN 0x10
806 #define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT 0x04
807 #define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM 0x08
808 #define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT 0x03
809 #define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER 0x04
810 #define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT 0x02
811 #define PALMAS_RTC_INTERRUPTS_REG_EVERY_MASK 0x03
812 #define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT 0x00
815 #define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK 0xFF
816 #define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT 0x00
819 #define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK 0xFF
820 #define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT 0x00
823 #define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK 0x3F
824 #define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT 0x00
827 #define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS 0x01
828 #define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT 0x00
831 #define PALMAS_BACKUP0 0x00
832 #define PALMAS_BACKUP1 0x01
833 #define PALMAS_BACKUP2 0x02
834 #define PALMAS_BACKUP3 0x03
835 #define PALMAS_BACKUP4 0x04
836 #define PALMAS_BACKUP5 0x05
837 #define PALMAS_BACKUP6 0x06
838 #define PALMAS_BACKUP7 0x07
841 #define PALMAS_BACKUP0_BACKUP_MASK 0xFF
842 #define PALMAS_BACKUP0_BACKUP_SHIFT 0x00
845 #define PALMAS_BACKUP1_BACKUP_MASK 0xFF
846 #define PALMAS_BACKUP1_BACKUP_SHIFT 0x00
849 #define PALMAS_BACKUP2_BACKUP_MASK 0xFF
850 #define PALMAS_BACKUP2_BACKUP_SHIFT 0x00
853 #define PALMAS_BACKUP3_BACKUP_MASK 0xFF
854 #define PALMAS_BACKUP3_BACKUP_SHIFT 0x00
857 #define PALMAS_BACKUP4_BACKUP_MASK 0xFF
858 #define PALMAS_BACKUP4_BACKUP_SHIFT 0x00
861 #define PALMAS_BACKUP5_BACKUP_MASK 0xFF
862 #define PALMAS_BACKUP5_BACKUP_SHIFT 0x00
865 #define PALMAS_BACKUP6_BACKUP_MASK 0xFF
866 #define PALMAS_BACKUP6_BACKUP_SHIFT 0x00
869 #define PALMAS_BACKUP7_BACKUP_MASK 0xFF
870 #define PALMAS_BACKUP7_BACKUP_SHIFT 0x00
873 #define PALMAS_SMPS12_CTRL 0x00
874 #define PALMAS_SMPS12_TSTEP 0x01
875 #define PALMAS_SMPS12_FORCE 0x02
876 #define PALMAS_SMPS12_VOLTAGE 0x03
877 #define PALMAS_SMPS3_CTRL 0x04
878 #define PALMAS_SMPS3_VOLTAGE 0x07
879 #define PALMAS_SMPS45_CTRL 0x08
880 #define PALMAS_SMPS45_TSTEP 0x09
881 #define PALMAS_SMPS45_FORCE 0x0A
882 #define PALMAS_SMPS45_VOLTAGE 0x0B
883 #define PALMAS_SMPS6_CTRL 0x0C
884 #define PALMAS_SMPS6_TSTEP 0x0D
885 #define PALMAS_SMPS6_FORCE 0x0E
886 #define PALMAS_SMPS6_VOLTAGE 0x0F
887 #define PALMAS_SMPS7_CTRL 0x10
888 #define PALMAS_SMPS7_VOLTAGE 0x13
889 #define PALMAS_SMPS8_CTRL 0x14
890 #define PALMAS_SMPS8_TSTEP 0x15
891 #define PALMAS_SMPS8_FORCE 0x16
892 #define PALMAS_SMPS8_VOLTAGE 0x17
893 #define PALMAS_SMPS9_CTRL 0x18
894 #define PALMAS_SMPS9_VOLTAGE 0x1B
895 #define PALMAS_SMPS10_CTRL 0x1C
896 #define PALMAS_SMPS10_STATUS 0x1F
897 #define PALMAS_SMPS_CTRL 0x24
898 #define PALMAS_SMPS_PD_CTRL 0x25
899 #define PALMAS_SMPS_DITHER_EN 0x26
900 #define PALMAS_SMPS_THERMAL_EN 0x27
901 #define PALMAS_SMPS_THERMAL_STATUS 0x28
902 #define PALMAS_SMPS_SHORT_STATUS 0x29
903 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN 0x2A
904 #define PALMAS_SMPS_POWERGOOD_MASK1 0x2B
905 #define PALMAS_SMPS_POWERGOOD_MASK2 0x2C
908 #define PALMAS_SMPS12_CTRL_WR_S 0x80
909 #define PALMAS_SMPS12_CTRL_WR_S_SHIFT 0x07
910 #define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN 0x40
911 #define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
912 #define PALMAS_SMPS12_CTRL_STATUS_MASK 0x30
913 #define PALMAS_SMPS12_CTRL_STATUS_SHIFT 0x04
914 #define PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK 0x0c
915 #define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT 0x02
916 #define PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK 0x03
917 #define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT 0x00
920 #define PALMAS_SMPS12_TSTEP_TSTEP_MASK 0x03
921 #define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT 0x00
924 #define PALMAS_SMPS12_FORCE_CMD 0x80
925 #define PALMAS_SMPS12_FORCE_CMD_SHIFT 0x07
926 #define PALMAS_SMPS12_FORCE_VSEL_MASK 0x7F
927 #define PALMAS_SMPS12_FORCE_VSEL_SHIFT 0x00
930 #define PALMAS_SMPS12_VOLTAGE_RANGE 0x80
931 #define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT 0x07
932 #define PALMAS_SMPS12_VOLTAGE_VSEL_MASK 0x7F
933 #define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT 0x00
936 #define PALMAS_SMPS3_CTRL_WR_S 0x80
937 #define PALMAS_SMPS3_CTRL_WR_S_SHIFT 0x07
938 #define PALMAS_SMPS3_CTRL_STATUS_MASK 0x30
939 #define PALMAS_SMPS3_CTRL_STATUS_SHIFT 0x04
940 #define PALMAS_SMPS3_CTRL_MODE_SLEEP_MASK 0x0c
941 #define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT 0x02
942 #define PALMAS_SMPS3_CTRL_MODE_ACTIVE_MASK 0x03
943 #define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0x00
946 #define PALMAS_SMPS3_VOLTAGE_RANGE 0x80
947 #define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT 0x07
948 #define PALMAS_SMPS3_VOLTAGE_VSEL_MASK 0x7F
949 #define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT 0x00
952 #define PALMAS_SMPS45_CTRL_WR_S 0x80
953 #define PALMAS_SMPS45_CTRL_WR_S_SHIFT 0x07
954 #define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN 0x40
955 #define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
956 #define PALMAS_SMPS45_CTRL_STATUS_MASK 0x30
957 #define PALMAS_SMPS45_CTRL_STATUS_SHIFT 0x04
958 #define PALMAS_SMPS45_CTRL_MODE_SLEEP_MASK 0x0c
959 #define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT 0x02
960 #define PALMAS_SMPS45_CTRL_MODE_ACTIVE_MASK 0x03
961 #define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT 0x00
964 #define PALMAS_SMPS45_TSTEP_TSTEP_MASK 0x03
965 #define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT 0x00
968 #define PALMAS_SMPS45_FORCE_CMD 0x80
969 #define PALMAS_SMPS45_FORCE_CMD_SHIFT 0x07
970 #define PALMAS_SMPS45_FORCE_VSEL_MASK 0x7F
971 #define PALMAS_SMPS45_FORCE_VSEL_SHIFT 0x00
974 #define PALMAS_SMPS45_VOLTAGE_RANGE 0x80
975 #define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT 0x07
976 #define PALMAS_SMPS45_VOLTAGE_VSEL_MASK 0x7F
977 #define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT 0x00
980 #define PALMAS_SMPS6_CTRL_WR_S 0x80
981 #define PALMAS_SMPS6_CTRL_WR_S_SHIFT 0x07
982 #define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN 0x40
983 #define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
984 #define PALMAS_SMPS6_CTRL_STATUS_MASK 0x30
985 #define PALMAS_SMPS6_CTRL_STATUS_SHIFT 0x04
986 #define PALMAS_SMPS6_CTRL_MODE_SLEEP_MASK 0x0c
987 #define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT 0x02
988 #define PALMAS_SMPS6_CTRL_MODE_ACTIVE_MASK 0x03
989 #define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT 0x00
992 #define PALMAS_SMPS6_TSTEP_TSTEP_MASK 0x03
993 #define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT 0x00
996 #define PALMAS_SMPS6_FORCE_CMD 0x80
997 #define PALMAS_SMPS6_FORCE_CMD_SHIFT 0x07
998 #define PALMAS_SMPS6_FORCE_VSEL_MASK 0x7F
999 #define PALMAS_SMPS6_FORCE_VSEL_SHIFT 0x00
1002 #define PALMAS_SMPS6_VOLTAGE_RANGE 0x80
1003 #define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT 0x07
1004 #define PALMAS_SMPS6_VOLTAGE_VSEL_MASK 0x7F
1005 #define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT 0x00
1008 #define PALMAS_SMPS7_CTRL_WR_S 0x80
1009 #define PALMAS_SMPS7_CTRL_WR_S_SHIFT 0x07
1010 #define PALMAS_SMPS7_CTRL_STATUS_MASK 0x30
1011 #define PALMAS_SMPS7_CTRL_STATUS_SHIFT 0x04
1012 #define PALMAS_SMPS7_CTRL_MODE_SLEEP_MASK 0x0c
1013 #define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT 0x02
1014 #define PALMAS_SMPS7_CTRL_MODE_ACTIVE_MASK 0x03
1015 #define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT 0x00
1018 #define PALMAS_SMPS7_VOLTAGE_RANGE 0x80
1019 #define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT 0x07
1020 #define PALMAS_SMPS7_VOLTAGE_VSEL_MASK 0x7F
1021 #define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT 0x00
1024 #define PALMAS_SMPS8_CTRL_WR_S 0x80
1025 #define PALMAS_SMPS8_CTRL_WR_S_SHIFT 0x07
1026 #define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN 0x40
1027 #define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
1028 #define PALMAS_SMPS8_CTRL_STATUS_MASK 0x30
1029 #define PALMAS_SMPS8_CTRL_STATUS_SHIFT 0x04
1030 #define PALMAS_SMPS8_CTRL_MODE_SLEEP_MASK 0x0c
1031 #define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT 0x02
1032 #define PALMAS_SMPS8_CTRL_MODE_ACTIVE_MASK 0x03
1033 #define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT 0x00
1036 #define PALMAS_SMPS8_TSTEP_TSTEP_MASK 0x03
1037 #define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT 0x00
1040 #define PALMAS_SMPS8_FORCE_CMD 0x80
1041 #define PALMAS_SMPS8_FORCE_CMD_SHIFT 0x07
1042 #define PALMAS_SMPS8_FORCE_VSEL_MASK 0x7F
1043 #define PALMAS_SMPS8_FORCE_VSEL_SHIFT 0x00
1046 #define PALMAS_SMPS8_VOLTAGE_RANGE 0x80
1047 #define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT 0x07
1048 #define PALMAS_SMPS8_VOLTAGE_VSEL_MASK 0x7F
1049 #define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT 0x00
1052 #define PALMAS_SMPS9_CTRL_WR_S 0x80
1053 #define PALMAS_SMPS9_CTRL_WR_S_SHIFT 0x07
1054 #define PALMAS_SMPS9_CTRL_STATUS_MASK 0x30
1055 #define PALMAS_SMPS9_CTRL_STATUS_SHIFT 0x04
1056 #define PALMAS_SMPS9_CTRL_MODE_SLEEP_MASK 0x0c
1057 #define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT 0x02
1058 #define PALMAS_SMPS9_CTRL_MODE_ACTIVE_MASK 0x03
1059 #define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT 0x00
1062 #define PALMAS_SMPS9_VOLTAGE_RANGE 0x80
1063 #define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT 0x07
1064 #define PALMAS_SMPS9_VOLTAGE_VSEL_MASK 0x7F
1065 #define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT 0x00
1068 #define PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK 0xf0
1069 #define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT 0x04
1070 #define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK 0x0F
1071 #define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT 0x00
1074 #define PALMAS_SMPS10_STATUS_STATUS_MASK 0x0F
1075 #define PALMAS_SMPS10_STATUS_STATUS_SHIFT 0x00
1078 #define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN 0x20
1079 #define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT 0x05
1080 #define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN 0x10
1081 #define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT 0x04
1082 #define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_MASK 0x0c
1083 #define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT 0x02
1084 #define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_MASK 0x03
1085 #define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT 0x00
1088 #define PALMAS_SMPS_PD_CTRL_SMPS9 0x40
1089 #define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT 0x06
1090 #define PALMAS_SMPS_PD_CTRL_SMPS8 0x20
1091 #define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT 0x05
1092 #define PALMAS_SMPS_PD_CTRL_SMPS7 0x10
1093 #define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT 0x04
1094 #define PALMAS_SMPS_PD_CTRL_SMPS6 0x08
1095 #define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT 0x03
1096 #define PALMAS_SMPS_PD_CTRL_SMPS45 0x04
1097 #define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT 0x02
1098 #define PALMAS_SMPS_PD_CTRL_SMPS3 0x02
1099 #define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT 0x01
1100 #define PALMAS_SMPS_PD_CTRL_SMPS12 0x01
1101 #define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT 0x00
1104 #define PALMAS_SMPS_THERMAL_EN_SMPS9 0x40
1105 #define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT 0x06
1106 #define PALMAS_SMPS_THERMAL_EN_SMPS8 0x20
1107 #define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT 0x05
1108 #define PALMAS_SMPS_THERMAL_EN_SMPS6 0x08
1109 #define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT 0x03
1110 #define PALMAS_SMPS_THERMAL_EN_SMPS457 0x04
1111 #define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT 0x02
1112 #define PALMAS_SMPS_THERMAL_EN_SMPS123 0x01
1113 #define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT 0x00
1116 #define PALMAS_SMPS_THERMAL_STATUS_SMPS9 0x40
1117 #define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT 0x06
1118 #define PALMAS_SMPS_THERMAL_STATUS_SMPS8 0x20
1119 #define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT 0x05
1120 #define PALMAS_SMPS_THERMAL_STATUS_SMPS6 0x08
1121 #define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT 0x03
1122 #define PALMAS_SMPS_THERMAL_STATUS_SMPS457 0x04
1123 #define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT 0x02
1124 #define PALMAS_SMPS_THERMAL_STATUS_SMPS123 0x01
1125 #define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT 0x00
1128 #define PALMAS_SMPS_SHORT_STATUS_SMPS10 0x80
1129 #define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT 0x07
1130 #define PALMAS_SMPS_SHORT_STATUS_SMPS9 0x40
1131 #define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT 0x06
1132 #define PALMAS_SMPS_SHORT_STATUS_SMPS8 0x20
1133 #define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT 0x05
1134 #define PALMAS_SMPS_SHORT_STATUS_SMPS7 0x10
1135 #define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT 0x04
1136 #define PALMAS_SMPS_SHORT_STATUS_SMPS6 0x08
1137 #define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT 0x03
1138 #define PALMAS_SMPS_SHORT_STATUS_SMPS45 0x04
1139 #define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT 0x02
1140 #define PALMAS_SMPS_SHORT_STATUS_SMPS3 0x02
1141 #define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT 0x01
1142 #define PALMAS_SMPS_SHORT_STATUS_SMPS12 0x01
1143 #define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT 0x00
1146 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9 0x40
1147 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT 0x06
1148 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8 0x20
1149 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT 0x05
1150 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7 0x10
1151 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT 0x04
1152 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6 0x08
1153 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT 0x03
1154 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45 0x04
1155 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT 0x02
1156 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3 0x02
1157 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 0x01
1158 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12 0x01
1159 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT 0x00
1162 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10 0x80
1163 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT 0x07
1164 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9 0x40
1165 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT 0x06
1166 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8 0x20
1167 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT 0x05
1168 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7 0x10
1169 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT 0x04
1170 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6 0x08
1171 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT 0x03
1172 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45 0x04
1173 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT 0x02
1174 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3 0x02
1175 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 0x01
1176 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12 0x01
1177 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT 0x00
1180 #define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT 0x80
1181 #define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07
1182 #define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7 0x04
1183 #define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT 0x02
1184 #define PALMAS_SMPS_POWERGOOD_MASK2_VBUS 0x02
1185 #define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT 0x01
1186 #define PALMAS_SMPS_POWERGOOD_MASK2_ACOK 0x01
1187 #define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT 0x00
1190 #define PALMAS_LDO1_CTRL 0x00
1191 #define PALMAS_LDO1_VOLTAGE 0x01
1192 #define PALMAS_LDO2_CTRL 0x02
1193 #define PALMAS_LDO2_VOLTAGE 0x03
1194 #define PALMAS_LDO3_CTRL 0x04
1195 #define PALMAS_LDO3_VOLTAGE 0x05
1196 #define PALMAS_LDO4_CTRL 0x06
1197 #define PALMAS_LDO4_VOLTAGE 0x07
1198 #define PALMAS_LDO5_CTRL 0x08
1199 #define PALMAS_LDO5_VOLTAGE 0x09
1200 #define PALMAS_LDO6_CTRL 0x0A
1201 #define PALMAS_LDO6_VOLTAGE 0x0B
1202 #define PALMAS_LDO7_CTRL 0x0C
1203 #define PALMAS_LDO7_VOLTAGE 0x0D
1204 #define PALMAS_LDO8_CTRL 0x0E
1205 #define PALMAS_LDO8_VOLTAGE 0x0F
1206 #define PALMAS_LDO9_CTRL 0x10
1207 #define PALMAS_LDO9_VOLTAGE 0x11
1208 #define PALMAS_LDOLN_CTRL 0x12
1209 #define PALMAS_LDOLN_VOLTAGE 0x13
1210 #define PALMAS_LDOUSB_CTRL 0x14
1211 #define PALMAS_LDOUSB_VOLTAGE 0x15
1212 #define PALMAS_LDO_CTRL 0x1A
1213 #define PALMAS_LDO_PD_CTRL1 0x1B
1214 #define PALMAS_LDO_PD_CTRL2 0x1C
1215 #define PALMAS_LDO_SHORT_STATUS1 0x1D
1216 #define PALMAS_LDO_SHORT_STATUS2 0x1E
1219 #define PALMAS_LDO1_CTRL_WR_S 0x80
1220 #define PALMAS_LDO1_CTRL_WR_S_SHIFT 0x07
1221 #define PALMAS_LDO1_CTRL_STATUS 0x10
1222 #define PALMAS_LDO1_CTRL_STATUS_SHIFT 0x04
1223 #define PALMAS_LDO1_CTRL_MODE_SLEEP 0x04
1224 #define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT 0x02
1225 #define PALMAS_LDO1_CTRL_MODE_ACTIVE 0x01
1226 #define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT 0x00
1229 #define PALMAS_LDO1_VOLTAGE_VSEL_MASK 0x3F
1230 #define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT 0x00
1233 #define PALMAS_LDO2_CTRL_WR_S 0x80
1234 #define PALMAS_LDO2_CTRL_WR_S_SHIFT 0x07
1235 #define PALMAS_LDO2_CTRL_STATUS 0x10
1236 #define PALMAS_LDO2_CTRL_STATUS_SHIFT 0x04
1237 #define PALMAS_LDO2_CTRL_MODE_SLEEP 0x04
1238 #define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT 0x02
1239 #define PALMAS_LDO2_CTRL_MODE_ACTIVE 0x01
1240 #define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT 0x00
1243 #define PALMAS_LDO2_VOLTAGE_VSEL_MASK 0x3F
1244 #define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT 0x00
1247 #define PALMAS_LDO3_CTRL_WR_S 0x80
1248 #define PALMAS_LDO3_CTRL_WR_S_SHIFT 0x07
1249 #define PALMAS_LDO3_CTRL_STATUS 0x10
1250 #define PALMAS_LDO3_CTRL_STATUS_SHIFT 0x04
1251 #define PALMAS_LDO3_CTRL_MODE_SLEEP 0x04
1252 #define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT 0x02
1253 #define PALMAS_LDO3_CTRL_MODE_ACTIVE 0x01
1254 #define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT 0x00
1257 #define PALMAS_LDO3_VOLTAGE_VSEL_MASK 0x3F
1258 #define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT 0x00
1261 #define PALMAS_LDO4_CTRL_WR_S 0x80
1262 #define PALMAS_LDO4_CTRL_WR_S_SHIFT 0x07
1263 #define PALMAS_LDO4_CTRL_STATUS 0x10
1264 #define PALMAS_LDO4_CTRL_STATUS_SHIFT 0x04
1265 #define PALMAS_LDO4_CTRL_MODE_SLEEP 0x04
1266 #define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT 0x02
1267 #define PALMAS_LDO4_CTRL_MODE_ACTIVE 0x01
1268 #define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT 0x00
1271 #define PALMAS_LDO4_VOLTAGE_VSEL_MASK 0x3F
1272 #define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT 0x00
1275 #define PALMAS_LDO5_CTRL_WR_S 0x80
1276 #define PALMAS_LDO5_CTRL_WR_S_SHIFT 0x07
1277 #define PALMAS_LDO5_CTRL_STATUS 0x10
1278 #define PALMAS_LDO5_CTRL_STATUS_SHIFT 0x04
1279 #define PALMAS_LDO5_CTRL_MODE_SLEEP 0x04
1280 #define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT 0x02
1281 #define PALMAS_LDO5_CTRL_MODE_ACTIVE 0x01
1282 #define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT 0x00
1285 #define PALMAS_LDO5_VOLTAGE_VSEL_MASK 0x3F
1286 #define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT 0x00
1289 #define PALMAS_LDO6_CTRL_WR_S 0x80
1290 #define PALMAS_LDO6_CTRL_WR_S_SHIFT 0x07
1291 #define PALMAS_LDO6_CTRL_LDO_VIB_EN 0x40
1292 #define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT 0x06
1293 #define PALMAS_LDO6_CTRL_STATUS 0x10
1294 #define PALMAS_LDO6_CTRL_STATUS_SHIFT 0x04
1295 #define PALMAS_LDO6_CTRL_MODE_SLEEP 0x04
1296 #define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT 0x02
1297 #define PALMAS_LDO6_CTRL_MODE_ACTIVE 0x01
1298 #define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT 0x00
1301 #define PALMAS_LDO6_VOLTAGE_VSEL_MASK 0x3F
1302 #define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT 0x00
1305 #define PALMAS_LDO7_CTRL_WR_S 0x80
1306 #define PALMAS_LDO7_CTRL_WR_S_SHIFT 0x07
1307 #define PALMAS_LDO7_CTRL_STATUS 0x10
1308 #define PALMAS_LDO7_CTRL_STATUS_SHIFT 0x04
1309 #define PALMAS_LDO7_CTRL_MODE_SLEEP 0x04
1310 #define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT 0x02
1311 #define PALMAS_LDO7_CTRL_MODE_ACTIVE 0x01
1312 #define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT 0x00
1315 #define PALMAS_LDO7_VOLTAGE_VSEL_MASK 0x3F
1316 #define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT 0x00
1319 #define PALMAS_LDO8_CTRL_WR_S 0x80
1320 #define PALMAS_LDO8_CTRL_WR_S_SHIFT 0x07
1321 #define PALMAS_LDO8_CTRL_LDO_TRACKING_EN 0x40
1322 #define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT 0x06
1323 #define PALMAS_LDO8_CTRL_STATUS 0x10
1324 #define PALMAS_LDO8_CTRL_STATUS_SHIFT 0x04
1325 #define PALMAS_LDO8_CTRL_MODE_SLEEP 0x04
1326 #define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT 0x02
1327 #define PALMAS_LDO8_CTRL_MODE_ACTIVE 0x01
1328 #define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT 0x00
1331 #define PALMAS_LDO8_VOLTAGE_VSEL_MASK 0x3F
1332 #define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT 0x00
1335 #define PALMAS_LDO9_CTRL_WR_S 0x80
1336 #define PALMAS_LDO9_CTRL_WR_S_SHIFT 0x07
1337 #define PALMAS_LDO9_CTRL_LDO_BYPASS_EN 0x40
1338 #define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT 0x06
1339 #define PALMAS_LDO9_CTRL_STATUS 0x10
1340 #define PALMAS_LDO9_CTRL_STATUS_SHIFT 0x04
1341 #define PALMAS_LDO9_CTRL_MODE_SLEEP 0x04
1342 #define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT 0x02
1343 #define PALMAS_LDO9_CTRL_MODE_ACTIVE 0x01
1344 #define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT 0x00
1347 #define PALMAS_LDO9_VOLTAGE_VSEL_MASK 0x3F
1348 #define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT 0x00
1351 #define PALMAS_LDOLN_CTRL_WR_S 0x80
1352 #define PALMAS_LDOLN_CTRL_WR_S_SHIFT 0x07
1353 #define PALMAS_LDOLN_CTRL_STATUS 0x10
1354 #define PALMAS_LDOLN_CTRL_STATUS_SHIFT 0x04
1355 #define PALMAS_LDOLN_CTRL_MODE_SLEEP 0x04
1356 #define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT 0x02
1357 #define PALMAS_LDOLN_CTRL_MODE_ACTIVE 0x01
1358 #define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT 0x00
1361 #define PALMAS_LDOLN_VOLTAGE_VSEL_MASK 0x3F
1362 #define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT 0x00
1365 #define PALMAS_LDOUSB_CTRL_WR_S 0x80
1366 #define PALMAS_LDOUSB_CTRL_WR_S_SHIFT 0x07
1367 #define PALMAS_LDOUSB_CTRL_STATUS 0x10
1368 #define PALMAS_LDOUSB_CTRL_STATUS_SHIFT 0x04
1369 #define PALMAS_LDOUSB_CTRL_MODE_SLEEP 0x04
1370 #define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT 0x02
1371 #define PALMAS_LDOUSB_CTRL_MODE_ACTIVE 0x01
1372 #define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT 0x00
1375 #define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK 0x3F
1376 #define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT 0x00
1379 #define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS 0x01
1380 #define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT 0x00
1383 #define PALMAS_LDO_PD_CTRL1_LDO8 0x80
1384 #define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT 0x07
1385 #define PALMAS_LDO_PD_CTRL1_LDO7 0x40
1386 #define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT 0x06
1387 #define PALMAS_LDO_PD_CTRL1_LDO6 0x20
1388 #define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT 0x05
1389 #define PALMAS_LDO_PD_CTRL1_LDO5 0x10
1390 #define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT 0x04
1391 #define PALMAS_LDO_PD_CTRL1_LDO4 0x08
1392 #define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT 0x03
1393 #define PALMAS_LDO_PD_CTRL1_LDO3 0x04
1394 #define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT 0x02
1395 #define PALMAS_LDO_PD_CTRL1_LDO2 0x02
1396 #define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT 0x01
1397 #define PALMAS_LDO_PD_CTRL1_LDO1 0x01
1398 #define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT 0x00
1401 #define PALMAS_LDO_PD_CTRL2_LDOUSB 0x04
1402 #define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT 0x02
1403 #define PALMAS_LDO_PD_CTRL2_LDOLN 0x02
1404 #define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT 0x01
1405 #define PALMAS_LDO_PD_CTRL2_LDO9 0x01
1406 #define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT 0x00
1409 #define PALMAS_LDO_SHORT_STATUS1_LDO8 0x80
1410 #define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT 0x07
1411 #define PALMAS_LDO_SHORT_STATUS1_LDO7 0x40
1412 #define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT 0x06
1413 #define PALMAS_LDO_SHORT_STATUS1_LDO6 0x20
1414 #define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT 0x05
1415 #define PALMAS_LDO_SHORT_STATUS1_LDO5 0x10
1416 #define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT 0x04
1417 #define PALMAS_LDO_SHORT_STATUS1_LDO4 0x08
1418 #define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT 0x03
1419 #define PALMAS_LDO_SHORT_STATUS1_LDO3 0x04
1420 #define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT 0x02
1421 #define PALMAS_LDO_SHORT_STATUS1_LDO2 0x02
1422 #define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT 0x01
1423 #define PALMAS_LDO_SHORT_STATUS1_LDO1 0x01
1424 #define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT 0x00
1427 #define PALMAS_LDO_SHORT_STATUS2_LDOVANA 0x08
1428 #define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT 0x03
1429 #define PALMAS_LDO_SHORT_STATUS2_LDOUSB 0x04
1430 #define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT 0x02
1431 #define PALMAS_LDO_SHORT_STATUS2_LDOLN 0x02
1432 #define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT 0x01
1433 #define PALMAS_LDO_SHORT_STATUS2_LDO9 0x01
1434 #define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT 0x00
1437 #define PALMAS_DEV_CTRL 0x00
1438 #define PALMAS_POWER_CTRL 0x01
1439 #define PALMAS_VSYS_LO 0x02
1440 #define PALMAS_VSYS_MON 0x03
1441 #define PALMAS_VBAT_MON 0x04
1442 #define PALMAS_WATCHDOG 0x05
1443 #define PALMAS_BOOT_STATUS 0x06
1444 #define PALMAS_BATTERY_BOUNCE 0x07
1445 #define PALMAS_BACKUP_BATTERY_CTRL 0x08
1446 #define PALMAS_LONG_PRESS_KEY 0x09
1447 #define PALMAS_OSC_THERM_CTRL 0x0A
1448 #define PALMAS_BATDEBOUNCING 0x0B
1449 #define PALMAS_SWOFF_HWRST 0x0F
1450 #define PALMAS_SWOFF_COLDRST 0x10
1451 #define PALMAS_SWOFF_STATUS 0x11
1452 #define PALMAS_PMU_CONFIG 0x12
1453 #define PALMAS_SPARE 0x14
1454 #define PALMAS_PMU_SECONDARY_INT 0x15
1455 #define PALMAS_SW_REVISION 0x17
1456 #define PALMAS_EXT_CHRG_CTRL 0x18
1457 #define PALMAS_PMU_SECONDARY_INT2 0x19
1460 #define PALMAS_DEV_CTRL_DEV_STATUS_MASK 0x0c
1461 #define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT 0x02
1462 #define PALMAS_DEV_CTRL_SW_RST 0x02
1463 #define PALMAS_DEV_CTRL_SW_RST_SHIFT 0x01
1464 #define PALMAS_DEV_CTRL_DEV_ON 0x01
1465 #define PALMAS_DEV_CTRL_DEV_ON_SHIFT 0x00
1468 #define PALMAS_POWER_CTRL_ENABLE2_MASK 0x04
1469 #define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT 0x02
1470 #define PALMAS_POWER_CTRL_ENABLE1_MASK 0x02
1471 #define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT 0x01
1472 #define PALMAS_POWER_CTRL_NSLEEP_MASK 0x01
1473 #define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT 0x00
1476 #define PALMAS_VSYS_LO_THRESHOLD_MASK 0x1F
1477 #define PALMAS_VSYS_LO_THRESHOLD_SHIFT 0x00
1480 #define PALMAS_VSYS_MON_ENABLE 0x80
1481 #define PALMAS_VSYS_MON_ENABLE_SHIFT 0x07
1482 #define PALMAS_VSYS_MON_THRESHOLD_MASK 0x3F
1483 #define PALMAS_VSYS_MON_THRESHOLD_SHIFT 0x00
1486 #define PALMAS_VBAT_MON_ENABLE 0x80
1487 #define PALMAS_VBAT_MON_ENABLE_SHIFT 0x07
1488 #define PALMAS_VBAT_MON_THRESHOLD_MASK 0x3F
1489 #define PALMAS_VBAT_MON_THRESHOLD_SHIFT 0x00
1492 #define PALMAS_WATCHDOG_LOCK 0x20
1493 #define PALMAS_WATCHDOG_LOCK_SHIFT 0x05
1494 #define PALMAS_WATCHDOG_ENABLE 0x10
1495 #define PALMAS_WATCHDOG_ENABLE_SHIFT 0x04
1496 #define PALMAS_WATCHDOG_MODE 0x08
1497 #define PALMAS_WATCHDOG_MODE_SHIFT 0x03
1498 #define PALMAS_WATCHDOG_TIMER_MASK 0x07
1499 #define PALMAS_WATCHDOG_TIMER_SHIFT 0x00
1502 #define PALMAS_BOOT_STATUS_BOOT1 0x02
1503 #define PALMAS_BOOT_STATUS_BOOT1_SHIFT 0x01
1504 #define PALMAS_BOOT_STATUS_BOOT0 0x01
1505 #define PALMAS_BOOT_STATUS_BOOT0_SHIFT 0x00
1508 #define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK 0x3F
1509 #define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT 0x00
1512 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15 0x80
1513 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT 0x07
1514 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP 0x40
1515 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT 0x06
1516 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF 0x20
1517 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT 0x05
1518 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN 0x10
1519 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT 0x04
1520 #define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG 0x08
1521 #define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT 0x03
1522 #define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_MASK 0x06
1523 #define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT 0x01
1524 #define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN 0x01
1525 #define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT 0x00
1528 #define PALMAS_LONG_PRESS_KEY_LPK_LOCK 0x80
1529 #define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT 0x07
1530 #define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR 0x10
1531 #define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT 0x04
1532 #define PALMAS_LONG_PRESS_KEY_LPK_TIME_MASK 0x0c
1533 #define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT 0x02
1534 #define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_MASK 0x03
1535 #define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT 0x00
1538 #define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP 0x80
1539 #define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT 0x07
1540 #define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP 0x40
1541 #define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT 0x06
1542 #define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP 0x20
1543 #define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT 0x05
1544 #define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP 0x10
1545 #define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT 0x04
1546 #define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_MASK 0x0c
1547 #define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT 0x02
1548 #define PALMAS_OSC_THERM_CTRL_OSC_BYPASS 0x02
1549 #define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT 0x01
1550 #define PALMAS_OSC_THERM_CTRL_OSC_HPMODE 0x01
1551 #define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT 0x00
1554 #define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS 0x80
1555 #define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT 0x07
1556 #define PALMAS_BATDEBOUNCING_BINS_DEB_MASK 0x78
1557 #define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT 0x03
1558 #define PALMAS_BATDEBOUNCING_BEXT_DEB_MASK 0x07
1559 #define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT 0x00
1562 #define PALMAS_SWOFF_HWRST_PWRON_LPK 0x80
1563 #define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT 0x07
1564 #define PALMAS_SWOFF_HWRST_PWRDOWN 0x40
1565 #define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT 0x06
1566 #define PALMAS_SWOFF_HWRST_WTD 0x20
1567 #define PALMAS_SWOFF_HWRST_WTD_SHIFT 0x05
1568 #define PALMAS_SWOFF_HWRST_TSHUT 0x10
1569 #define PALMAS_SWOFF_HWRST_TSHUT_SHIFT 0x04
1570 #define PALMAS_SWOFF_HWRST_RESET_IN 0x08
1571 #define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT 0x03
1572 #define PALMAS_SWOFF_HWRST_SW_RST 0x04
1573 #define PALMAS_SWOFF_HWRST_SW_RST_SHIFT 0x02
1574 #define PALMAS_SWOFF_HWRST_VSYS_LO 0x02
1575 #define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT 0x01
1576 #define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN 0x01
1577 #define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT 0x00
1580 #define PALMAS_SWOFF_COLDRST_PWRON_LPK 0x80
1581 #define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT 0x07
1582 #define PALMAS_SWOFF_COLDRST_PWRDOWN 0x40
1583 #define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT 0x06
1584 #define PALMAS_SWOFF_COLDRST_WTD 0x20
1585 #define PALMAS_SWOFF_COLDRST_WTD_SHIFT 0x05
1586 #define PALMAS_SWOFF_COLDRST_TSHUT 0x10
1587 #define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT 0x04
1588 #define PALMAS_SWOFF_COLDRST_RESET_IN 0x08
1589 #define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT 0x03
1590 #define PALMAS_SWOFF_COLDRST_SW_RST 0x04
1591 #define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT 0x02
1592 #define PALMAS_SWOFF_COLDRST_VSYS_LO 0x02
1593 #define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT 0x01
1594 #define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN 0x01
1595 #define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT 0x00
1598 #define PALMAS_SWOFF_STATUS_PWRON_LPK 0x80
1599 #define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT 0x07
1600 #define PALMAS_SWOFF_STATUS_PWRDOWN 0x40
1601 #define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT 0x06
1602 #define PALMAS_SWOFF_STATUS_WTD 0x20
1603 #define PALMAS_SWOFF_STATUS_WTD_SHIFT 0x05
1604 #define PALMAS_SWOFF_STATUS_TSHUT 0x10
1605 #define PALMAS_SWOFF_STATUS_TSHUT_SHIFT 0x04
1606 #define PALMAS_SWOFF_STATUS_RESET_IN 0x08
1607 #define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT 0x03
1608 #define PALMAS_SWOFF_STATUS_SW_RST 0x04
1609 #define PALMAS_SWOFF_STATUS_SW_RST_SHIFT 0x02
1610 #define PALMAS_SWOFF_STATUS_VSYS_LO 0x02
1611 #define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT 0x01
1612 #define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN 0x01
1613 #define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT 0x00
1616 #define PALMAS_PMU_CONFIG_MULTI_CELL_EN 0x40
1617 #define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT 0x06
1618 #define PALMAS_PMU_CONFIG_SPARE_MASK 0x30
1619 #define PALMAS_PMU_CONFIG_SPARE_SHIFT 0x04
1620 #define PALMAS_PMU_CONFIG_SWOFF_DLY_MASK 0x0c
1621 #define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT 0x02
1622 #define PALMAS_PMU_CONFIG_GATE_RESET_OUT 0x02
1623 #define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT 0x01
1624 #define PALMAS_PMU_CONFIG_AUTODEVON 0x01
1625 #define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT 0x00
1628 #define PALMAS_SPARE_SPARE_MASK 0xf8
1629 #define PALMAS_SPARE_SPARE_SHIFT 0x03
1630 #define PALMAS_SPARE_REGEN3_OD 0x04
1631 #define PALMAS_SPARE_REGEN3_OD_SHIFT 0x02
1632 #define PALMAS_SPARE_REGEN2_OD 0x02
1633 #define PALMAS_SPARE_REGEN2_OD_SHIFT 0x01
1634 #define PALMAS_SPARE_REGEN1_OD 0x01
1635 #define PALMAS_SPARE_REGEN1_OD_SHIFT 0x00
1638 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC 0x80
1639 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT 0x07
1640 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC 0x40
1641 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT 0x06
1642 #define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC 0x20
1643 #define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT 0x05
1644 #define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC 0x10
1645 #define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT 0x04
1646 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK 0x08
1647 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT 0x03
1648 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK 0x04
1649 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT 0x02
1650 #define PALMAS_PMU_SECONDARY_INT_BB_MASK 0x02
1651 #define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT 0x01
1652 #define PALMAS_PMU_SECONDARY_INT_FBI_MASK 0x01
1653 #define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT 0x00
1656 #define PALMAS_SW_REVISION_SW_REVISION_MASK 0xFF
1657 #define PALMAS_SW_REVISION_SW_REVISION_SHIFT 0x00
1660 #define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS 0x80
1661 #define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT 0x07
1662 #define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS 0x40
1663 #define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT 0x06
1664 #define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY 0x08
1665 #define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT 0x03
1666 #define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N 0x04
1667 #define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT 0x02
1668 #define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN 0x02
1669 #define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT 0x01
1670 #define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN 0x01
1671 #define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT 0x00
1674 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC 0x20
1675 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT 0x05
1676 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC 0x10
1677 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT 0x04
1678 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK 0x02
1679 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT 0x01
1680 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK 0x01
1681 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT 0x00
1684 #define PALMAS_CLK32KG_CTRL 0x00
1685 #define PALMAS_CLK32KGAUDIO_CTRL 0x01
1686 #define PALMAS_REGEN1_CTRL 0x02
1687 #define PALMAS_REGEN2_CTRL 0x03
1688 #define PALMAS_SYSEN1_CTRL 0x04
1689 #define PALMAS_SYSEN2_CTRL 0x05
1690 #define PALMAS_NSLEEP_RES_ASSIGN 0x06
1691 #define PALMAS_NSLEEP_SMPS_ASSIGN 0x07
1692 #define PALMAS_NSLEEP_LDO_ASSIGN1 0x08
1693 #define PALMAS_NSLEEP_LDO_ASSIGN2 0x09
1694 #define PALMAS_ENABLE1_RES_ASSIGN 0x0A
1695 #define PALMAS_ENABLE1_SMPS_ASSIGN 0x0B
1696 #define PALMAS_ENABLE1_LDO_ASSIGN1 0x0C
1697 #define PALMAS_ENABLE1_LDO_ASSIGN2 0x0D
1698 #define PALMAS_ENABLE2_RES_ASSIGN 0x0E
1699 #define PALMAS_ENABLE2_SMPS_ASSIGN 0x0F
1700 #define PALMAS_ENABLE2_LDO_ASSIGN1 0x10
1701 #define PALMAS_ENABLE2_LDO_ASSIGN2 0x11
1702 #define PALMAS_REGEN3_CTRL 0x12
1705 #define PALMAS_CLK32KG_CTRL_STATUS 0x10
1706 #define PALMAS_CLK32KG_CTRL_STATUS_SHIFT 0x04
1707 #define PALMAS_CLK32KG_CTRL_MODE_SLEEP 0x04
1708 #define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT 0x02
1709 #define PALMAS_CLK32KG_CTRL_MODE_ACTIVE 0x01
1710 #define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT 0x00
1713 #define PALMAS_CLK32KGAUDIO_CTRL_STATUS 0x10
1714 #define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT 0x04
1715 #define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3 0x08
1716 #define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT 0x03
1717 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP 0x04
1718 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT 0x02
1719 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE 0x01
1720 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT 0x00
1723 #define PALMAS_REGEN1_CTRL_STATUS 0x10
1724 #define PALMAS_REGEN1_CTRL_STATUS_SHIFT 0x04
1725 #define PALMAS_REGEN1_CTRL_MODE_SLEEP 0x04
1726 #define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT 0x02
1727 #define PALMAS_REGEN1_CTRL_MODE_ACTIVE 0x01
1728 #define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0x00
1731 #define PALMAS_REGEN2_CTRL_STATUS 0x10
1732 #define PALMAS_REGEN2_CTRL_STATUS_SHIFT 0x04
1733 #define PALMAS_REGEN2_CTRL_MODE_SLEEP 0x04
1734 #define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT 0x02
1735 #define PALMAS_REGEN2_CTRL_MODE_ACTIVE 0x01
1736 #define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0x00
1739 #define PALMAS_SYSEN1_CTRL_STATUS 0x10
1740 #define PALMAS_SYSEN1_CTRL_STATUS_SHIFT 0x04
1741 #define PALMAS_SYSEN1_CTRL_MODE_SLEEP 0x04
1742 #define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT 0x02
1743 #define PALMAS_SYSEN1_CTRL_MODE_ACTIVE 0x01
1744 #define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT 0x00
1747 #define PALMAS_SYSEN2_CTRL_STATUS 0x10
1748 #define PALMAS_SYSEN2_CTRL_STATUS_SHIFT 0x04
1749 #define PALMAS_SYSEN2_CTRL_MODE_SLEEP 0x04
1750 #define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT 0x02
1751 #define PALMAS_SYSEN2_CTRL_MODE_ACTIVE 0x01
1752 #define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT 0x00
1755 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN3 0x40
1756 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 0x06
1757 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO 0x20
1758 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT 0x05
1759 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG 0x10
1760 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT 0x04
1761 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2 0x08
1762 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT 0x03
1763 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1 0x04
1764 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT 0x02
1765 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN2 0x02
1766 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 0x01
1767 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN1 0x01
1768 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0x00
1771 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10 0x80
1772 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT 0x07
1773 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9 0x40
1774 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT 0x06
1775 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8 0x20
1776 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT 0x05
1777 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7 0x10
1778 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT 0x04
1779 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6 0x08
1780 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT 0x03
1781 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45 0x04
1782 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT 0x02
1783 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3 0x02
1784 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 0x01
1785 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12 0x01
1786 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT 0x00
1789 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8 0x80
1790 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT 0x07
1791 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7 0x40
1792 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT 0x06
1793 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6 0x20
1794 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT 0x05
1795 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5 0x10
1796 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT 0x04
1797 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4 0x08
1798 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 0x03
1799 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3 0x04
1800 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT 0x02
1801 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2 0x02
1802 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 0x01
1803 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1 0x01
1804 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0x00
1807 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB 0x04
1808 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT 0x02
1809 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN 0x02
1810 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT 0x01
1811 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9 0x01
1812 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT 0x00
1815 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN3 0x40
1816 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 0x06
1817 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO 0x20
1818 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT 0x05
1819 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG 0x10
1820 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT 0x04
1821 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2 0x08
1822 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT 0x03
1823 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1 0x04
1824 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT 0x02
1825 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN2 0x02
1826 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 0x01
1827 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN1 0x01
1828 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0x00
1831 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10 0x80
1832 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT 0x07
1833 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9 0x40
1834 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT 0x06
1835 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8 0x20
1836 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT 0x05
1837 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7 0x10
1838 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT 0x04
1839 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6 0x08
1840 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT 0x03
1841 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45 0x04
1842 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT 0x02
1843 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3 0x02
1844 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 0x01
1845 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12 0x01
1846 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT 0x00
1849 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8 0x80
1850 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT 0x07
1851 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7 0x40
1852 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT 0x06
1853 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6 0x20
1854 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT 0x05
1855 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5 0x10
1856 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT 0x04
1857 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4 0x08
1858 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 0x03
1859 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3 0x04
1860 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT 0x02
1861 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2 0x02
1862 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 0x01
1863 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1 0x01
1864 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0x00
1867 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB 0x04
1868 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT 0x02
1869 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN 0x02
1870 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT 0x01
1871 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9 0x01
1872 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT 0x00
1875 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN3 0x40
1876 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 0x06
1877 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO 0x20
1878 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT 0x05
1879 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG 0x10
1880 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT 0x04
1881 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2 0x08
1882 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT 0x03
1883 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1 0x04
1884 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT 0x02
1885 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN2 0x02
1886 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 0x01
1887 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN1 0x01
1888 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0x00
1891 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10 0x80
1892 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT 0x07
1893 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9 0x40
1894 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT 0x06
1895 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8 0x20
1896 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT 0x05
1897 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7 0x10
1898 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT 0x04
1899 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6 0x08
1900 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT 0x03
1901 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45 0x04
1902 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT 0x02
1903 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3 0x02
1904 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 0x01
1905 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12 0x01
1906 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT 0x00
1909 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8 0x80
1910 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT 0x07
1911 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7 0x40
1912 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT 0x06
1913 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6 0x20
1914 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT 0x05
1915 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5 0x10
1916 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT 0x04
1917 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4 0x08
1918 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 0x03
1919 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3 0x04
1920 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT 0x02
1921 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2 0x02
1922 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 0x01
1923 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1 0x01
1924 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0x00
1927 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB 0x04
1928 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT 0x02
1929 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN 0x02
1930 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT 0x01
1931 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9 0x01
1932 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT 0x00
1935 #define PALMAS_REGEN3_CTRL_STATUS 0x10
1936 #define PALMAS_REGEN3_CTRL_STATUS_SHIFT 0x04
1937 #define PALMAS_REGEN3_CTRL_MODE_SLEEP 0x04
1938 #define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT 0x02
1939 #define PALMAS_REGEN3_CTRL_MODE_ACTIVE 0x01
1940 #define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0x00
1943 #define PALMAS_OD_OUTPUT_CTRL2 0x02
1944 #define PALMAS_POLARITY_CTRL2 0x03
1945 #define PALMAS_PU_PD_INPUT_CTRL1 0x04
1946 #define PALMAS_PU_PD_INPUT_CTRL2 0x05
1947 #define PALMAS_PU_PD_INPUT_CTRL3 0x06
1948 #define PALMAS_PU_PD_INPUT_CTRL5 0x07
1949 #define PALMAS_OD_OUTPUT_CTRL 0x08
1950 #define PALMAS_POLARITY_CTRL 0x09
1951 #define PALMAS_PRIMARY_SECONDARY_PAD1 0x0A
1952 #define PALMAS_PRIMARY_SECONDARY_PAD2 0x0B
1953 #define PALMAS_I2C_SPI 0x0C
1954 #define PALMAS_PU_PD_INPUT_CTRL4 0x0D
1955 #define PALMAS_PRIMARY_SECONDARY_PAD3 0x0E
1956 #define PALMAS_PRIMARY_SECONDARY_PAD4 0x0F
1959 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD 0x40
1960 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT 0x06
1961 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU 0x20
1962 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT 0x05
1963 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD 0x10
1964 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT 0x04
1965 #define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD 0x04
1966 #define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT 0x02
1967 #define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU 0x02
1968 #define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT 0x01
1971 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU 0x20
1972 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT 0x05
1973 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD 0x10
1974 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT 0x04
1975 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU 0x08
1976 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT 0x03
1977 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD 0x04
1978 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT 0x02
1979 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU 0x02
1980 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT 0x01
1981 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD 0x01
1982 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT 0x00
1985 #define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD 0x40
1986 #define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT 0x06
1987 #define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD 0x10
1988 #define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT 0x04
1989 #define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD 0x04
1990 #define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT 0x02
1991 #define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD 0x01
1992 #define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT 0x00
1995 #define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD 0x80
1996 #define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT 0x07
1997 #define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD 0x40
1998 #define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT 0x06
1999 #define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD 0x20
2000 #define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT 0x05
2001 #define PALMAS_OD_OUTPUT_CTRL_INT_OD 0x08
2002 #define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT 0x03
2005 #define PALMAS_POLARITY_CTRL_INT_POLARITY 0x80
2006 #define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT 0x07
2007 #define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY 0x40
2008 #define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT 0x06
2009 #define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY 0x20
2010 #define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT 0x05
2011 #define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY 0x10
2012 #define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT 0x04
2013 #define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY 0x08
2014 #define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT 0x03
2015 #define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY 0x04
2016 #define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT 0x02
2017 #define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY 0x02
2018 #define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT 0x01
2019 #define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY 0x01
2020 #define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT 0x00
2023 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3 0x80
2024 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT 0x07
2025 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK 0x60
2026 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT 0x05
2027 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK 0x18
2028 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT 0x03
2029 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0 0x04
2030 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT 0x02
2031 #define PALMAS_PRIMARY_SECONDARY_PAD1_VAC 0x02
2032 #define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT 0x01
2033 #define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD 0x01
2034 #define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT 0x00
2037 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK 0x30
2038 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT 0x04
2039 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6 0x08
2040 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT 0x03
2041 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK 0x06
2042 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT 0x01
2043 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4 0x01
2044 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT 0x00
2047 #define PALMAS_I2C_SPI_I2C2OTP_EN 0x80
2048 #define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT 0x07
2049 #define PALMAS_I2C_SPI_I2C2OTP_PAGESEL 0x40
2050 #define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT 0x06
2051 #define PALMAS_I2C_SPI_ID_I2C2 0x20
2052 #define PALMAS_I2C_SPI_ID_I2C2_SHIFT 0x05
2053 #define PALMAS_I2C_SPI_I2C_SPI 0x10
2054 #define PALMAS_I2C_SPI_I2C_SPI_SHIFT 0x04
2055 #define PALMAS_I2C_SPI_ID_I2C1_MASK 0x0F
2056 #define PALMAS_I2C_SPI_ID_I2C1_SHIFT 0x00
2059 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD 0x40
2060 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT 0x06
2061 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD 0x10
2062 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT 0x04
2063 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD 0x04
2064 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT 0x02
2065 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD 0x01
2066 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT 0x00
2069 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2 0x02
2070 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT 0x01
2071 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1 0x01
2072 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT 0x00
2075 #define PALMAS_LED_PERIOD_CTRL 0x00
2076 #define PALMAS_LED_CTRL 0x01
2077 #define PALMAS_PWM_CTRL1 0x02
2078 #define PALMAS_PWM_CTRL2 0x03
2081 #define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_MASK 0x38
2082 #define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT 0x03
2083 #define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_MASK 0x07
2084 #define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT 0x00
2087 #define PALMAS_LED_CTRL_LED_2_SEQ 0x20
2088 #define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT 0x05
2089 #define PALMAS_LED_CTRL_LED_1_SEQ 0x10
2090 #define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT 0x04
2091 #define PALMAS_LED_CTRL_LED_2_ON_TIME_MASK 0x0c
2092 #define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT 0x02
2093 #define PALMAS_LED_CTRL_LED_1_ON_TIME_MASK 0x03
2094 #define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT 0x00
2097 #define PALMAS_PWM_CTRL1_PWM_FREQ_EN 0x02
2098 #define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT 0x01
2099 #define PALMAS_PWM_CTRL1_PWM_FREQ_SEL 0x01
2100 #define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT 0x00
2103 #define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK 0xFF
2104 #define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT 0x00
2107 #define PALMAS_INT1_STATUS 0x00
2108 #define PALMAS_INT1_MASK 0x01
2109 #define PALMAS_INT1_LINE_STATE 0x02
2110 #define PALMAS_INT1_EDGE_DETECT1_RESERVED 0x03
2111 #define PALMAS_INT1_EDGE_DETECT2_RESERVED 0x04
2112 #define PALMAS_INT2_STATUS 0x05
2113 #define PALMAS_INT2_MASK 0x06
2114 #define PALMAS_INT2_LINE_STATE 0x07
2115 #define PALMAS_INT2_EDGE_DETECT1_RESERVED 0x08
2116 #define PALMAS_INT2_EDGE_DETECT2_RESERVED 0x09
2117 #define PALMAS_INT3_STATUS 0x0A
2118 #define PALMAS_INT3_MASK 0x0B
2119 #define PALMAS_INT3_LINE_STATE 0x0C
2120 #define PALMAS_INT3_EDGE_DETECT1_RESERVED 0x0D
2121 #define PALMAS_INT3_EDGE_DETECT2_RESERVED 0x0E
2122 #define PALMAS_INT4_STATUS 0x0F
2123 #define PALMAS_INT4_MASK 0x10
2124 #define PALMAS_INT4_LINE_STATE 0x11
2125 #define PALMAS_INT4_EDGE_DETECT1 0x12
2126 #define PALMAS_INT4_EDGE_DETECT2 0x13
2127 #define PALMAS_INT_CTRL 0x14
2130 #define PALMAS_INT1_STATUS_VBAT_MON 0x80
2131 #define PALMAS_INT1_STATUS_VBAT_MON_SHIFT 0x07
2132 #define PALMAS_INT1_STATUS_VSYS_MON 0x40
2133 #define PALMAS_INT1_STATUS_VSYS_MON_SHIFT 0x06
2134 #define PALMAS_INT1_STATUS_HOTDIE 0x20
2135 #define PALMAS_INT1_STATUS_HOTDIE_SHIFT 0x05
2136 #define PALMAS_INT1_STATUS_PWRDOWN 0x10
2137 #define PALMAS_INT1_STATUS_PWRDOWN_SHIFT 0x04
2138 #define PALMAS_INT1_STATUS_RPWRON 0x08
2139 #define PALMAS_INT1_STATUS_RPWRON_SHIFT 0x03
2140 #define PALMAS_INT1_STATUS_LONG_PRESS_KEY 0x04
2141 #define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT 0x02
2142 #define PALMAS_INT1_STATUS_PWRON 0x02
2143 #define PALMAS_INT1_STATUS_PWRON_SHIFT 0x01
2144 #define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV 0x01
2145 #define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT 0x00
2148 #define PALMAS_INT1_MASK_VBAT_MON 0x80
2149 #define PALMAS_INT1_MASK_VBAT_MON_SHIFT 0x07
2150 #define PALMAS_INT1_MASK_VSYS_MON 0x40
2151 #define PALMAS_INT1_MASK_VSYS_MON_SHIFT 0x06
2152 #define PALMAS_INT1_MASK_HOTDIE 0x20
2153 #define PALMAS_INT1_MASK_HOTDIE_SHIFT 0x05
2154 #define PALMAS_INT1_MASK_PWRDOWN 0x10
2155 #define PALMAS_INT1_MASK_PWRDOWN_SHIFT 0x04
2156 #define PALMAS_INT1_MASK_RPWRON 0x08
2157 #define PALMAS_INT1_MASK_RPWRON_SHIFT 0x03
2158 #define PALMAS_INT1_MASK_LONG_PRESS_KEY 0x04
2159 #define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT 0x02
2160 #define PALMAS_INT1_MASK_PWRON 0x02
2161 #define PALMAS_INT1_MASK_PWRON_SHIFT 0x01
2162 #define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV 0x01
2163 #define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT 0x00
2166 #define PALMAS_INT1_LINE_STATE_VBAT_MON 0x80
2167 #define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT 0x07
2168 #define PALMAS_INT1_LINE_STATE_VSYS_MON 0x40
2169 #define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT 0x06
2170 #define PALMAS_INT1_LINE_STATE_HOTDIE 0x20
2171 #define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT 0x05
2172 #define PALMAS_INT1_LINE_STATE_PWRDOWN 0x10
2173 #define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT 0x04
2174 #define PALMAS_INT1_LINE_STATE_RPWRON 0x08
2175 #define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT 0x03
2176 #define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY 0x04
2177 #define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 0x02
2178 #define PALMAS_INT1_LINE_STATE_PWRON 0x02
2179 #define PALMAS_INT1_LINE_STATE_PWRON_SHIFT 0x01
2180 #define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV 0x01
2181 #define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT 0x00
2184 #define PALMAS_INT2_STATUS_VAC_ACOK 0x80
2185 #define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT 0x07
2186 #define PALMAS_INT2_STATUS_SHORT 0x40
2187 #define PALMAS_INT2_STATUS_SHORT_SHIFT 0x06
2188 #define PALMAS_INT2_STATUS_FBI_BB 0x20
2189 #define PALMAS_INT2_STATUS_FBI_BB_SHIFT 0x05
2190 #define PALMAS_INT2_STATUS_RESET_IN 0x10
2191 #define PALMAS_INT2_STATUS_RESET_IN_SHIFT 0x04
2192 #define PALMAS_INT2_STATUS_BATREMOVAL 0x08
2193 #define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT 0x03
2194 #define PALMAS_INT2_STATUS_WDT 0x04
2195 #define PALMAS_INT2_STATUS_WDT_SHIFT 0x02
2196 #define PALMAS_INT2_STATUS_RTC_TIMER 0x02
2197 #define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT 0x01
2198 #define PALMAS_INT2_STATUS_RTC_ALARM 0x01
2199 #define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT 0x00
2202 #define PALMAS_INT2_MASK_VAC_ACOK 0x80
2203 #define PALMAS_INT2_MASK_VAC_ACOK_SHIFT 0x07
2204 #define PALMAS_INT2_MASK_SHORT 0x40
2205 #define PALMAS_INT2_MASK_SHORT_SHIFT 0x06
2206 #define PALMAS_INT2_MASK_FBI_BB 0x20
2207 #define PALMAS_INT2_MASK_FBI_BB_SHIFT 0x05
2208 #define PALMAS_INT2_MASK_RESET_IN 0x10
2209 #define PALMAS_INT2_MASK_RESET_IN_SHIFT 0x04
2210 #define PALMAS_INT2_MASK_BATREMOVAL 0x08
2211 #define PALMAS_INT2_MASK_BATREMOVAL_SHIFT 0x03
2212 #define PALMAS_INT2_MASK_WDT 0x04
2213 #define PALMAS_INT2_MASK_WDT_SHIFT 0x02
2214 #define PALMAS_INT2_MASK_RTC_TIMER 0x02
2215 #define PALMAS_INT2_MASK_RTC_TIMER_SHIFT 0x01
2216 #define PALMAS_INT2_MASK_RTC_ALARM 0x01
2217 #define PALMAS_INT2_MASK_RTC_ALARM_SHIFT 0x00
2220 #define PALMAS_INT2_LINE_STATE_VAC_ACOK 0x80
2221 #define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT 0x07
2222 #define PALMAS_INT2_LINE_STATE_SHORT 0x40
2223 #define PALMAS_INT2_LINE_STATE_SHORT_SHIFT 0x06
2224 #define PALMAS_INT2_LINE_STATE_FBI_BB 0x20
2225 #define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT 0x05
2226 #define PALMAS_INT2_LINE_STATE_RESET_IN 0x10
2227 #define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT 0x04
2228 #define PALMAS_INT2_LINE_STATE_BATREMOVAL 0x08
2229 #define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT 0x03
2230 #define PALMAS_INT2_LINE_STATE_WDT 0x04
2231 #define PALMAS_INT2_LINE_STATE_WDT_SHIFT 0x02
2232 #define PALMAS_INT2_LINE_STATE_RTC_TIMER 0x02
2233 #define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT 0x01
2234 #define PALMAS_INT2_LINE_STATE_RTC_ALARM 0x01
2235 #define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT 0x00
2238 #define PALMAS_INT3_STATUS_VBUS 0x80
2239 #define PALMAS_INT3_STATUS_VBUS_SHIFT 0x07
2240 #define PALMAS_INT3_STATUS_VBUS_OTG 0x40
2241 #define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT 0x06
2242 #define PALMAS_INT3_STATUS_ID 0x20
2243 #define PALMAS_INT3_STATUS_ID_SHIFT 0x05
2244 #define PALMAS_INT3_STATUS_ID_OTG 0x10
2245 #define PALMAS_INT3_STATUS_ID_OTG_SHIFT 0x04
2246 #define PALMAS_INT3_STATUS_GPADC_EOC_RT 0x08
2247 #define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT 0x03
2248 #define PALMAS_INT3_STATUS_GPADC_EOC_SW 0x04
2249 #define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT 0x02
2250 #define PALMAS_INT3_STATUS_GPADC_AUTO_1 0x02
2251 #define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT 0x01
2252 #define PALMAS_INT3_STATUS_GPADC_AUTO_0 0x01
2253 #define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT 0x00
2256 #define PALMAS_INT3_MASK_VBUS 0x80
2257 #define PALMAS_INT3_MASK_VBUS_SHIFT 0x07
2258 #define PALMAS_INT3_MASK_VBUS_OTG 0x40
2259 #define PALMAS_INT3_MASK_VBUS_OTG_SHIFT 0x06
2260 #define PALMAS_INT3_MASK_ID 0x20
2261 #define PALMAS_INT3_MASK_ID_SHIFT 0x05
2262 #define PALMAS_INT3_MASK_ID_OTG 0x10
2263 #define PALMAS_INT3_MASK_ID_OTG_SHIFT 0x04
2264 #define PALMAS_INT3_MASK_GPADC_EOC_RT 0x08
2265 #define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT 0x03
2266 #define PALMAS_INT3_MASK_GPADC_EOC_SW 0x04
2267 #define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT 0x02
2268 #define PALMAS_INT3_MASK_GPADC_AUTO_1 0x02
2269 #define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT 0x01
2270 #define PALMAS_INT3_MASK_GPADC_AUTO_0 0x01
2271 #define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT 0x00
2274 #define PALMAS_INT3_LINE_STATE_VBUS 0x80
2275 #define PALMAS_INT3_LINE_STATE_VBUS_SHIFT 0x07
2276 #define PALMAS_INT3_LINE_STATE_VBUS_OTG 0x40
2277 #define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT 0x06
2278 #define PALMAS_INT3_LINE_STATE_ID 0x20
2279 #define PALMAS_INT3_LINE_STATE_ID_SHIFT 0x05
2280 #define PALMAS_INT3_LINE_STATE_ID_OTG 0x10
2281 #define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT 0x04
2282 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT 0x08
2283 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT 0x03
2284 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW 0x04
2285 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 0x02
2286 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1 0x02
2287 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 0x01
2288 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0 0x01
2289 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0x00
2292 #define PALMAS_INT4_STATUS_GPIO_7 0x80
2293 #define PALMAS_INT4_STATUS_GPIO_7_SHIFT 0x07
2294 #define PALMAS_INT4_STATUS_GPIO_6 0x40
2295 #define PALMAS_INT4_STATUS_GPIO_6_SHIFT 0x06
2296 #define PALMAS_INT4_STATUS_GPIO_5 0x20
2297 #define PALMAS_INT4_STATUS_GPIO_5_SHIFT 0x05
2298 #define PALMAS_INT4_STATUS_GPIO_4 0x10
2299 #define PALMAS_INT4_STATUS_GPIO_4_SHIFT 0x04
2300 #define PALMAS_INT4_STATUS_GPIO_3 0x08
2301 #define PALMAS_INT4_STATUS_GPIO_3_SHIFT 0x03
2302 #define PALMAS_INT4_STATUS_GPIO_2 0x04
2303 #define PALMAS_INT4_STATUS_GPIO_2_SHIFT 0x02
2304 #define PALMAS_INT4_STATUS_GPIO_1 0x02
2305 #define PALMAS_INT4_STATUS_GPIO_1_SHIFT 0x01
2306 #define PALMAS_INT4_STATUS_GPIO_0 0x01
2307 #define PALMAS_INT4_STATUS_GPIO_0_SHIFT 0x00
2310 #define PALMAS_INT4_MASK_GPIO_7 0x80
2311 #define PALMAS_INT4_MASK_GPIO_7_SHIFT 0x07
2312 #define PALMAS_INT4_MASK_GPIO_6 0x40
2313 #define PALMAS_INT4_MASK_GPIO_6_SHIFT 0x06
2314 #define PALMAS_INT4_MASK_GPIO_5 0x20
2315 #define PALMAS_INT4_MASK_GPIO_5_SHIFT 0x05
2316 #define PALMAS_INT4_MASK_GPIO_4 0x10
2317 #define PALMAS_INT4_MASK_GPIO_4_SHIFT 0x04
2318 #define PALMAS_INT4_MASK_GPIO_3 0x08
2319 #define PALMAS_INT4_MASK_GPIO_3_SHIFT 0x03
2320 #define PALMAS_INT4_MASK_GPIO_2 0x04
2321 #define PALMAS_INT4_MASK_GPIO_2_SHIFT 0x02
2322 #define PALMAS_INT4_MASK_GPIO_1 0x02
2323 #define PALMAS_INT4_MASK_GPIO_1_SHIFT 0x01
2324 #define PALMAS_INT4_MASK_GPIO_0 0x01
2325 #define PALMAS_INT4_MASK_GPIO_0_SHIFT 0x00
2328 #define PALMAS_INT4_LINE_STATE_GPIO_7 0x80
2329 #define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT 0x07
2330 #define PALMAS_INT4_LINE_STATE_GPIO_6 0x40
2331 #define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT 0x06
2332 #define PALMAS_INT4_LINE_STATE_GPIO_5 0x20
2333 #define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT 0x05
2334 #define PALMAS_INT4_LINE_STATE_GPIO_4 0x10
2335 #define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT 0x04
2336 #define PALMAS_INT4_LINE_STATE_GPIO_3 0x08
2337 #define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT 0x03
2338 #define PALMAS_INT4_LINE_STATE_GPIO_2 0x04
2339 #define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT 0x02
2340 #define PALMAS_INT4_LINE_STATE_GPIO_1 0x02
2341 #define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT 0x01
2342 #define PALMAS_INT4_LINE_STATE_GPIO_0 0x01
2343 #define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT 0x00
2346 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING 0x80
2347 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 0x07
2348 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING 0x40
2349 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 0x06
2350 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING 0x20
2351 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 0x05
2352 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING 0x10
2353 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 0x04
2354 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING 0x08
2355 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 0x03
2356 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING 0x04
2357 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 0x02
2358 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING 0x02
2359 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 0x01
2360 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING 0x01
2361 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0x00
2364 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING 0x80
2365 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT 0x07
2366 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING 0x40
2367 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT 0x06
2368 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING 0x20
2369 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 0x05
2370 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING 0x10
2371 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 0x04
2372 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING 0x08
2373 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 0x03
2374 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING 0x04
2375 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 0x02
2376 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING 0x02
2377 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 0x01
2378 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING 0x01
2379 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0x00
2382 #define PALMAS_INT_CTRL_INT_PENDING 0x04
2383 #define PALMAS_INT_CTRL_INT_PENDING_SHIFT 0x02
2384 #define PALMAS_INT_CTRL_INT_CLEAR 0x01
2385 #define PALMAS_INT_CTRL_INT_CLEAR_SHIFT 0x00
2388 #define PALMAS_USB_WAKEUP 0x03
2389 #define PALMAS_USB_VBUS_CTRL_SET 0x04
2390 #define PALMAS_USB_VBUS_CTRL_CLR 0x05
2391 #define PALMAS_USB_ID_CTRL_SET 0x06
2392 #define PALMAS_USB_ID_CTRL_CLEAR 0x07
2393 #define PALMAS_USB_VBUS_INT_SRC 0x08
2394 #define PALMAS_USB_VBUS_INT_LATCH_SET 0x09
2395 #define PALMAS_USB_VBUS_INT_LATCH_CLR 0x0A
2396 #define PALMAS_USB_VBUS_INT_EN_LO_SET 0x0B
2397 #define PALMAS_USB_VBUS_INT_EN_LO_CLR 0x0C
2398 #define PALMAS_USB_VBUS_INT_EN_HI_SET 0x0D
2399 #define PALMAS_USB_VBUS_INT_EN_HI_CLR 0x0E
2400 #define PALMAS_USB_ID_INT_SRC 0x0F
2401 #define PALMAS_USB_ID_INT_LATCH_SET 0x10
2402 #define PALMAS_USB_ID_INT_LATCH_CLR 0x11
2403 #define PALMAS_USB_ID_INT_EN_LO_SET 0x12
2404 #define PALMAS_USB_ID_INT_EN_LO_CLR 0x13
2405 #define PALMAS_USB_ID_INT_EN_HI_SET 0x14
2406 #define PALMAS_USB_ID_INT_EN_HI_CLR 0x15
2407 #define PALMAS_USB_OTG_ADP_CTRL 0x16
2408 #define PALMAS_USB_OTG_ADP_HIGH 0x17
2409 #define PALMAS_USB_OTG_ADP_LOW 0x18
2410 #define PALMAS_USB_OTG_ADP_RISE 0x19
2411 #define PALMAS_USB_OTG_REVISION 0x1A
2414 #define PALMAS_USB_WAKEUP_ID_WK_UP_COMP 0x01
2415 #define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT 0x00
2418 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS 0x80
2419 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT 0x07
2420 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG 0x20
2421 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT 0x05
2422 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC 0x10
2423 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT 0x04
2424 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK 0x08
2425 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT 0x03
2426 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP 0x04
2427 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT 0x02
2430 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS 0x80
2431 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT 0x07
2432 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG 0x20
2433 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT 0x05
2434 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC 0x10
2435 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT 0x04
2436 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK 0x08
2437 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT 0x03
2438 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP 0x04
2439 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT 0x02
2442 #define PALMAS_USB_ID_CTRL_SET_ID_PU_220K 0x80
2443 #define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT 0x07
2444 #define PALMAS_USB_ID_CTRL_SET_ID_PU_100K 0x40
2445 #define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT 0x06
2446 #define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV 0x20
2447 #define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT 0x05
2448 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U 0x10
2449 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT 0x04
2450 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U 0x08
2451 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT 0x03
2452 #define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP 0x04
2453 #define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT 0x02
2456 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K 0x80
2457 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT 0x07
2458 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K 0x40
2459 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT 0x06
2460 #define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV 0x20
2461 #define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT 0x05
2462 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U 0x10
2463 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT 0x04
2464 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U 0x08
2465 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT 0x03
2466 #define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP 0x04
2467 #define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT 0x02
2470 #define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD 0x80
2471 #define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT 0x07
2472 #define PALMAS_USB_VBUS_INT_SRC_VADP_PRB 0x40
2473 #define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT 0x06
2474 #define PALMAS_USB_VBUS_INT_SRC_VADP_SNS 0x20
2475 #define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT 0x05
2476 #define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD 0x08
2477 #define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT 0x03
2478 #define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD 0x04
2479 #define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT 0x02
2480 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD 0x02
2481 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT 0x01
2482 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END 0x01
2483 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT 0x00
2486 #define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD 0x80
2487 #define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT 0x07
2488 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB 0x40
2489 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT 0x06
2490 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS 0x20
2491 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT 0x05
2492 #define PALMAS_USB_VBUS_INT_LATCH_SET_ADP 0x10
2493 #define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT 0x04
2494 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD 0x08
2495 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT 0x03
2496 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD 0x04
2497 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT 0x02
2498 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD 0x02
2499 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT 0x01
2500 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END 0x01
2501 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT 0x00
2504 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD 0x80
2505 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT 0x07
2506 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB 0x40
2507 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT 0x06
2508 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS 0x20
2509 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT 0x05
2510 #define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP 0x10
2511 #define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT 0x04
2512 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD 0x08
2513 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT 0x03
2514 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD 0x04
2515 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT 0x02
2516 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD 0x02
2517 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT 0x01
2518 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END 0x01
2519 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT 0x00
2522 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD 0x80
2523 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT 0x07
2524 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB 0x40
2525 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT 0x06
2526 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS 0x20
2527 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT 0x05
2528 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD 0x08
2529 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT 0x03
2530 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD 0x04
2531 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT 0x02
2532 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD 0x02
2533 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT 0x01
2534 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END 0x01
2535 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT 0x00
2538 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD 0x80
2539 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT 0x07
2540 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB 0x40
2541 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT 0x06
2542 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS 0x20
2543 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT 0x05
2544 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD 0x08
2545 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT 0x03
2546 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD 0x04
2547 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT 0x02
2548 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD 0x02
2549 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT 0x01
2550 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END 0x01
2551 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT 0x00
2554 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD 0x80
2555 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT 0x07
2556 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB 0x40
2557 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT 0x06
2558 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS 0x20
2559 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT 0x05
2560 #define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP 0x10
2561 #define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT 0x04
2562 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD 0x08
2563 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT 0x03
2564 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD 0x04
2565 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT 0x02
2566 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD 0x02
2567 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT 0x01
2568 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END 0x01
2569 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT 0x00
2572 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD 0x80
2573 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT 0x07
2574 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB 0x40
2575 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT 0x06
2576 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS 0x20
2577 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT 0x05
2578 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP 0x10
2579 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT 0x04
2580 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD 0x08
2581 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT 0x03
2582 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD 0x04
2583 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT 0x02
2584 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD 0x02
2585 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT 0x01
2586 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END 0x01
2587 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT 0x00
2590 #define PALMAS_USB_ID_INT_SRC_ID_FLOAT 0x10
2591 #define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT 0x04
2592 #define PALMAS_USB_ID_INT_SRC_ID_A 0x08
2593 #define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT 0x03
2594 #define PALMAS_USB_ID_INT_SRC_ID_B 0x04
2595 #define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT 0x02
2596 #define PALMAS_USB_ID_INT_SRC_ID_C 0x02
2597 #define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT 0x01
2598 #define PALMAS_USB_ID_INT_SRC_ID_GND 0x01
2599 #define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT 0x00
2602 #define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT 0x10
2603 #define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT 0x04
2604 #define PALMAS_USB_ID_INT_LATCH_SET_ID_A 0x08
2605 #define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT 0x03
2606 #define PALMAS_USB_ID_INT_LATCH_SET_ID_B 0x04
2607 #define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT 0x02
2608 #define PALMAS_USB_ID_INT_LATCH_SET_ID_C 0x02
2609 #define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT 0x01
2610 #define PALMAS_USB_ID_INT_LATCH_SET_ID_GND 0x01
2611 #define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT 0x00
2614 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT 0x10
2615 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT 0x04
2616 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_A 0x08
2617 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT 0x03
2618 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_B 0x04
2619 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT 0x02
2620 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_C 0x02
2621 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT 0x01
2622 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND 0x01
2623 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT 0x00
2626 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT 0x10
2627 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT 0x04
2628 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_A 0x08
2629 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT 0x03
2630 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_B 0x04
2631 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT 0x02
2632 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_C 0x02
2633 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT 0x01
2634 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND 0x01
2635 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT 0x00
2638 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT 0x10
2639 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT 0x04
2640 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A 0x08
2641 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT 0x03
2642 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B 0x04
2643 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT 0x02
2644 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C 0x02
2645 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT 0x01
2646 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND 0x01
2647 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT 0x00
2650 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT 0x10
2651 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT 0x04
2652 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_A 0x08
2653 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT 0x03
2654 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_B 0x04
2655 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT 0x02
2656 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_C 0x02
2657 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT 0x01
2658 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND 0x01
2659 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT 0x00
2662 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT 0x10
2663 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT 0x04
2664 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A 0x08
2665 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT 0x03
2666 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B 0x04
2667 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT 0x02
2668 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C 0x02
2669 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT 0x01
2670 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND 0x01
2671 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT 0x00
2674 #define PALMAS_USB_OTG_ADP_CTRL_ADP_EN 0x04
2675 #define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT 0x02
2676 #define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_MASK 0x03
2677 #define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT 0x00
2680 #define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK 0xFF
2681 #define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT 0x00
2684 #define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK 0xFF
2685 #define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT 0x00
2688 #define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK 0xFF
2689 #define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT 0x00
2692 #define PALMAS_USB_OTG_REVISION_OTG_REV 0x01
2693 #define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT 0x00
2696 #define PALMAS_VIBRA_CTRL 0x00
2699 #define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_MASK 0x06
2700 #define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT 0x01
2701 #define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL 0x01
2702 #define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT 0x00
2705 #define PALMAS_GPIO_DATA_IN 0x00
2706 #define PALMAS_GPIO_DATA_DIR 0x01
2707 #define PALMAS_GPIO_DATA_OUT 0x02
2708 #define PALMAS_GPIO_DEBOUNCE_EN 0x03
2709 #define PALMAS_GPIO_CLEAR_DATA_OUT 0x04
2710 #define PALMAS_GPIO_SET_DATA_OUT 0x05
2711 #define PALMAS_PU_PD_GPIO_CTRL1 0x06
2712 #define PALMAS_PU_PD_GPIO_CTRL2 0x07
2713 #define PALMAS_OD_OUTPUT_GPIO_CTRL 0x08
2714 #define PALMAS_GPIO_DATA_IN2 0x09
2715 #define PALMAS_GPIO_DATA_DIR2 0x0A
2716 #define PALMAS_GPIO_DATA_OUT2 0x0B
2717 #define PALMAS_GPIO_DEBOUNCE_EN2 0x0C
2718 #define PALMAS_GPIO_CLEAR_DATA_OUT2 0x0D
2719 #define PALMAS_GPIO_SET_DATA_OUT2 0x0E
2720 #define PALMAS_PU_PD_GPIO_CTRL3 0x0F
2721 #define PALMAS_PU_PD_GPIO_CTRL4 0x10
2722 #define PALMAS_OD_OUTPUT_GPIO_CTRL2 0x11
2725 #define PALMAS_GPIO_DATA_IN_GPIO_7_IN 0x80
2726 #define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT 0x07
2727 #define PALMAS_GPIO_DATA_IN_GPIO_6_IN 0x40
2728 #define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT 0x06
2729 #define PALMAS_GPIO_DATA_IN_GPIO_5_IN 0x20
2730 #define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT 0x05
2731 #define PALMAS_GPIO_DATA_IN_GPIO_4_IN 0x10
2732 #define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT 0x04
2733 #define PALMAS_GPIO_DATA_IN_GPIO_3_IN 0x08
2734 #define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT 0x03
2735 #define PALMAS_GPIO_DATA_IN_GPIO_2_IN 0x04
2736 #define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT 0x02
2737 #define PALMAS_GPIO_DATA_IN_GPIO_1_IN 0x02
2738 #define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT 0x01
2739 #define PALMAS_GPIO_DATA_IN_GPIO_0_IN 0x01
2740 #define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT 0x00
2743 #define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR 0x80
2744 #define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT 0x07
2745 #define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR 0x40
2746 #define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT 0x06
2747 #define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR 0x20
2748 #define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT 0x05
2749 #define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR 0x10
2750 #define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT 0x04
2751 #define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR 0x08
2752 #define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT 0x03
2753 #define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR 0x04
2754 #define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT 0x02
2755 #define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR 0x02
2756 #define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT 0x01
2757 #define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR 0x01
2758 #define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT 0x00
2761 #define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT 0x80
2762 #define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT 0x07
2763 #define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT 0x40
2764 #define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT 0x06
2765 #define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT 0x20
2766 #define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT 0x05
2767 #define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT 0x10
2768 #define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT 0x04
2769 #define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT 0x08
2770 #define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT 0x03
2771 #define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT 0x04
2772 #define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT 0x02
2773 #define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT 0x02
2774 #define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT 0x01
2775 #define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT 0x01
2776 #define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT 0x00
2779 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN 0x80
2780 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT 0x07
2781 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN 0x40
2782 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT 0x06
2783 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN 0x20
2784 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT 0x05
2785 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN 0x10
2786 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT 0x04
2787 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN 0x08
2788 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT 0x03
2789 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN 0x04
2790 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT 0x02
2791 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN 0x02
2792 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT 0x01
2793 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN 0x01
2794 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT 0x00
2797 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT 0x80
2798 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT 0x07
2799 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT 0x40
2800 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT 0x06
2801 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT 0x20
2802 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT 0x05
2803 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT 0x10
2804 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT 0x04
2805 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT 0x08
2806 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT 0x03
2807 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT 0x04
2808 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT 0x02
2809 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT 0x02
2810 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT 0x01
2811 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT 0x01
2812 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT 0x00
2815 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT 0x80
2816 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT 0x07
2817 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT 0x40
2818 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT 0x06
2819 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT 0x20
2820 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT 0x05
2821 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT 0x10
2822 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT 0x04
2823 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT 0x08
2824 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT 0x03
2825 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT 0x04
2826 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT 0x02
2827 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT 0x02
2828 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT 0x01
2829 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT 0x01
2830 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT 0x00
2833 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD 0x40
2834 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT 0x06
2835 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU 0x20
2836 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT 0x05
2837 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD 0x10
2838 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT 0x04
2839 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU 0x08
2840 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT 0x03
2841 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD 0x04
2842 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT 0x02
2843 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD 0x01
2844 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT 0x00
2847 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD 0x40
2848 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT 0x06
2849 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU 0x20
2850 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT 0x05
2851 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD 0x10
2852 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT 0x04
2853 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU 0x08
2854 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT 0x03
2855 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD 0x04
2856 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT 0x02
2857 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU 0x02
2858 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT 0x01
2859 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD 0x01
2860 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT 0x00
2863 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD 0x20
2864 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT 0x05
2865 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD 0x04
2866 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT 0x02
2867 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD 0x02
2868 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT 0x01
2871 #define PALMAS_GPADC_CTRL1 0x00
2872 #define PALMAS_GPADC_CTRL2 0x01
2873 #define PALMAS_GPADC_RT_CTRL 0x02
2874 #define PALMAS_GPADC_AUTO_CTRL 0x03
2875 #define PALMAS_GPADC_STATUS 0x04
2876 #define PALMAS_GPADC_RT_SELECT 0x05
2877 #define PALMAS_GPADC_RT_CONV0_LSB 0x06
2878 #define PALMAS_GPADC_RT_CONV0_MSB 0x07
2879 #define PALMAS_GPADC_AUTO_SELECT 0x08
2880 #define PALMAS_GPADC_AUTO_CONV0_LSB 0x09
2881 #define PALMAS_GPADC_AUTO_CONV0_MSB 0x0A
2882 #define PALMAS_GPADC_AUTO_CONV1_LSB 0x0B
2883 #define PALMAS_GPADC_AUTO_CONV1_MSB 0x0C
2884 #define PALMAS_GPADC_SW_SELECT 0x0D
2885 #define PALMAS_GPADC_SW_CONV0_LSB 0x0E
2886 #define PALMAS_GPADC_SW_CONV0_MSB 0x0F
2887 #define PALMAS_GPADC_THRES_CONV0_LSB 0x10
2888 #define PALMAS_GPADC_THRES_CONV0_MSB 0x11
2889 #define PALMAS_GPADC_THRES_CONV1_LSB 0x12
2890 #define PALMAS_GPADC_THRES_CONV1_MSB 0x13
2891 #define PALMAS_GPADC_SMPS_ILMONITOR_EN 0x14
2892 #define PALMAS_GPADC_SMPS_VSEL_MONITORING 0x15
2895 #define PALMAS_GPADC_CTRL1_RESERVED_MASK 0xc0
2896 #define PALMAS_GPADC_CTRL1_RESERVED_SHIFT 0x06
2897 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_MASK 0x30
2898 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT 0x04
2899 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_MASK 0x0c
2900 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT 0x02
2901 #define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET 0x02
2902 #define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT 0x01
2903 #define PALMAS_GPADC_CTRL1_GPADC_FORCE 0x01
2904 #define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT 0x00
2907 #define PALMAS_GPADC_CTRL2_RESERVED_MASK 0x06
2908 #define PALMAS_GPADC_CTRL2_RESERVED_SHIFT 0x01
2911 #define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY 0x02
2912 #define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT 0x01
2913 #define PALMAS_GPADC_RT_CTRL_START_POLARITY 0x01
2914 #define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT 0x00
2917 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1 0x80
2918 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT 0x07
2919 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0 0x40
2920 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT 0x06
2921 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN 0x20
2922 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT 0x05
2923 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN 0x10
2924 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT 0x04
2925 #define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK 0x0F
2926 #define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT 0x00
2929 #define PALMAS_GPADC_STATUS_GPADC_AVAILABLE 0x10
2930 #define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT 0x04
2933 #define PALMAS_GPADC_RT_SELECT_RT_CONV_EN 0x80
2934 #define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT 0x07
2935 #define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK 0x0F
2936 #define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT 0x00
2939 #define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK 0xFF
2940 #define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT 0x00
2943 #define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK 0x0F
2944 #define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT 0x00
2947 #define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK 0xF0
2948 #define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT 0x04
2949 #define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK 0x0F
2950 #define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT 0x00
2953 #define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK 0xFF
2954 #define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT 0x00
2957 #define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK 0x0F
2958 #define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT 0x00
2961 #define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK 0xFF
2962 #define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT 0x00
2965 #define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK 0x0F
2966 #define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT 0x00
2969 #define PALMAS_GPADC_SW_SELECT_SW_CONV_EN 0x80
2970 #define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT 0x07
2971 #define PALMAS_GPADC_SW_SELECT_SW_START_CONV0 0x10
2972 #define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT 0x04
2973 #define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK 0x0F
2974 #define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT 0x00
2977 #define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK 0xFF
2978 #define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT 0x00
2981 #define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK 0x0F
2982 #define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT 0x00
2985 #define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK 0xFF
2986 #define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT 0x00
2989 #define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL 0x80
2990 #define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT 0x07
2991 #define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK 0x0F
2992 #define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT 0x00
2995 #define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK 0xFF
2996 #define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT 0x00
2999 #define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL 0x80
3000 #define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT 0x07
3001 #define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK 0x0F
3002 #define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT 0x00
3005 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN 0x20
3006 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT 0x05
3007 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT 0x10
3008 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT 0x04
3009 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK 0x0F
3010 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT 0x00
3013 #define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE 0x80
3014 #define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT 0x07
3015 #define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK 0x7F
3016 #define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT 0x00
3019 #define PALMAS_GPADC_TRIM1 0x00
3020 #define PALMAS_GPADC_TRIM2 0x01
3021 #define PALMAS_GPADC_TRIM3 0x02
3022 #define PALMAS_GPADC_TRIM4 0x03
3023 #define PALMAS_GPADC_TRIM5 0x04
3024 #define PALMAS_GPADC_TRIM6 0x05
3025 #define PALMAS_GPADC_TRIM7 0x06
3026 #define PALMAS_GPADC_TRIM8 0x07
3027 #define PALMAS_GPADC_TRIM9 0x08
3028 #define PALMAS_GPADC_TRIM10 0x09
3029 #define PALMAS_GPADC_TRIM11 0x0A
3030 #define PALMAS_GPADC_TRIM12 0x0B
3031 #define PALMAS_GPADC_TRIM13 0x0C
3032 #define PALMAS_GPADC_TRIM14 0x0D
3033 #define PALMAS_GPADC_TRIM15 0x0E
3034 #define PALMAS_GPADC_TRIM16 0x0F
3037 #define TPS659038_REGEN2_CTRL 0x12
3042 #define TPS65917_INT1_STATUS 0x00
3043 #define TPS65917_INT1_MASK 0x01
3044 #define TPS65917_INT1_LINE_STATE 0x02
3045 #define TPS65917_INT2_STATUS 0x05
3046 #define TPS65917_INT2_MASK 0x06
3047 #define TPS65917_INT2_LINE_STATE 0x07
3048 #define TPS65917_INT3_STATUS 0x0A
3049 #define TPS65917_INT3_MASK 0x0B
3050 #define TPS65917_INT3_LINE_STATE 0x0C
3051 #define TPS65917_INT4_STATUS 0x0F
3052 #define TPS65917_INT4_MASK 0x10
3053 #define TPS65917_INT4_LINE_STATE 0x11
3054 #define TPS65917_INT4_EDGE_DETECT1 0x12
3055 #define TPS65917_INT4_EDGE_DETECT2 0x13
3056 #define TPS65917_INT_CTRL 0x14
3059 #define TPS65917_INT1_STATUS_VSYS_MON 0x40
3060 #define TPS65917_INT1_STATUS_VSYS_MON_SHIFT 0x06
3061 #define TPS65917_INT1_STATUS_HOTDIE 0x20
3062 #define TPS65917_INT1_STATUS_HOTDIE_SHIFT 0x05
3063 #define TPS65917_INT1_STATUS_PWRDOWN 0x10
3064 #define TPS65917_INT1_STATUS_PWRDOWN_SHIFT 0x04
3065 #define TPS65917_INT1_STATUS_LONG_PRESS_KEY 0x04
3066 #define TPS65917_INT1_STATUS_LONG_PRESS_KEY_SHIFT 0x02
3067 #define TPS65917_INT1_STATUS_PWRON 0x02
3068 #define TPS65917_INT1_STATUS_PWRON_SHIFT 0x01
3071 #define TPS65917_INT1_MASK_VSYS_MON 0x40
3072 #define TPS65917_INT1_MASK_VSYS_MON_SHIFT 0x06
3073 #define TPS65917_INT1_MASK_HOTDIE 0x20
3074 #define TPS65917_INT1_MASK_HOTDIE_SHIFT 0x05
3075 #define TPS65917_INT1_MASK_PWRDOWN 0x10
3076 #define TPS65917_INT1_MASK_PWRDOWN_SHIFT 0x04
3077 #define TPS65917_INT1_MASK_LONG_PRESS_KEY 0x04
3078 #define TPS65917_INT1_MASK_LONG_PRESS_KEY_SHIFT 0x02
3079 #define TPS65917_INT1_MASK_PWRON 0x02
3080 #define TPS65917_INT1_MASK_PWRON_SHIFT 0x01
3083 #define TPS65917_INT1_LINE_STATE_VSYS_MON 0x40
3084 #define TPS65917_INT1_LINE_STATE_VSYS_MON_SHIFT 0x06
3085 #define TPS65917_INT1_LINE_STATE_HOTDIE 0x20
3086 #define TPS65917_INT1_LINE_STATE_HOTDIE_SHIFT 0x05
3087 #define TPS65917_INT1_LINE_STATE_PWRDOWN 0x10
3088 #define TPS65917_INT1_LINE_STATE_PWRDOWN_SHIFT 0x04
3089 #define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY 0x04
3090 #define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 0x02
3091 #define TPS65917_INT1_LINE_STATE_PWRON 0x02
3092 #define TPS65917_INT1_LINE_STATE_PWRON_SHIFT 0x01
3095 #define TPS65917_INT2_STATUS_SHORT 0x40
3096 #define TPS65917_INT2_STATUS_SHORT_SHIFT 0x06
3097 #define TPS65917_INT2_STATUS_FSD 0x20
3098 #define TPS65917_INT2_STATUS_FSD_SHIFT 0x05
3099 #define TPS65917_INT2_STATUS_RESET_IN 0x10
3100 #define TPS65917_INT2_STATUS_RESET_IN_SHIFT 0x04
3101 #define TPS65917_INT2_STATUS_WDT 0x04
3102 #define TPS65917_INT2_STATUS_WDT_SHIFT 0x02
3103 #define TPS65917_INT2_STATUS_OTP_ERROR 0x02
3104 #define TPS65917_INT2_STATUS_OTP_ERROR_SHIFT 0x01
3107 #define TPS65917_INT2_MASK_SHORT 0x40
3108 #define TPS65917_INT2_MASK_SHORT_SHIFT 0x06
3109 #define TPS65917_INT2_MASK_FSD 0x20
3110 #define TPS65917_INT2_MASK_FSD_SHIFT 0x05
3111 #define TPS65917_INT2_MASK_RESET_IN 0x10
3112 #define TPS65917_INT2_MASK_RESET_IN_SHIFT 0x04
3113 #define TPS65917_INT2_MASK_WDT 0x04
3114 #define TPS65917_INT2_MASK_WDT_SHIFT 0x02
3115 #define TPS65917_INT2_MASK_OTP_ERROR_TIMER 0x02
3116 #define TPS65917_INT2_MASK_OTP_ERROR_SHIFT 0x01
3119 #define TPS65917_INT2_LINE_STATE_SHORT 0x40
3120 #define TPS65917_INT2_LINE_STATE_SHORT_SHIFT 0x06
3121 #define TPS65917_INT2_LINE_STATE_FSD 0x20
3122 #define TPS65917_INT2_LINE_STATE_FSD_SHIFT 0x05
3123 #define TPS65917_INT2_LINE_STATE_RESET_IN 0x10
3124 #define TPS65917_INT2_LINE_STATE_RESET_IN_SHIFT 0x04
3125 #define TPS65917_INT2_LINE_STATE_WDT 0x04
3126 #define TPS65917_INT2_LINE_STATE_WDT_SHIFT 0x02
3127 #define TPS65917_INT2_LINE_STATE_OTP_ERROR 0x02
3128 #define TPS65917_INT2_LINE_STATE_OTP_ERROR_SHIFT 0x01
3131 #define TPS65917_INT3_STATUS_VBUS 0x80
3132 #define TPS65917_INT3_STATUS_VBUS_SHIFT 0x07
3133 #define TPS65917_INT3_STATUS_GPADC_EOC_SW 0x04
3134 #define TPS65917_INT3_STATUS_GPADC_EOC_SW_SHIFT 0x02
3135 #define TPS65917_INT3_STATUS_GPADC_AUTO_1 0x02
3136 #define TPS65917_INT3_STATUS_GPADC_AUTO_1_SHIFT 0x01
3137 #define TPS65917_INT3_STATUS_GPADC_AUTO_0 0x01
3138 #define TPS65917_INT3_STATUS_GPADC_AUTO_0_SHIFT 0x00
3141 #define TPS65917_INT3_MASK_VBUS 0x80
3142 #define TPS65917_INT3_MASK_VBUS_SHIFT 0x07
3143 #define TPS65917_INT3_MASK_GPADC_EOC_SW 0x04
3144 #define TPS65917_INT3_MASK_GPADC_EOC_SW_SHIFT 0x02
3145 #define TPS65917_INT3_MASK_GPADC_AUTO_1 0x02
3146 #define TPS65917_INT3_MASK_GPADC_AUTO_1_SHIFT 0x01
3147 #define TPS65917_INT3_MASK_GPADC_AUTO_0 0x01
3148 #define TPS65917_INT3_MASK_GPADC_AUTO_0_SHIFT 0x00
3151 #define TPS65917_INT3_LINE_STATE_VBUS 0x80
3152 #define TPS65917_INT3_LINE_STATE_VBUS_SHIFT 0x07
3153 #define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW 0x04
3154 #define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 0x02
3155 #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1 0x02
3156 #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 0x01
3157 #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0 0x01
3158 #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0x00
3161 #define TPS65917_INT4_STATUS_GPIO_6 0x40
3162 #define TPS65917_INT4_STATUS_GPIO_6_SHIFT 0x06
3163 #define TPS65917_INT4_STATUS_GPIO_5 0x20
3164 #define TPS65917_INT4_STATUS_GPIO_5_SHIFT 0x05
3165 #define TPS65917_INT4_STATUS_GPIO_4 0x10
3166 #define TPS65917_INT4_STATUS_GPIO_4_SHIFT 0x04
3167 #define TPS65917_INT4_STATUS_GPIO_3 0x08
3168 #define TPS65917_INT4_STATUS_GPIO_3_SHIFT 0x03
3169 #define TPS65917_INT4_STATUS_GPIO_2 0x04
3170 #define TPS65917_INT4_STATUS_GPIO_2_SHIFT 0x02
3171 #define TPS65917_INT4_STATUS_GPIO_1 0x02
3172 #define TPS65917_INT4_STATUS_GPIO_1_SHIFT 0x01
3173 #define TPS65917_INT4_STATUS_GPIO_0 0x01
3174 #define TPS65917_INT4_STATUS_GPIO_0_SHIFT 0x00
3177 #define TPS65917_INT4_MASK_GPIO_6 0x40
3178 #define TPS65917_INT4_MASK_GPIO_6_SHIFT 0x06
3179 #define TPS65917_INT4_MASK_GPIO_5 0x20
3180 #define TPS65917_INT4_MASK_GPIO_5_SHIFT 0x05
3181 #define TPS65917_INT4_MASK_GPIO_4 0x10
3182 #define TPS65917_INT4_MASK_GPIO_4_SHIFT 0x04
3183 #define TPS65917_INT4_MASK_GPIO_3 0x08
3184 #define TPS65917_INT4_MASK_GPIO_3_SHIFT 0x03
3185 #define TPS65917_INT4_MASK_GPIO_2 0x04
3186 #define TPS65917_INT4_MASK_GPIO_2_SHIFT 0x02
3187 #define TPS65917_INT4_MASK_GPIO_1 0x02
3188 #define TPS65917_INT4_MASK_GPIO_1_SHIFT 0x01
3189 #define TPS65917_INT4_MASK_GPIO_0 0x01
3190 #define TPS65917_INT4_MASK_GPIO_0_SHIFT 0x00
3193 #define TPS65917_INT4_LINE_STATE_GPIO_6 0x40
3194 #define TPS65917_INT4_LINE_STATE_GPIO_6_SHIFT 0x06
3195 #define TPS65917_INT4_LINE_STATE_GPIO_5 0x20
3196 #define TPS65917_INT4_LINE_STATE_GPIO_5_SHIFT 0x05
3197 #define TPS65917_INT4_LINE_STATE_GPIO_4 0x10
3198 #define TPS65917_INT4_LINE_STATE_GPIO_4_SHIFT 0x04
3199 #define TPS65917_INT4_LINE_STATE_GPIO_3 0x08
3200 #define TPS65917_INT4_LINE_STATE_GPIO_3_SHIFT 0x03
3201 #define TPS65917_INT4_LINE_STATE_GPIO_2 0x04
3202 #define TPS65917_INT4_LINE_STATE_GPIO_2_SHIFT 0x02
3203 #define TPS65917_INT4_LINE_STATE_GPIO_1 0x02
3204 #define TPS65917_INT4_LINE_STATE_GPIO_1_SHIFT 0x01
3205 #define TPS65917_INT4_LINE_STATE_GPIO_0 0x01
3206 #define TPS65917_INT4_LINE_STATE_GPIO_0_SHIFT 0x00
3209 #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING 0x80
3210 #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 0x07
3211 #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING 0x40
3212 #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 0x06
3213 #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING 0x20
3214 #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 0x05
3215 #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING 0x10
3216 #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 0x04
3217 #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING 0x08
3218 #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 0x03
3219 #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING 0x04
3220 #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 0x02
3221 #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING 0x02
3222 #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 0x01
3223 #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING 0x01
3224 #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0x00
3227 #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING 0x20
3228 #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 0x05
3229 #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING 0x10
3230 #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 0x04
3231 #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING 0x08
3232 #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 0x03
3233 #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING 0x04
3234 #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 0x02
3235 #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING 0x02
3236 #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 0x01
3237 #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING 0x01
3238 #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0x00
3241 #define TPS65917_INT_CTRL_INT_PENDING 0x04
3242 #define TPS65917_INT_CTRL_INT_PENDING_SHIFT 0x02
3243 #define TPS65917_INT_CTRL_INT_CLEAR 0x01
3244 #define TPS65917_INT_CTRL_INT_CLEAR_SHIFT 0x00
3249 #define TPS65917_SMPS1_CTRL 0x00
3250 #define TPS65917_SMPS1_FORCE 0x02
3251 #define TPS65917_SMPS1_VOLTAGE 0x03
3252 #define TPS65917_SMPS2_CTRL 0x04
3253 #define TPS65917_SMPS2_FORCE 0x06
3254 #define TPS65917_SMPS2_VOLTAGE 0x07
3255 #define TPS65917_SMPS3_CTRL 0x0C
3256 #define TPS65917_SMPS3_FORCE 0x0E
3257 #define TPS65917_SMPS3_VOLTAGE 0x0F
3258 #define TPS65917_SMPS4_CTRL 0x10
3259 #define TPS65917_SMPS4_VOLTAGE 0x13
3260 #define TPS65917_SMPS5_CTRL 0x18
3261 #define TPS65917_SMPS5_VOLTAGE 0x1B
3262 #define TPS65917_SMPS_CTRL 0x24
3263 #define TPS65917_SMPS_PD_CTRL 0x25
3264 #define TPS65917_SMPS_THERMAL_EN 0x27
3265 #define TPS65917_SMPS_THERMAL_STATUS 0x28
3266 #define TPS65917_SMPS_SHORT_STATUS 0x29
3267 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN 0x2A
3268 #define TPS65917_SMPS_POWERGOOD_MASK1 0x2B
3269 #define TPS65917_SMPS_POWERGOOD_MASK2 0x2C
3272 #define TPS65917_SMPS1_CTRL_WR_S 0x80
3273 #define TPS65917_SMPS1_CTRL_WR_S_SHIFT 0x07
3274 #define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN 0x40
3275 #define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
3276 #define TPS65917_SMPS1_CTRL_STATUS_MASK 0x30
3277 #define TPS65917_SMPS1_CTRL_STATUS_SHIFT 0x04
3278 #define TPS65917_SMPS1_CTRL_MODE_SLEEP_MASK 0x0C
3279 #define TPS65917_SMPS1_CTRL_MODE_SLEEP_SHIFT 0x02
3280 #define TPS65917_SMPS1_CTRL_MODE_ACTIVE_MASK 0x03
3281 #define TPS65917_SMPS1_CTRL_MODE_ACTIVE_SHIFT 0x00
3284 #define TPS65917_SMPS1_FORCE_CMD 0x80
3285 #define TPS65917_SMPS1_FORCE_CMD_SHIFT 0x07
3286 #define TPS65917_SMPS1_FORCE_VSEL_MASK 0x7F
3287 #define TPS65917_SMPS1_FORCE_VSEL_SHIFT 0x00
3290 #define TPS65917_SMPS1_VOLTAGE_RANGE 0x80
3291 #define TPS65917_SMPS1_VOLTAGE_RANGE_SHIFT 0x07
3292 #define TPS65917_SMPS1_VOLTAGE_VSEL_MASK 0x7F
3293 #define TPS65917_SMPS1_VOLTAGE_VSEL_SHIFT 0x00
3296 #define TPS65917_SMPS2_CTRL_WR_S 0x80
3297 #define TPS65917_SMPS2_CTRL_WR_S_SHIFT 0x07
3298 #define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN 0x40
3299 #define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
3300 #define TPS65917_SMPS2_CTRL_STATUS_MASK 0x30
3301 #define TPS65917_SMPS2_CTRL_STATUS_SHIFT 0x04
3302 #define TPS65917_SMPS2_CTRL_MODE_SLEEP_MASK 0x0C
3303 #define TPS65917_SMPS2_CTRL_MODE_SLEEP_SHIFT 0x02
3304 #define TPS65917_SMPS2_CTRL_MODE_ACTIVE_MASK 0x03
3305 #define TPS65917_SMPS2_CTRL_MODE_ACTIVE_SHIFT 0x00
3308 #define TPS65917_SMPS2_FORCE_CMD 0x80
3309 #define TPS65917_SMPS2_FORCE_CMD_SHIFT 0x07
3310 #define TPS65917_SMPS2_FORCE_VSEL_MASK 0x7F
3311 #define TPS65917_SMPS2_FORCE_VSEL_SHIFT 0x00
3314 #define TPS65917_SMPS2_VOLTAGE_RANGE 0x80
3315 #define TPS65917_SMPS2_VOLTAGE_RANGE_SHIFT 0x07
3316 #define TPS65917_SMPS2_VOLTAGE_VSEL_MASK 0x7F
3317 #define TPS65917_SMPS2_VOLTAGE_VSEL_SHIFT 0x00
3320 #define TPS65917_SMPS3_CTRL_WR_S 0x80
3321 #define TPS65917_SMPS3_CTRL_WR_S_SHIFT 0x07
3322 #define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN 0x40
3323 #define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
3324 #define TPS65917_SMPS3_CTRL_STATUS_MASK 0x30
3325 #define TPS65917_SMPS3_CTRL_STATUS_SHIFT 0x04
3326 #define TPS65917_SMPS3_CTRL_MODE_SLEEP_MASK 0x0C
3327 #define TPS65917_SMPS3_CTRL_MODE_SLEEP_SHIFT 0x02
3328 #define TPS65917_SMPS3_CTRL_MODE_ACTIVE_MASK 0x03
3329 #define TPS65917_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0x00
3332 #define TPS65917_SMPS3_FORCE_CMD 0x80
3333 #define TPS65917_SMPS3_FORCE_CMD_SHIFT 0x07
3334 #define TPS65917_SMPS3_FORCE_VSEL_MASK 0x7F
3335 #define TPS65917_SMPS3_FORCE_VSEL_SHIFT 0x00
3338 #define TPS65917_SMPS3_VOLTAGE_RANGE 0x80
3339 #define TPS65917_SMPS3_VOLTAGE_RANGE_SHIFT 0x07
3340 #define TPS65917_SMPS3_VOLTAGE_VSEL_MASK 0x7F
3341 #define TPS65917_SMPS3_VOLTAGE_VSEL_SHIFT 0x00
3344 #define TPS65917_SMPS4_CTRL_WR_S 0x80
3345 #define TPS65917_SMPS4_CTRL_WR_S_SHIFT 0x07
3346 #define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN 0x40
3347 #define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
3348 #define TPS65917_SMPS4_CTRL_STATUS_MASK 0x30
3349 #define TPS65917_SMPS4_CTRL_STATUS_SHIFT 0x04
3350 #define TPS65917_SMPS4_CTRL_MODE_SLEEP_MASK 0x0C
3351 #define TPS65917_SMPS4_CTRL_MODE_SLEEP_SHIFT 0x02
3352 #define TPS65917_SMPS4_CTRL_MODE_ACTIVE_MASK 0x03
3353 #define TPS65917_SMPS4_CTRL_MODE_ACTIVE_SHIFT 0x00
3356 #define TPS65917_SMPS4_VOLTAGE_RANGE 0x80
3357 #define TPS65917_SMPS4_VOLTAGE_RANGE_SHIFT 0x07
3358 #define TPS65917_SMPS4_VOLTAGE_VSEL_MASK 0x7F
3359 #define TPS65917_SMPS4_VOLTAGE_VSEL_SHIFT 0x00
3362 #define TPS65917_SMPS5_CTRL_WR_S 0x80
3363 #define TPS65917_SMPS5_CTRL_WR_S_SHIFT 0x07
3364 #define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN 0x40
3365 #define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
3366 #define TPS65917_SMPS5_CTRL_STATUS_MASK 0x30
3367 #define TPS65917_SMPS5_CTRL_STATUS_SHIFT 0x04
3368 #define TPS65917_SMPS5_CTRL_MODE_SLEEP_MASK 0x0C
3369 #define TPS65917_SMPS5_CTRL_MODE_SLEEP_SHIFT 0x02
3370 #define TPS65917_SMPS5_CTRL_MODE_ACTIVE_MASK 0x03
3371 #define TPS65917_SMPS5_CTRL_MODE_ACTIVE_SHIFT 0x00
3374 #define TPS65917_SMPS5_VOLTAGE_RANGE 0x80
3375 #define TPS65917_SMPS5_VOLTAGE_RANGE_SHIFT 0x07
3376 #define TPS65917_SMPS5_VOLTAGE_VSEL_MASK 0x7F
3377 #define TPS65917_SMPS5_VOLTAGE_VSEL_SHIFT 0x00
3380 #define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN 0x10
3381 #define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN_SHIFT 0x04
3382 #define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL 0x03
3383 #define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL_SHIFT 0x00
3386 #define TPS65917_SMPS_PD_CTRL_SMPS5 0x40
3387 #define TPS65917_SMPS_PD_CTRL_SMPS5_SHIFT 0x06
3388 #define TPS65917_SMPS_PD_CTRL_SMPS4 0x10
3389 #define TPS65917_SMPS_PD_CTRL_SMPS4_SHIFT 0x04
3390 #define TPS65917_SMPS_PD_CTRL_SMPS3 0x08
3391 #define TPS65917_SMPS_PD_CTRL_SMPS3_SHIFT 0x03
3392 #define TPS65917_SMPS_PD_CTRL_SMPS2 0x02
3393 #define TPS65917_SMPS_PD_CTRL_SMPS2_SHIFT 0x01
3394 #define TPS65917_SMPS_PD_CTRL_SMPS1 0x01
3395 #define TPS65917_SMPS_PD_CTRL_SMPS1_SHIFT 0x00
3398 #define TPS65917_SMPS_THERMAL_EN_SMPS5 0x40
3399 #define TPS65917_SMPS_THERMAL_EN_SMPS5_SHIFT 0x06
3400 #define TPS65917_SMPS_THERMAL_EN_SMPS3 0x08
3401 #define TPS65917_SMPS_THERMAL_EN_SMPS3_SHIFT 0x03
3402 #define TPS65917_SMPS_THERMAL_EN_SMPS12 0x01
3403 #define TPS65917_SMPS_THERMAL_EN_SMPS12_SHIFT 0x00
3406 #define TPS65917_SMPS_THERMAL_STATUS_SMPS5 0x40
3407 #define TPS65917_SMPS_THERMAL_STATUS_SMPS5_SHIFT 0x06
3408 #define TPS65917_SMPS_THERMAL_STATUS_SMPS3 0x08
3409 #define TPS65917_SMPS_THERMAL_STATUS_SMPS3_SHIFT 0x03
3410 #define TPS65917_SMPS_THERMAL_STATUS_SMPS12 0x01
3411 #define TPS65917_SMPS_THERMAL_STATUS_SMPS12_SHIFT 0x00
3414 #define TPS65917_SMPS_SHORT_STATUS_SMPS5 0x40
3415 #define TPS65917_SMPS_SHORT_STATUS_SMPS5_SHIFT 0x06
3416 #define TPS65917_SMPS_SHORT_STATUS_SMPS4 0x10
3417 #define TPS65917_SMPS_SHORT_STATUS_SMPS4_SHIFT 0x04
3418 #define TPS65917_SMPS_SHORT_STATUS_SMPS3 0x08
3419 #define TPS65917_SMPS_SHORT_STATUS_SMPS3_SHIFT 0x03
3420 #define TPS65917_SMPS_SHORT_STATUS_SMPS2 0x02
3421 #define TPS65917_SMPS_SHORT_STATUS_SMPS2_SHIFT 0x01
3422 #define TPS65917_SMPS_SHORT_STATUS_SMPS1 0x01
3423 #define TPS65917_SMPS_SHORT_STATUS_SMPS1_SHIFT 0x00
3426 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5 0x40
3427 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5_SHIFT 0x06
3428 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4 0x10
3429 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4_SHIFT 0x04
3430 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3 0x08
3431 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 0x03
3432 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2 0x02
3433 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2_SHIFT 0x01
3434 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1 0x01
3435 #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1_SHIFT 0x00
3438 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5 0x40
3439 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5_SHIFT 0x06
3440 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4 0x10
3441 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4_SHIFT 0x04
3442 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3 0x08
3443 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 0x03
3444 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2 0x02
3445 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2_SHIFT 0x01
3446 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1 0x01
3447 #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1_SHIFT 0x00
3450 #define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT 0x80
3451 #define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07
3452 #define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM_SHIFT 0x10
3453 #define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM 0x04
3457 #define TPS65917_SMPS_PLL_CTRL_PLL_EN_PLL_BYPASS_SHIFT 0x08
3458 #define TPS65917_SMPS_PLL_CTRL_PLL_PLL_EN_BYPASS 0x03
3459 #define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK_SHIFT 0x04
3460 #define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK 0x02
3463 #define TPS65917_LDO1_CTRL 0x00
3464 #define TPS65917_LDO1_VOLTAGE 0x01
3465 #define TPS65917_LDO2_CTRL 0x02
3466 #define TPS65917_LDO2_VOLTAGE 0x03
3467 #define TPS65917_LDO3_CTRL 0x04
3468 #define TPS65917_LDO3_VOLTAGE 0x05
3469 #define TPS65917_LDO4_CTRL 0x0E
3470 #define TPS65917_LDO4_VOLTAGE 0x0F
3471 #define TPS65917_LDO5_CTRL 0x12
3472 #define TPS65917_LDO5_VOLTAGE 0x13
3473 #define TPS65917_LDO_PD_CTRL1 0x1B
3474 #define TPS65917_LDO_PD_CTRL2 0x1C
3475 #define TPS65917_LDO_SHORT_STATUS1 0x1D
3476 #define TPS65917_LDO_SHORT_STATUS2 0x1E
3477 #define TPS65917_LDO_PD_CTRL3 0x2D
3478 #define TPS65917_LDO_SHORT_STATUS3 0x2E
3481 #define TPS65917_LDO1_CTRL_WR_S 0x80
3482 #define TPS65917_LDO1_CTRL_WR_S_SHIFT 0x07
3483 #define TPS65917_LDO1_CTRL_BYPASS_EN 0x40
3484 #define TPS65917_LDO1_CTRL_BYPASS_EN_SHIFT 0x06
3485 #define TPS65917_LDO1_CTRL_STATUS 0x10
3486 #define TPS65917_LDO1_CTRL_STATUS_SHIFT 0x04
3487 #define TPS65917_LDO1_CTRL_MODE_SLEEP 0x04
3488 #define TPS65917_LDO1_CTRL_MODE_SLEEP_SHIFT 0x02
3489 #define TPS65917_LDO1_CTRL_MODE_ACTIVE 0x01
3490 #define TPS65917_LDO1_CTRL_MODE_ACTIVE_SHIFT 0x00
3493 #define TPS65917_LDO1_VOLTAGE_VSEL_MASK 0x2F
3494 #define TPS65917_LDO1_VOLTAGE_VSEL_SHIFT 0x00
3497 #define TPS65917_LDO2_CTRL_WR_S 0x80
3498 #define TPS65917_LDO2_CTRL_WR_S_SHIFT 0x07
3499 #define TPS65917_LDO2_CTRL_BYPASS_EN 0x40
3500 #define TPS65917_LDO2_CTRL_BYPASS_EN_SHIFT 0x06
3501 #define TPS65917_LDO2_CTRL_STATUS 0x10
3502 #define TPS65917_LDO2_CTRL_STATUS_SHIFT 0x04
3503 #define TPS65917_LDO2_CTRL_MODE_SLEEP 0x04
3504 #define TPS65917_LDO2_CTRL_MODE_SLEEP_SHIFT 0x02
3505 #define TPS65917_LDO2_CTRL_MODE_ACTIVE 0x01
3506 #define TPS65917_LDO2_CTRL_MODE_ACTIVE_SHIFT 0x00
3509 #define TPS65917_LDO2_VOLTAGE_VSEL_MASK 0x2F
3510 #define TPS65917_LDO2_VOLTAGE_VSEL_SHIFT 0x00
3513 #define TPS65917_LDO3_CTRL_WR_S 0x80
3514 #define TPS65917_LDO3_CTRL_WR_S_SHIFT 0x07
3515 #define TPS65917_LDO3_CTRL_STATUS 0x10
3516 #define TPS65917_LDO3_CTRL_STATUS_SHIFT 0x04
3517 #define TPS65917_LDO3_CTRL_MODE_SLEEP 0x04
3518 #define TPS65917_LDO3_CTRL_MODE_SLEEP_SHIFT 0x02
3519 #define TPS65917_LDO3_CTRL_MODE_ACTIVE 0x01
3520 #define TPS65917_LDO3_CTRL_MODE_ACTIVE_SHIFT 0x00
3523 #define TPS65917_LDO3_VOLTAGE_VSEL_MASK 0x2F
3524 #define TPS65917_LDO3_VOLTAGE_VSEL_SHIFT 0x00
3527 #define TPS65917_LDO4_CTRL_WR_S 0x80
3528 #define TPS65917_LDO4_CTRL_WR_S_SHIFT 0x07
3529 #define TPS65917_LDO4_CTRL_STATUS 0x10
3530 #define TPS65917_LDO4_CTRL_STATUS_SHIFT 0x04
3531 #define TPS65917_LDO4_CTRL_MODE_SLEEP 0x04
3532 #define TPS65917_LDO4_CTRL_MODE_SLEEP_SHIFT 0x02
3533 #define TPS65917_LDO4_CTRL_MODE_ACTIVE 0x01
3534 #define TPS65917_LDO4_CTRL_MODE_ACTIVE_SHIFT 0x00
3537 #define TPS65917_LDO4_VOLTAGE_VSEL_MASK 0x2F
3538 #define TPS65917_LDO4_VOLTAGE_VSEL_SHIFT 0x00
3541 #define TPS65917_LDO5_CTRL_WR_S 0x80
3542 #define TPS65917_LDO5_CTRL_WR_S_SHIFT 0x07
3543 #define TPS65917_LDO5_CTRL_STATUS 0x10
3544 #define TPS65917_LDO5_CTRL_STATUS_SHIFT 0x04
3545 #define TPS65917_LDO5_CTRL_MODE_SLEEP 0x04
3546 #define TPS65917_LDO5_CTRL_MODE_SLEEP_SHIFT 0x02
3547 #define TPS65917_LDO5_CTRL_MODE_ACTIVE 0x01
3548 #define TPS65917_LDO5_CTRL_MODE_ACTIVE_SHIFT 0x00
3551 #define TPS65917_LDO5_VOLTAGE_VSEL_MASK 0x2F
3552 #define TPS65917_LDO5_VOLTAGE_VSEL_SHIFT 0x00
3555 #define TPS65917_LDO_PD_CTRL1_LDO4 0x80
3556 #define TPS65917_LDO_PD_CTRL1_LDO4_SHIFT 0x07
3557 #define TPS65917_LDO_PD_CTRL1_LDO2 0x02
3558 #define TPS65917_LDO_PD_CTRL1_LDO2_SHIFT 0x01
3559 #define TPS65917_LDO_PD_CTRL1_LDO1 0x01
3560 #define TPS65917_LDO_PD_CTRL1_LDO1_SHIFT 0x00
3563 #define TPS65917_LDO_PD_CTRL2_LDO3 0x04
3564 #define TPS65917_LDO_PD_CTRL2_LDO3_SHIFT 0x02
3565 #define TPS65917_LDO_PD_CTRL2_LDO5 0x02
3566 #define TPS65917_LDO_PD_CTRL2_LDO5_SHIFT 0x01
3569 #define TPS65917_LDO_PD_CTRL2_LDOVANA 0x80
3570 #define TPS65917_LDO_PD_CTRL2_LDOVANA_SHIFT 0x07
3573 #define TPS65917_LDO_SHORT_STATUS1_LDO4 0x80
3574 #define TPS65917_LDO_SHORT_STATUS1_LDO4_SHIFT 0x07
3575 #define TPS65917_LDO_SHORT_STATUS1_LDO2 0x02
3576 #define TPS65917_LDO_SHORT_STATUS1_LDO2_SHIFT 0x01
3577 #define TPS65917_LDO_SHORT_STATUS1_LDO1 0x01
3578 #define TPS65917_LDO_SHORT_STATUS1_LDO1_SHIFT 0x00
3581 #define TPS65917_LDO_SHORT_STATUS2_LDO3 0x04
3582 #define TPS65917_LDO_SHORT_STATUS2_LDO3_SHIFT 0x02
3583 #define TPS65917_LDO_SHORT_STATUS2_LDO5 0x02
3584 #define TPS65917_LDO_SHORT_STATUS2_LDO5_SHIFT 0x01
3587 #define TPS65917_LDO_SHORT_STATUS2_LDOVANA 0x80
3588 #define TPS65917_LDO_SHORT_STATUS2_LDOVANA_SHIFT 0x07
3591 #define TPS65917_REGEN1_CTRL_STATUS 0x10
3592 #define TPS65917_REGEN1_CTRL_STATUS_SHIFT 0x04
3593 #define TPS65917_REGEN1_CTRL_MODE_SLEEP 0x04
3594 #define TPS65917_REGEN1_CTRL_MODE_SLEEP_SHIFT 0x02
3595 #define TPS65917_REGEN1_CTRL_MODE_ACTIVE 0x01
3596 #define TPS65917_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0x00
3599 #define TPS65917_PLLEN_CTRL_STATUS 0x10
3600 #define TPS65917_PLLEN_CTRL_STATUS_SHIFT 0x04
3601 #define TPS65917_PLLEN_CTRL_MODE_SLEEP 0x04
3602 #define TPS65917_PLLEN_CTRL_MODE_SLEEP_SHIFT 0x02
3603 #define TPS65917_PLLEN_CTRL_MODE_ACTIVE 0x01
3604 #define TPS65917_PLLEN_CTRL_MODE_ACTIVE_SHIFT 0x00
3607 #define TPS65917_REGEN2_CTRL_STATUS 0x10
3608 #define TPS65917_REGEN2_CTRL_STATUS_SHIFT 0x04
3609 #define TPS65917_REGEN2_CTRL_MODE_SLEEP 0x04
3610 #define TPS65917_REGEN2_CTRL_MODE_SLEEP_SHIFT 0x02
3611 #define TPS65917_REGEN2_CTRL_MODE_ACTIVE 0x01
3612 #define TPS65917_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0x00
3615 #define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN 0x08
3616 #define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN_SHIFT 0x03
3617 #define TPS65917_NSLEEP_RES_ASSIGN_REGEN3 0x04
3618 #define TPS65917_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 0x02
3619 #define TPS65917_NSLEEP_RES_ASSIGN_REGEN2 0x02
3620 #define TPS65917_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 0x01
3621 #define TPS65917_NSLEEP_RES_ASSIGN_REGEN1 0x01
3622 #define TPS65917_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0x00
3625 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5 0x40
3626 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5_SHIFT 0x06
3627 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4 0x10
3628 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4_SHIFT 0x04
3629 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3 0x08
3630 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 0x03
3631 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2 0x02
3632 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2_SHIFT 0x01
3633 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1 0x01
3634 #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1_SHIFT 0x00
3637 #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4 0x80
3638 #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 0x07
3639 #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2 0x02
3640 #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 0x01
3641 #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1 0x01
3642 #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0x00
3645 #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3 0x04
3646 #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3_SHIFT 0x02
3647 #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5 0x02
3648 #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5_SHIFT 0x01
3651 #define TPS65917_ENABLE1_RES_ASSIGN_PLLEN 0x08
3652 #define TPS65917_ENABLE1_RES_ASSIGN_PLLEN_SHIFT 0x03
3653 #define TPS65917_ENABLE1_RES_ASSIGN_REGEN3 0x04
3654 #define TPS65917_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 0x02
3655 #define TPS65917_ENABLE1_RES_ASSIGN_REGEN2 0x02
3656 #define TPS65917_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 0x01
3657 #define TPS65917_ENABLE1_RES_ASSIGN_REGEN1 0x01
3658 #define TPS65917_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0x00
3661 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5 0x40
3662 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5_SHIFT 0x06
3663 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4 0x10
3664 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4_SHIFT 0x04
3665 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3 0x08
3666 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 0x03
3667 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2 0x02
3668 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2_SHIFT 0x01
3669 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1 0x01
3670 #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1_SHIFT 0x00
3673 #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4 0x80
3674 #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 0x07
3675 #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2 0x02
3676 #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 0x01
3677 #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1 0x01
3678 #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0x00
3681 #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3 0x04
3682 #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3_SHIFT 0x02
3683 #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5 0x02
3684 #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5_SHIFT 0x01
3687 #define TPS65917_ENABLE2_RES_ASSIGN_PLLEN 0x08
3688 #define TPS65917_ENABLE2_RES_ASSIGN_PLLEN_SHIFT 0x03
3689 #define TPS65917_ENABLE2_RES_ASSIGN_REGEN3 0x04
3690 #define TPS65917_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 0x02
3691 #define TPS65917_ENABLE2_RES_ASSIGN_REGEN2 0x02
3692 #define TPS65917_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 0x01
3693 #define TPS65917_ENABLE2_RES_ASSIGN_REGEN1 0x01
3694 #define TPS65917_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0x00
3697 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5 0x40
3698 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5_SHIFT 0x06
3699 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4 0x10
3700 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4_SHIFT 0x04
3701 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3 0x08
3702 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 0x03
3703 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2 0x02
3704 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2_SHIFT 0x01
3705 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1 0x01
3706 #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1_SHIFT 0x00
3709 #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4 0x80
3710 #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 0x07
3711 #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2 0x02
3712 #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 0x01
3713 #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1 0x01
3714 #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0x00
3717 #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3 0x04
3718 #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3_SHIFT 0x02
3719 #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5 0x02
3720 #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5_SHIFT 0x01
3723 #define TPS65917_REGEN3_CTRL_STATUS 0x10
3724 #define TPS65917_REGEN3_CTRL_STATUS_SHIFT 0x04
3725 #define TPS65917_REGEN3_CTRL_MODE_SLEEP 0x04
3726 #define TPS65917_REGEN3_CTRL_MODE_SLEEP_SHIFT 0x02
3727 #define TPS65917_REGEN3_CTRL_MODE_ACTIVE 0x01
3728 #define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0x00
3731 #define TPS65917_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK 0xC
3734 #define TPS65917_REGEN1_CTRL 0x2
3735 #define TPS65917_PLLEN_CTRL 0x3
3736 #define TPS65917_NSLEEP_RES_ASSIGN 0x6
3737 #define TPS65917_NSLEEP_SMPS_ASSIGN 0x7
3738 #define TPS65917_NSLEEP_LDO_ASSIGN1 0x8
3739 #define TPS65917_NSLEEP_LDO_ASSIGN2 0x9
3740 #define TPS65917_ENABLE1_RES_ASSIGN 0xA
3741 #define TPS65917_ENABLE1_SMPS_ASSIGN 0xB
3742 #define TPS65917_ENABLE1_LDO_ASSIGN1 0xC
3743 #define TPS65917_ENABLE1_LDO_ASSIGN2 0xD
3744 #define TPS65917_ENABLE2_RES_ASSIGN 0xE
3745 #define TPS65917_ENABLE2_SMPS_ASSIGN 0xF
3746 #define TPS65917_ENABLE2_LDO_ASSIGN1 0x10
3747 #define TPS65917_ENABLE2_LDO_ASSIGN2 0x11
3748 #define TPS65917_REGEN2_CTRL 0x12
3749 #define TPS65917_REGEN3_CTRL 0x13