Lines Matching +full:6 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * DA9150 MFD Driver - Registers
159 #define DA9150_WRITE_MODE_SHIFT 6
160 #define DA9150_WRITE_MODE_MASK BIT(6)
162 #define DA9150_REVERT_MASK BIT(7)
167 #define DA9150_SLEEP_STAT_SHIFT 6
168 #define DA9150_SLEEP_STAT_MASK (0x03 << 6)
172 #define DA9150_VFAULT_STAT_MASK BIT(0)
174 #define DA9150_TFAULT_STAT_MASK BIT(1)
178 #define DA9150_VDD33_STAT_MASK BIT(0)
180 #define DA9150_VDD33_SLEEP_MASK BIT(1)
182 #define DA9150_LFOSC_STAT_MASK BIT(7)
186 #define DA9150_GPIOA_STAT_MASK BIT(0)
188 #define DA9150_GPIOB_STAT_MASK BIT(1)
190 #define DA9150_GPIOC_STAT_MASK BIT(2)
192 #define DA9150_GPIOD_STAT_MASK BIT(3)
198 #define DA9150_DTYPE_DT_USB_OTG BIT(0)
213 #define DA9150_SESS_VLD_MASK BIT(0)
215 #define DA9150_ID_ERR_MASK BIT(1)
217 #define DA9150_PT_CHG_MASK BIT(2)
227 #define DA9150_VBUS_STAT_WAIT BIT(0)
230 #define DA9150_VBUS_TRED_MASK BIT(3)
238 #define DA9150_VBUS_OT_MASK BIT(7)
244 #define DA9150_CHG_STAT_SUSP BIT(0)
258 #define DA9150_CHG_IEND_STAT_MASK BIT(7)
270 #define DA9150_CHG_TIME_MASK BIT(1)
272 #define DA9150_CHG_TRED_MASK BIT(2)
276 #define DA9150_EBS_STAT_SHIFT 6
277 #define DA9150_EBS_STAT_MASK BIT(6)
279 #define DA9150_CHG_BAT_REMOVED_MASK BIT(7)
283 #define DA9150_TEMP_FAULT_MASK BIT(0)
285 #define DA9150_VSYS_FAULT_MASK BIT(1)
287 #define DA9150_START_FAULT_MASK BIT(2)
289 #define DA9150_EXT_FAULT_MASK BIT(3)
291 #define DA9150_POR_FAULT_MASK BIT(4)
295 #define DA9150_VBUS_FAULT_MASK BIT(0)
297 #define DA9150_OTG_FAULT_MASK BIT(1)
301 #define DA9150_E_VBUS_MASK BIT(0)
303 #define DA9150_E_CHG_MASK BIT(1)
305 #define DA9150_E_TCLASS_MASK BIT(2)
307 #define DA9150_E_TJUNC_MASK BIT(3)
309 #define DA9150_E_VFAULT_MASK BIT(4)
311 #define DA9150_EVENTS_H_MASK BIT(5)
312 #define DA9150_EVENTS_G_SHIFT 6
313 #define DA9150_EVENTS_G_MASK BIT(6)
315 #define DA9150_EVENTS_F_MASK BIT(7)
319 #define DA9150_E_CONF_MASK BIT(0)
321 #define DA9150_E_DAT_MASK BIT(1)
323 #define DA9150_E_DTYPE_MASK BIT(3)
325 #define DA9150_E_ID_MASK BIT(4)
327 #define DA9150_E_ADP_MASK BIT(5)
328 #define DA9150_E_SESS_END_SHIFT 6
329 #define DA9150_E_SESS_END_MASK BIT(6)
331 #define DA9150_E_SESS_VLD_MASK BIT(7)
335 #define DA9150_E_FG_MASK BIT(0)
337 #define DA9150_E_GP_MASK BIT(1)
339 #define DA9150_E_TBAT_MASK BIT(2)
341 #define DA9150_E_GPIOA_MASK BIT(3)
343 #define DA9150_E_GPIOB_MASK BIT(4)
345 #define DA9150_E_GPIOC_MASK BIT(5)
346 #define DA9150_E_GPIOD_SHIFT 6
347 #define DA9150_E_GPIOD_MASK BIT(6)
349 #define DA9150_E_GPADC_MASK BIT(7)
353 #define DA9150_E_WKUP_MASK BIT(0)
357 #define DA9150_M_VBUS_MASK BIT(0)
359 #define DA9150_M_CHG_MASK BIT(1)
361 #define DA9150_M_TJUNC_MASK BIT(3)
363 #define DA9150_M_VFAULT_MASK BIT(4)
367 #define DA9150_M_CONF_MASK BIT(0)
369 #define DA9150_M_DAT_MASK BIT(1)
371 #define DA9150_M_DTYPE_MASK BIT(3)
373 #define DA9150_M_ID_MASK BIT(4)
375 #define DA9150_M_ADP_MASK BIT(5)
376 #define DA9150_M_SESS_END_SHIFT 6
377 #define DA9150_M_SESS_END_MASK BIT(6)
379 #define DA9150_M_SESS_VLD_MASK BIT(7)
383 #define DA9150_M_FG_MASK BIT(0)
385 #define DA9150_M_GP_MASK BIT(1)
387 #define DA9150_M_TBAT_MASK BIT(2)
389 #define DA9150_M_GPIOA_MASK BIT(3)
391 #define DA9150_M_GPIOB_MASK BIT(4)
393 #define DA9150_M_GPIOC_MASK BIT(5)
394 #define DA9150_M_GPIOD_SHIFT 6
395 #define DA9150_M_GPIOD_MASK BIT(6)
397 #define DA9150_M_GPADC_MASK BIT(7)
401 #define DA9150_M_WKUP_MASK BIT(0)
406 #define DA9150_WRITE_MODE_SHIFT 6
407 #define DA9150_WRITE_MODE_MASK BIT(6)
409 #define DA9150_REVERT_MASK BIT(7)
418 #define DA9150_PS_WAIT_EN_SHIFT 6
419 #define DA9150_PS_WAIT_EN_MASK BIT(6)
421 #define DA9150_PS_DISABLE_DIRECT_MASK BIT(7)
429 #define DA9150_VFAULT_EN_MASK BIT(7)
437 #define DA9150_LFOSC_EXT_MASK BIT(0)
439 #define DA9150_VDD33_DWN_MASK BIT(1)
441 #define DA9150_WKUP_PM_EN_MASK BIT(2)
445 #define DA9150_WKUP_CLK32K_EN_MASK BIT(5)
447 #define DA9150_DISABLE_DEL_MASK BIT(7)
451 #define DA9150_PM_SPKSUP_DIS_MASK BIT(0)
453 #define DA9150_PM_MERGE_MASK BIT(1)
455 #define DA9150_PM_SR_OFF_MASK BIT(2)
457 #define DA9150_PM_TIMEOUT_EN_MASK BIT(3)
461 #define DA9150_PM_OUT_DLY_SEL_MASK BIT(7)
465 #define DA9150_VDD33_SL_MASK BIT(0)
469 #define DA9150_VDD33_EN_MASK BIT(3)
470 #define DA9150_GPI_LPM_SHIFT 6
471 #define DA9150_GPI_LPM_MASK BIT(6)
473 #define DA9150_PM_IF_LPM_MASK BIT(7)
477 #define DA9150_LPM_MASK BIT(0)
479 #define DA9150_RESET_MASK BIT(1)
481 #define DA9150_RESET_USRCONF_EN_MASK BIT(2)
485 #define DA9150_DISABLE_MASK BIT(0)
491 #define DA9150_GPIOA_PIN_GPO_OD BIT(0)
493 #define DA9150_GPIOA_TYPE_MASK BIT(3)
497 #define DA9150_GPIOB_PIN_GPO_OD BIT(4)
499 #define DA9150_GPIOB_TYPE_MASK BIT(7)
505 #define DA9150_GPIOC_PIN_GPO_OD BIT(0)
507 #define DA9150_GPIOC_TYPE_MASK BIT(3)
511 #define DA9150_GPIOD_PIN_GPO_OD BIT(4)
513 #define DA9150_GPIOD_TYPE_MASK BIT(7)
517 #define DA9150_GPIOA_MODE_MASK BIT(0)
519 #define DA9150_GPIOB_MODE_MASK BIT(1)
521 #define DA9150_GPIOC_MODE_MASK BIT(2)
523 #define DA9150_GPIOD_MODE_MASK BIT(3)
525 #define DA9150_GPIOA_CONT_MASK BIT(4)
527 #define DA9150_GPIOB_CONT_MASK BIT(5)
528 #define DA9150_GPIOC_CONT_SHIFT 6
529 #define DA9150_GPIOC_CONT_MASK BIT(6)
531 #define DA9150_GPIOD_CONT_MASK BIT(7)
537 #define DA9150_WAKE_MODE_MASK BIT(2)
539 #define DA9150_WAKE_CONT_MASK BIT(3)
541 #define DA9150_WAKE_DLY_MASK BIT(4)
545 #define DA9150_GPIOA_ANAEN_MASK BIT(0)
547 #define DA9150_GPIOB_ANAEN_MASK BIT(1)
549 #define DA9150_GPIOC_ANAEN_MASK BIT(2)
551 #define DA9150_GPIOD_ANAEN_MASK BIT(3)
561 #define DA9150_CHGBL_DBL_MASK BIT(2)
565 #define DA9150_CHGBL_FLKR_MASK BIT(5)
573 #define DA9150_GPIOA_PUPD_MASK BIT(0)
575 #define DA9150_GPIOB_PUPD_MASK BIT(1)
577 #define DA9150_GPIOC_PUPD_MASK BIT(2)
579 #define DA9150_GPIOD_PUPD_MASK BIT(3)
584 #define DA9150_LPM_EN_MASK BIT(7)
588 #define DA9150_GPI_V_MASK BIT(0)
590 #define DA9150_VDDIO_INT_MASK BIT(1)
593 #define DA9150_FAULT_TYPE_SHIFT 6
594 #define DA9150_FAULT_TYPE_MASK BIT(6)
596 #define DA9150_NIRQ_PUPD_MASK BIT(7)
600 #define DA9150_GPADC_EN_MASK BIT(0)
610 #define DA9150_GPADC_RUN_MASK BIT(0)
611 #define DA9150_GPADC_RES_L_SHIFT 6
612 #define DA9150_GPADC_RES_L_MASK (0x03 << 6)
618 #define DA9150_WRITE_MODE_SHIFT 6
619 #define DA9150_WRITE_MODE_MASK BIT(6)
621 #define DA9150_REVERT_MASK BIT(7)
625 #define DA9150_PC_DONE_MASK BIT(3)
633 #define DA9150_NIRQ_VDD_MASK BIT(1)
635 #define DA9150_NIRQ_PIN_MASK BIT(2)
637 #define DA9150_NIRQ_TYPE_MASK BIT(3)
639 #define DA9150_PM_IF_V_MASK BIT(4)
641 #define DA9150_PM_IF_FMP_MASK BIT(5)
642 #define DA9150_PM_IF_HSM_SHIFT 6
643 #define DA9150_PM_IF_HSM_MASK BIT(6)
647 #define DA9150_NIRQ_MODE_MASK BIT(1)
655 #define DA9150_DCD_STAT_MASK BIT(0)
661 #define DA9150_DP_STAT_MASK BIT(5)
662 #define DA9150_DM_STAT_SHIFT 6
663 #define DA9150_DM_STAT_MASK BIT(6)
667 #define DA9150_DP_COMP_MASK BIT(1)
669 #define DA9150_DM_COMP_MASK BIT(2)
671 #define DA9150_ADP_SNS_COMP_MASK BIT(3)
673 #define DA9150_ADP_PRB_COMP_MASK BIT(4)
675 #define DA9150_ID_COMP_MASK BIT(5)
679 #define DA9150_AID_DAT_MASK BIT(0)
681 #define DA9150_AID_ID_MASK BIT(1)
683 #define DA9150_AID_TRIG_MASK BIT(2)
688 #define DA9150_VB_MODE_VB_SESS BIT(0)
691 #define DA9150_TADP_PRB_MASK BIT(2)
693 #define DA9150_DAT_RPD_EXT_MASK BIT(5)
694 #define DA9150_CONF_RPD_SHIFT 6
695 #define DA9150_CONF_RPD_MASK BIT(6)
697 #define DA9150_CONF_SRP_MASK BIT(7)
703 #define DA9150_AID_EXT_POL_MASK BIT(2)
709 #define DA9150_CONF_DBP_MASK BIT(5)
715 #define DA9150_CONF_GPIOA_MASK BIT(5)
716 #define DA9150_CONF_GPIOB_SHIFT 6
717 #define DA9150_CONF_GPIOB_MASK BIT(6)
719 #define DA9150_AID_VB_MASK BIT(7)
727 #define DA9150_AID_CR_DIS_MASK BIT(7)
733 #define DA9150_AID_UNCLAMP_MASK BIT(5)
740 #define DA9150_DAT_SWP_SHIFT 6
741 #define DA9150_DAT_SWP_MASK BIT(6)
743 #define DA9150_DAT_CLAMP_EXT_MASK BIT(7)
749 #define DA9150_RID_CONV_MASK BIT(3)
756 #define DA9150_RID_PT_CHG_L_SHIFT 6
757 #define DA9150_RID_PT_CHG_L_MASK (0x03 << 6)
766 #define DA9150_VBUS_MODE_CHG BIT(0)
771 #define DA9150_VBUS_SUSP_MASK BIT(4)
773 #define DA9150_VBUS_PWM_MASK BIT(5)
774 #define DA9150_VBUS_ISO_SHIFT 6
775 #define DA9150_VBUS_ISO_MASK BIT(6)
777 #define DA9150_VBUS_LDO_MASK BIT(7)
783 #define DA9150_VBUS_IMAX_MASK BIT(5)
784 #define DA9150_VBUS_IOTG_SHIFT 6
785 #define DA9150_VBUS_IOTG_MASK (0x03 << 6)
790 #define DA9150_VBUS_FAULT_DIS_SHIFT 6
791 #define DA9150_VBUS_FAULT_DIS_MASK BIT(6)
793 #define DA9150_OTG_FAULT_DIS_MASK BIT(7)
797 #define DA9150_CHG_EN_MASK BIT(0)
802 #define DA9150_CHG_VDROP_SHIFT 6
803 #define DA9150_CHG_VDROP_MASK (0x03 << 6)
815 #define DA9150_CHG_TCTR_MODE_MASK BIT(4)
828 #define DA9150_TBAT_TQA_EN_SHIFT 6
829 #define DA9150_TBAT_TQA_EN_MASK BIT(6)
831 #define DA9150_TBAT_TDP_EN_MASK BIT(7)
861 #define DA9150_CHG_LPM_MASK BIT(5)
862 #define DA9150_CHG_NBLO_SHIFT 6
863 #define DA9150_CHG_NBLO_MASK BIT(6)
865 #define DA9150_EBS_EN_MASK BIT(7)
898 #define DA9150_WRITE_MODE_SHIFT 6
899 #define DA9150_WRITE_MODE_MASK BIT(6)
901 #define DA9150_REVERT_MASK BIT(7)
906 #define DA9150_WRITE_MODE_SHIFT 6
907 #define DA9150_WRITE_MODE_MASK BIT(6)
909 #define DA9150_REVERT_MASK BIT(7)
914 #define DA9150_WRITE_MODE_SHIFT 6
915 #define DA9150_WRITE_MODE_MASK BIT(6)
917 #define DA9150_REVERT_MASK BIT(7)
922 #define DA9150_WRITE_MODE_SHIFT 6
923 #define DA9150_WRITE_MODE_MASK BIT(6)
925 #define DA9150_REVERT_MASK BIT(7)
931 #define DA9150_CORE_LOCKUP_MASK BIT(2)
935 #define DA9150_CORE_RESET_MASK BIT(0)
937 #define DA9150_CORE_STOP_MASK BIT(1)
943 #define DA9150_WDT_AUTO_START_MASK BIT(2)
945 #define DA9150_WDT_AUTO_LOCK_MASK BIT(3)
947 #define DA9150_WDT_HLT_NO_CLK_MASK BIT(4)
955 #define DA9150_BOOTLD_EN_MASK BIT(0)
957 #define DA9150_CORE_EN_MASK BIT(2)
961 #define DA9150_DEEP_SLEEP_EN_MASK BIT(7)
993 #define DA9150_FW_FWDL_ERR_MASK BIT(7)
997 #define DA9150_FW_FWDL_EN_MASK BIT(0)
999 #define DA9150_FG_QIF_EN_MASK BIT(1)
1033 #define DA9150_GPADC_CEN_MASK BIT(0)
1043 #define DA9150_GPADC_CRUN_MASK BIT(0)
1044 #define DA9150_GPADC_CRES_L_SHIFT 6
1045 #define DA9150_GPADC_CRES_L_MASK (0x03 << 6)
1049 #define DA9150_CC_EN_MASK BIT(0)
1055 #define DA9150_CC_ENDLESS_MODE_MASK BIT(7)
1081 #define DA9150_TAUX_EN_MASK BIT(0)
1083 #define DA9150_TAUX_MOD_MASK BIT(1)
1085 #define DA9150_TAUX_UPDATE_MASK BIT(2)
1121 #define DA9150_BIF_ISRC_EN_MASK BIT(0)
1125 #define DA9150_TBAT_EN_MASK BIT(0)
1127 #define DA9150_TBAT_SW1_MASK BIT(1)
1129 #define DA9150_TBAT_SW2_MASK BIT(2)
1133 #define DA9150_TBAT_SW_FRC_MASK BIT(0)
1135 #define DA9150_TBAT_STAT_SW1_MASK BIT(1)
1137 #define DA9150_TBAT_STAT_SW2_MASK BIT(2)
1139 #define DA9150_TBAT_HIGH_CURR_MASK BIT(3)
1147 #define DA9150_TBAT_RES_DIS_MASK BIT(0)
1148 #define DA9150_TBAT_RES_L_SHIFT 6
1149 #define DA9150_TBAT_RES_L_MASK (0x03 << 6)