Lines Matching full:wdt

164 	{ .compatible = "samsung,s3c2410-wdt",
166 { .compatible = "samsung,s3c6410-wdt",
168 { .compatible = "samsung,exynos5250-wdt",
170 { .compatible = "samsung,exynos5420-wdt",
172 { .compatible = "samsung,exynos7-wdt",
181 .name = "s3c2410-wdt",
203 static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask) in s3c2410wdt_mask_and_disable_reset() argument
206 u32 mask_val = 1 << wdt->drv_data->mask_bit; in s3c2410wdt_mask_and_disable_reset()
210 if (!(wdt->drv_data->quirks & QUIRK_HAS_PMU_CONFIG)) in s3c2410wdt_mask_and_disable_reset()
216 ret = regmap_update_bits(wdt->pmureg, in s3c2410wdt_mask_and_disable_reset()
217 wdt->drv_data->disable_reg, in s3c2410wdt_mask_and_disable_reset()
222 ret = regmap_update_bits(wdt->pmureg, in s3c2410wdt_mask_and_disable_reset()
223 wdt->drv_data->mask_reset_reg, in s3c2410wdt_mask_and_disable_reset()
227 dev_err(wdt->dev, "failed to update reg(%d)\n", ret); in s3c2410wdt_mask_and_disable_reset()
234 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_keepalive() local
236 spin_lock(&wdt->lock); in s3c2410wdt_keepalive()
237 writel(wdt->count, wdt->reg_base + S3C2410_WTCNT); in s3c2410wdt_keepalive()
238 spin_unlock(&wdt->lock); in s3c2410wdt_keepalive()
243 static void __s3c2410wdt_stop(struct s3c2410_wdt *wdt) in __s3c2410wdt_stop() argument
247 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in __s3c2410wdt_stop()
249 writel(wtcon, wdt->reg_base + S3C2410_WTCON); in __s3c2410wdt_stop()
254 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_stop() local
256 spin_lock(&wdt->lock); in s3c2410wdt_stop()
257 __s3c2410wdt_stop(wdt); in s3c2410wdt_stop()
258 spin_unlock(&wdt->lock); in s3c2410wdt_stop()
266 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_start() local
268 spin_lock(&wdt->lock); in s3c2410wdt_start()
270 __s3c2410wdt_stop(wdt); in s3c2410wdt_start()
272 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_start()
283 dev_dbg(wdt->dev, "Starting watchdog: count=0x%08x, wtcon=%08lx\n", in s3c2410wdt_start()
284 wdt->count, wtcon); in s3c2410wdt_start()
286 writel(wdt->count, wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_start()
287 writel(wdt->count, wdt->reg_base + S3C2410_WTCNT); in s3c2410wdt_start()
288 writel(wtcon, wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_start()
289 spin_unlock(&wdt->lock); in s3c2410wdt_start()
294 static inline int s3c2410wdt_is_running(struct s3c2410_wdt *wdt) in s3c2410wdt_is_running() argument
296 return readl(wdt->reg_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE; in s3c2410wdt_is_running()
302 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_set_heartbeat() local
303 unsigned long freq = clk_get_rate(wdt->clock); in s3c2410wdt_set_heartbeat()
314 dev_dbg(wdt->dev, "Heartbeat: count=%d, timeout=%d, freq=%lu\n", in s3c2410wdt_set_heartbeat()
326 dev_err(wdt->dev, "timeout %d too big\n", timeout); in s3c2410wdt_set_heartbeat()
331 dev_dbg(wdt->dev, "Heartbeat: timeout=%d, divisor=%d, count=%d (%08x)\n", in s3c2410wdt_set_heartbeat()
335 wdt->count = count; in s3c2410wdt_set_heartbeat()
338 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_set_heartbeat()
342 writel(count, wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_set_heartbeat()
343 writel(wtcon, wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_set_heartbeat()
353 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_restart() local
354 void __iomem *wdt_base = wdt->reg_base; in s3c2410wdt_restart()
401 struct s3c2410_wdt *wdt = platform_get_drvdata(param); in s3c2410wdt_irq() local
403 dev_info(wdt->dev, "watchdog timer expired (irq)\n"); in s3c2410wdt_irq()
405 s3c2410wdt_keepalive(&wdt->wdt_device); in s3c2410wdt_irq()
407 if (wdt->drv_data->quirks & QUIRK_HAS_WTCLRINT_REG) in s3c2410wdt_irq()
408 writel(0x1, wdt->reg_base + S3C2410_WTCLRINT); in s3c2410wdt_irq()
419 struct s3c2410_wdt *wdt = freq_to_wdt(nb); in s3c2410wdt_cpufreq_transition() local
421 if (!s3c2410wdt_is_running(wdt)) in s3c2410wdt_cpufreq_transition()
430 s3c2410wdt_keepalive(&wdt->wdt_device); in s3c2410wdt_cpufreq_transition()
432 s3c2410wdt_stop(&wdt->wdt_device); in s3c2410wdt_cpufreq_transition()
434 ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device, in s3c2410wdt_cpufreq_transition()
435 wdt->wdt_device.timeout); in s3c2410wdt_cpufreq_transition()
438 s3c2410wdt_start(&wdt->wdt_device); in s3c2410wdt_cpufreq_transition()
447 dev_err(wdt->dev, "cannot set new value for timeout %d\n", in s3c2410wdt_cpufreq_transition()
448 wdt->wdt_device.timeout); in s3c2410wdt_cpufreq_transition()
452 static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt) in s3c2410wdt_cpufreq_register() argument
454 wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition; in s3c2410wdt_cpufreq_register()
456 return cpufreq_register_notifier(&wdt->freq_transition, in s3c2410wdt_cpufreq_register()
460 static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt) in s3c2410wdt_cpufreq_deregister() argument
462 wdt->freq_transition.notifier_call = s3c2410wdt_cpufreq_transition; in s3c2410wdt_cpufreq_deregister()
464 cpufreq_unregister_notifier(&wdt->freq_transition, in s3c2410wdt_cpufreq_deregister()
470 static inline int s3c2410wdt_cpufreq_register(struct s3c2410_wdt *wdt) in s3c2410wdt_cpufreq_register() argument
475 static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt) in s3c2410wdt_cpufreq_deregister() argument
480 static inline unsigned int s3c2410wdt_get_bootstatus(struct s3c2410_wdt *wdt) in s3c2410wdt_get_bootstatus() argument
485 if (!(wdt->drv_data->quirks & QUIRK_HAS_RST_STAT)) in s3c2410wdt_get_bootstatus()
488 ret = regmap_read(wdt->pmureg, wdt->drv_data->rst_stat_reg, &rst_stat); in s3c2410wdt_get_bootstatus()
490 dev_warn(wdt->dev, "Couldn't get RST_STAT register\n"); in s3c2410wdt_get_bootstatus()
491 else if (rst_stat & BIT(wdt->drv_data->rst_stat_bit)) in s3c2410wdt_get_bootstatus()
515 struct s3c2410_wdt *wdt; in s3c2410wdt_probe() local
521 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); in s3c2410wdt_probe()
522 if (!wdt) in s3c2410wdt_probe()
525 wdt->dev = dev; in s3c2410wdt_probe()
526 spin_lock_init(&wdt->lock); in s3c2410wdt_probe()
527 wdt->wdt_device = s3c2410_wdd; in s3c2410wdt_probe()
529 wdt->drv_data = s3c2410_get_wdt_drv_data(pdev); in s3c2410wdt_probe()
530 if (wdt->drv_data->quirks & QUIRKS_HAVE_PMUREG) { in s3c2410wdt_probe()
531 wdt->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node, in s3c2410wdt_probe()
533 if (IS_ERR(wdt->pmureg)) { in s3c2410wdt_probe()
535 return PTR_ERR(wdt->pmureg); in s3c2410wdt_probe()
547 wdt->reg_base = devm_platform_ioremap_resource(pdev, 0); in s3c2410wdt_probe()
548 if (IS_ERR(wdt->reg_base)) { in s3c2410wdt_probe()
549 ret = PTR_ERR(wdt->reg_base); in s3c2410wdt_probe()
553 wdt->clock = devm_clk_get(dev, "watchdog"); in s3c2410wdt_probe()
554 if (IS_ERR(wdt->clock)) { in s3c2410wdt_probe()
556 ret = PTR_ERR(wdt->clock); in s3c2410wdt_probe()
560 ret = clk_prepare_enable(wdt->clock); in s3c2410wdt_probe()
566 wdt->wdt_device.min_timeout = 1; in s3c2410wdt_probe()
567 wdt->wdt_device.max_timeout = s3c2410wdt_max_timeout(wdt->clock); in s3c2410wdt_probe()
569 ret = s3c2410wdt_cpufreq_register(wdt); in s3c2410wdt_probe()
575 watchdog_set_drvdata(&wdt->wdt_device, wdt); in s3c2410wdt_probe()
580 watchdog_init_timeout(&wdt->wdt_device, tmr_margin, dev); in s3c2410wdt_probe()
581 ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device, in s3c2410wdt_probe()
582 wdt->wdt_device.timeout); in s3c2410wdt_probe()
584 started = s3c2410wdt_set_heartbeat(&wdt->wdt_device, in s3c2410wdt_probe()
602 watchdog_set_nowayout(&wdt->wdt_device, nowayout); in s3c2410wdt_probe()
603 watchdog_set_restart_priority(&wdt->wdt_device, 128); in s3c2410wdt_probe()
605 wdt->wdt_device.bootstatus = s3c2410wdt_get_bootstatus(wdt); in s3c2410wdt_probe()
606 wdt->wdt_device.parent = dev; in s3c2410wdt_probe()
608 ret = watchdog_register_device(&wdt->wdt_device); in s3c2410wdt_probe()
612 ret = s3c2410wdt_mask_and_disable_reset(wdt, false); in s3c2410wdt_probe()
618 s3c2410wdt_start(&wdt->wdt_device); in s3c2410wdt_probe()
624 s3c2410wdt_stop(&wdt->wdt_device); in s3c2410wdt_probe()
627 platform_set_drvdata(pdev, wdt); in s3c2410wdt_probe()
631 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_probe()
641 watchdog_unregister_device(&wdt->wdt_device); in s3c2410wdt_probe()
644 s3c2410wdt_cpufreq_deregister(wdt); in s3c2410wdt_probe()
647 clk_disable_unprepare(wdt->clock); in s3c2410wdt_probe()
656 struct s3c2410_wdt *wdt = platform_get_drvdata(dev); in s3c2410wdt_remove() local
658 ret = s3c2410wdt_mask_and_disable_reset(wdt, true); in s3c2410wdt_remove()
662 watchdog_unregister_device(&wdt->wdt_device); in s3c2410wdt_remove()
664 s3c2410wdt_cpufreq_deregister(wdt); in s3c2410wdt_remove()
666 clk_disable_unprepare(wdt->clock); in s3c2410wdt_remove()
673 struct s3c2410_wdt *wdt = platform_get_drvdata(dev); in s3c2410wdt_shutdown() local
675 s3c2410wdt_mask_and_disable_reset(wdt, true); in s3c2410wdt_shutdown()
677 s3c2410wdt_stop(&wdt->wdt_device); in s3c2410wdt_shutdown()
685 struct s3c2410_wdt *wdt = dev_get_drvdata(dev); in s3c2410wdt_suspend() local
688 wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_suspend()
689 wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_suspend()
691 ret = s3c2410wdt_mask_and_disable_reset(wdt, true); in s3c2410wdt_suspend()
696 s3c2410wdt_stop(&wdt->wdt_device); in s3c2410wdt_suspend()
704 struct s3c2410_wdt *wdt = dev_get_drvdata(dev); in s3c2410wdt_resume() local
707 writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_resume()
708 writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */ in s3c2410wdt_resume()
709 writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_resume()
711 ret = s3c2410wdt_mask_and_disable_reset(wdt, false); in s3c2410wdt_resume()
716 (wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis"); in s3c2410wdt_resume()
731 .name = "s3c2410-wdt",