Lines Matching +full:standard +full:- +full:vt
1 // SPDX-License-Identifier: GPL-2.0-only
14 * I2C part copied from the i2c-voodoo3.c driver by:
17 * Ralph Metzler <rjkm@thp.uni-koeln.de>, and
45 * - multihead support (basically need to support an array of fb_infos)
46 * - support other architectures (PPC, Alpha); does the fact that the VGA
52 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
54 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
60 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
62 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
63 * 0.1.0 (released 1999-10-06) initial version
105 .height = -1,
106 .width = -1,
155 /* -------------------------------------------------------------------------
156 * Hardware-specific funcions
157 * ------------------------------------------------------------------------- */
161 return inb(par->iobase + reg - 0x300); in vga_inb()
166 outb(val, par->iobase + reg - 0x300); in vga_outb()
245 return readl(par->regbase_virt + reg); in tdfx_inl()
250 writel(val, par->regbase_virt + reg); in tdfx_outl()
257 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1) in banshee_make_room()
263 struct tdfx_par *par = info->par; in banshee_wait_idle()
297 for (k = 3; k >= 0; k--) { in do_calc_pll()
298 for (m = 63; m >= 0; m--) { in do_calc_pll()
303 int n_estimated = ((freq * (m + 2) << k) / fref) - 2; in do_calc_pll()
314 int error = abs(f - freq); in do_calc_pll()
340 struct tdfx_par *par = info->par; in do_write_regs()
350 tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF); in do_write_regs()
351 tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001); in do_write_regs()
353 tdfx_outl(par, PLLCTRL1, reg->mempll); in do_write_regs()
354 tdfx_outl(par, PLLCTRL2, reg->gfxpll); in do_write_regs()
356 tdfx_outl(par, PLLCTRL0, reg->vidpll); in do_write_regs()
358 vga_outb(par, MISC_W, reg->misc[0x00] | 0x01); in do_write_regs()
361 seq_outb(par, i, reg->seq[i]); in do_write_regs()
364 crt_outb(par, i, reg->crt[i]); in do_write_regs()
367 gra_outb(par, i, reg->gra[i]); in do_write_regs()
370 att_outb(par, i, reg->att[i]); in do_write_regs()
372 crt_outb(par, 0x1a, reg->ext[0]); in do_write_regs()
373 crt_outb(par, 0x1b, reg->ext[1]); in do_write_regs()
379 tdfx_outl(par, VGAINIT0, reg->vgainit0); in do_write_regs()
380 tdfx_outl(par, DACMODE, reg->dacmode); in do_write_regs()
381 tdfx_outl(par, VIDDESKSTRIDE, reg->stride); in do_write_regs()
382 tdfx_outl(par, HWCURPATADDR, reg->curspataddr); in do_write_regs()
384 tdfx_outl(par, VIDSCREENSIZE, reg->screensize); in do_write_regs()
385 tdfx_outl(par, VIDDESKSTART, reg->startaddr); in do_write_regs()
386 tdfx_outl(par, VIDPROCCFG, reg->vidcfg); in do_write_regs()
387 tdfx_outl(par, VGAINIT1, reg->vgainit1); in do_write_regs()
388 tdfx_outl(par, MISCINIT0, reg->miscinit0); in do_write_regs()
391 tdfx_outl(par, SRCBASE, reg->startaddr); in do_write_regs()
392 tdfx_outl(par, DSTBASE, reg->startaddr); in do_write_regs()
434 /* ------------------------------------------------------------------------- */
438 struct tdfx_par *par = info->par; in tdfxfb_check_var()
441 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 && in tdfxfb_check_var()
442 var->bits_per_pixel != 24 && var->bits_per_pixel != 32) { in tdfxfb_check_var()
443 DPRINTK("depth not supported: %u\n", var->bits_per_pixel); in tdfxfb_check_var()
444 return -EINVAL; in tdfxfb_check_var()
447 if (var->xres != var->xres_virtual) in tdfxfb_check_var()
448 var->xres_virtual = var->xres; in tdfxfb_check_var()
450 if (var->yres > var->yres_virtual) in tdfxfb_check_var()
451 var->yres_virtual = var->yres; in tdfxfb_check_var()
453 if (var->xoffset) { in tdfxfb_check_var()
455 return -EINVAL; in tdfxfb_check_var()
457 var->yoffset = 0; in tdfxfb_check_var()
465 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) && in tdfxfb_check_var()
466 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) { in tdfxfb_check_var()
468 return -EINVAL; in tdfxfb_check_var()
471 if (info->monspecs.hfmax && info->monspecs.vfmax && in tdfxfb_check_var()
472 info->monspecs.dclkmax && fb_validate_mode(var, info) < 0) { in tdfxfb_check_var()
474 return -EINVAL; in tdfxfb_check_var()
477 var->xres = (var->xres + 15) & ~15; /* could sometimes be 8 */ in tdfxfb_check_var()
478 lpitch = var->xres * ((var->bits_per_pixel + 7) >> 3); in tdfxfb_check_var()
480 if (var->xres < 320 || var->xres > 2048) { in tdfxfb_check_var()
481 DPRINTK("width not supported: %u\n", var->xres); in tdfxfb_check_var()
482 return -EINVAL; in tdfxfb_check_var()
485 if (var->yres < 200 || var->yres > 2048) { in tdfxfb_check_var()
486 DPRINTK("height not supported: %u\n", var->yres); in tdfxfb_check_var()
487 return -EINVAL; in tdfxfb_check_var()
490 if (lpitch * var->yres_virtual > info->fix.smem_len) { in tdfxfb_check_var()
491 var->yres_virtual = info->fix.smem_len / lpitch; in tdfxfb_check_var()
492 if (var->yres_virtual < var->yres) { in tdfxfb_check_var()
494 var->xres, var->yres_virtual, in tdfxfb_check_var()
495 var->bits_per_pixel); in tdfxfb_check_var()
496 return -EINVAL; in tdfxfb_check_var()
500 if (PICOS2KHZ(var->pixclock) > par->max_pixclock) { in tdfxfb_check_var()
502 PICOS2KHZ(var->pixclock)); in tdfxfb_check_var()
503 return -EINVAL; in tdfxfb_check_var()
506 var->transp.offset = 0; in tdfxfb_check_var()
507 var->transp.length = 0; in tdfxfb_check_var()
508 switch (var->bits_per_pixel) { in tdfxfb_check_var()
510 var->red.length = 8; in tdfxfb_check_var()
511 var->red.offset = 0; in tdfxfb_check_var()
512 var->green = var->red; in tdfxfb_check_var()
513 var->blue = var->red; in tdfxfb_check_var()
516 var->red.offset = 11; in tdfxfb_check_var()
517 var->red.length = 5; in tdfxfb_check_var()
518 var->green.offset = 5; in tdfxfb_check_var()
519 var->green.length = 6; in tdfxfb_check_var()
520 var->blue.offset = 0; in tdfxfb_check_var()
521 var->blue.length = 5; in tdfxfb_check_var()
524 var->transp.offset = 24; in tdfxfb_check_var()
525 var->transp.length = 8; in tdfxfb_check_var()
528 var->red.offset = 16; in tdfxfb_check_var()
529 var->green.offset = 8; in tdfxfb_check_var()
530 var->blue.offset = 0; in tdfxfb_check_var()
531 var->red.length = var->green.length = var->blue.length = 8; in tdfxfb_check_var()
534 var->width = -1; in tdfxfb_check_var()
535 var->height = -1; in tdfxfb_check_var()
537 var->accel_flags = FB_ACCELF_TEXT; in tdfxfb_check_var()
540 var->xres, var->yres, var->bits_per_pixel); in tdfxfb_check_var()
546 struct tdfx_par *par = info->par; in tdfxfb_set_par()
547 u32 hdispend = info->var.xres; in tdfxfb_set_par()
548 u32 hsyncsta = hdispend + info->var.right_margin; in tdfxfb_set_par()
549 u32 hsyncend = hsyncsta + info->var.hsync_len; in tdfxfb_set_par()
550 u32 htotal = hsyncend + info->var.left_margin; in tdfxfb_set_par()
552 u32 vd, vs, ve, vt, vbs, vbe; in tdfxfb_set_par() local
556 u32 cpp = (info->var.bits_per_pixel + 7) >> 3; in tdfxfb_set_par()
562 ((cpp - 1) << VIDCFG_PIXFMT_SHIFT) | in tdfxfb_set_par()
566 freq = PICOS2KHZ(info->var.pixclock); in tdfxfb_set_par()
570 if (freq > par->max_pixclock / 2) { in tdfxfb_set_par()
571 freq = freq > par->max_pixclock ? par->max_pixclock : freq; in tdfxfb_set_par()
580 wd = (hdispend >> 3) - 1; in tdfxfb_set_par()
582 hs = (hsyncsta >> 3) - 1; in tdfxfb_set_par()
583 he = (hsyncend >> 3) - 1; in tdfxfb_set_par()
584 ht = (htotal >> 3) - 1; in tdfxfb_set_par()
588 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) { in tdfxfb_set_par()
589 vd = (info->var.yres << 1) - 1; in tdfxfb_set_par()
590 vs = vd + (info->var.lower_margin << 1); in tdfxfb_set_par()
591 ve = vs + (info->var.vsync_len << 1); in tdfxfb_set_par()
592 vt = ve + (info->var.upper_margin << 1) - 1; in tdfxfb_set_par()
593 reg.screensize = info->var.xres | (info->var.yres << 13); in tdfxfb_set_par()
597 vd = info->var.yres - 1; in tdfxfb_set_par()
598 vs = vd + info->var.lower_margin; in tdfxfb_set_par()
599 ve = vs + info->var.vsync_len; in tdfxfb_set_par()
600 vt = ve + info->var.upper_margin - 1; in tdfxfb_set_par()
601 reg.screensize = info->var.xres | (info->var.yres << 12); in tdfxfb_set_par()
605 vbe = vt; in tdfxfb_set_par()
607 /* this is all pretty standard VGA register stuffing */ in tdfxfb_set_par()
609 (info->var.xres < 400 ? 0xa0 : in tdfxfb_set_par()
610 info->var.xres < 480 ? 0x60 : in tdfxfb_set_par()
611 info->var.xres < 768 ? 0xe0 : 0x20); in tdfxfb_set_par()
643 reg.crt[0x00] = ht - 4; in tdfxfb_set_par()
649 reg.crt[0x06] = vt; in tdfxfb_set_par()
652 ((vt & 0x200) >> 4) | 0x10 | in tdfxfb_set_par()
656 ((vt & 0x100) >> 8); in tdfxfb_set_par()
674 reg.ext[0x01] = (((vt & 0x400) >> 10) | in tdfxfb_set_par()
687 reg.curspataddr = info->fix.smem_len; in tdfxfb_set_par()
694 reg.stride = info->var.xres * cpp; in tdfxfb_set_par()
695 reg.startaddr = info->var.yoffset * reg.stride in tdfxfb_set_par()
696 + info->var.xoffset * cpp; in tdfxfb_set_par()
704 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) in tdfxfb_set_par()
709 switch (info->var.bits_per_pixel) { in tdfxfb_set_par()
728 info->fix.line_length = reg.stride; in tdfxfb_set_par()
729 info->fix.visual = (info->var.bits_per_pixel == 8) in tdfxfb_set_par()
733 info->var.xres, info->var.yres, info->var.bits_per_pixel); in tdfxfb_set_par()
738 #define CNVT_TOHW(val, width) ((((val) << (width)) + 0x7FFF - (val)) >> 16)
744 struct tdfx_par *par = info->par; in tdfxfb_setcolreg()
747 if (regno >= info->cmap.len || regno > 255) in tdfxfb_setcolreg()
751 if (info->var.grayscale) { in tdfxfb_setcolreg()
758 switch (info->fix.visual) { in tdfxfb_setcolreg()
768 rgbcol = (CNVT_TOHW(red, info->var.red.length) << in tdfxfb_setcolreg()
769 info->var.red.offset) | in tdfxfb_setcolreg()
770 (CNVT_TOHW(green, info->var.green.length) << in tdfxfb_setcolreg()
771 info->var.green.offset) | in tdfxfb_setcolreg()
772 (CNVT_TOHW(blue, info->var.blue.length) << in tdfxfb_setcolreg()
773 info->var.blue.offset) | in tdfxfb_setcolreg()
774 (CNVT_TOHW(transp, info->var.transp.length) << in tdfxfb_setcolreg()
775 info->var.transp.offset); in tdfxfb_setcolreg()
776 par->palette[regno] = rgbcol; in tdfxfb_setcolreg()
781 DPRINTK("bad depth %u\n", info->var.bits_per_pixel); in tdfxfb_setcolreg()
791 struct tdfx_par *par = info->par; in tdfxfb_blank()
824 * Set the starting position of the visible screen to var->yoffset
829 struct tdfx_par *par = info->par; in tdfxfb_pan_display()
830 u32 addr = var->yoffset * info->fix.line_length; in tdfxfb_pan_display()
832 if (nopan || var->xoffset) in tdfxfb_pan_display()
833 return -EINVAL; in tdfxfb_pan_display()
848 struct tdfx_par *par = info->par; in tdfxfb_fillrect()
849 u32 bpp = info->var.bits_per_pixel; in tdfxfb_fillrect()
850 u32 stride = info->fix.line_length; in tdfxfb_fillrect()
853 u32 dx = rect->dx; in tdfxfb_fillrect()
854 u32 dy = rect->dy; in tdfxfb_fillrect()
857 if (rect->rop == ROP_COPY) in tdfxfb_fillrect()
862 /* assume always rect->height < 4096 */ in tdfxfb_fillrect()
863 if (dy + rect->height > 4095) { in tdfxfb_fillrect()
867 /* assume always rect->width < 4096 */ in tdfxfb_fillrect()
868 if (dx + rect->width > 4095) { in tdfxfb_fillrect()
874 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) { in tdfxfb_fillrect()
875 tdfx_outl(par, COLORFORE, rect->color); in tdfxfb_fillrect()
877 tdfx_outl(par, COLORFORE, par->palette[rect->color]); in tdfxfb_fillrect()
881 tdfx_outl(par, DSTSIZE, rect->width | (rect->height << 16)); in tdfxfb_fillrect()
886 * Screen-to-Screen BitBlt 2D command (for the bmove fb op.)
891 struct tdfx_par *par = info->par; in tdfxfb_copyarea()
892 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy; in tdfxfb_copyarea()
893 u32 bpp = info->var.bits_per_pixel; in tdfxfb_copyarea()
894 u32 stride = info->fix.line_length; in tdfxfb_copyarea()
900 /* assume always area->height < 4096 */ in tdfxfb_copyarea()
901 if (sy + area->height > 4095) { in tdfxfb_copyarea()
905 /* assume always area->width < 4096 */ in tdfxfb_copyarea()
906 if (sx + area->width > 4095) { in tdfxfb_copyarea()
910 /* assume always area->height < 4096 */ in tdfxfb_copyarea()
911 if (dy + area->height > 4095) { in tdfxfb_copyarea()
915 /* assume always area->width < 4096 */ in tdfxfb_copyarea()
916 if (dx + area->width > 4095) { in tdfxfb_copyarea()
921 if (area->sx <= area->dx) { in tdfxfb_copyarea()
922 /* -X */ in tdfxfb_copyarea()
924 sx += area->width - 1; in tdfxfb_copyarea()
925 dx += area->width - 1; in tdfxfb_copyarea()
927 if (area->sy <= area->dy) { in tdfxfb_copyarea()
928 /* -Y */ in tdfxfb_copyarea()
930 sy += area->height - 1; in tdfxfb_copyarea()
931 dy += area->height - 1; in tdfxfb_copyarea()
939 tdfx_outl(par, DSTSIZE, area->width | (area->height << 16)); in tdfxfb_copyarea()
948 struct tdfx_par *par = info->par; in tdfxfb_imageblit()
949 int size = image->height * ((image->width * image->depth + 7) >> 3); in tdfxfb_imageblit()
951 int i, stride = info->fix.line_length; in tdfxfb_imageblit()
952 u32 bpp = info->var.bits_per_pixel; in tdfxfb_imageblit()
954 u8 *chardata = (u8 *) image->data; in tdfxfb_imageblit()
956 u32 dx = image->dx; in tdfxfb_imageblit()
957 u32 dy = image->dy; in tdfxfb_imageblit()
960 if (image->depth != 1) { in tdfxfb_imageblit()
971 switch (info->fix.visual) { in tdfxfb_imageblit()
973 tdfx_outl(par, COLORFORE, image->fg_color); in tdfxfb_imageblit()
974 tdfx_outl(par, COLORBACK, image->bg_color); in tdfxfb_imageblit()
979 par->palette[image->fg_color]); in tdfxfb_imageblit()
981 par->palette[image->bg_color]); in tdfxfb_imageblit()
988 /* assume always image->height < 4096 */ in tdfxfb_imageblit()
989 if (dy + image->height > 4095) { in tdfxfb_imageblit()
993 /* assume always image->width < 4096 */ in tdfxfb_imageblit()
994 if (dx + image->width > 4095) { in tdfxfb_imageblit()
1006 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16)); in tdfxfb_imageblit()
1013 for (i = (size >> 2); i > 0; i--) { in tdfxfb_imageblit()
1014 if (--fifo_free < 0) { in tdfxfb_imageblit()
1043 struct tdfx_par *par = info->par; in tdfxfb_cursor()
1047 return -EINVAL; /* just to force soft_cursor() call */ in tdfxfb_cursor()
1049 /* Too large of a cursor or wrong bpp :-( */ in tdfxfb_cursor()
1050 if (cursor->image.width > 64 || in tdfxfb_cursor()
1051 cursor->image.height > 64 || in tdfxfb_cursor()
1052 cursor->image.depth > 1) in tdfxfb_cursor()
1053 return -EINVAL; in tdfxfb_cursor()
1056 if (cursor->enable) in tdfxfb_cursor()
1066 if (!cursor->set) in tdfxfb_cursor()
1069 /* fix cursor color - XFree86 forgets to restore it properly */ in tdfxfb_cursor()
1070 if (cursor->set & FB_CUR_SETCMAP) { in tdfxfb_cursor()
1071 struct fb_cmap cmap = info->cmap; in tdfxfb_cursor()
1072 u32 bg_idx = cursor->image.bg_color; in tdfxfb_cursor()
1073 u32 fg_idx = cursor->image.fg_color; in tdfxfb_cursor()
1087 if (cursor->set & FB_CUR_SETPOS) { in tdfxfb_cursor()
1088 int x = cursor->image.dx; in tdfxfb_cursor()
1089 int y = cursor->image.dy - info->var.yoffset; in tdfxfb_cursor()
1096 if (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) { in tdfxfb_cursor()
1115 u8 __iomem *cursorbase = info->screen_base + info->fix.smem_len; in tdfxfb_cursor()
1116 u8 *bitmap = (u8 *)cursor->image.data; in tdfxfb_cursor()
1117 u8 *mask = (u8 *)cursor->mask; in tdfxfb_cursor()
1122 for (i = 0; i < cursor->image.height; i++) { in tdfxfb_cursor()
1124 int j = (cursor->image.width + 7) >> 3; in tdfxfb_cursor()
1126 for (; j > 0; j--) { in tdfxfb_cursor()
1128 if (cursor->rop == ROP_COPY) in tdfxfb_cursor()
1171 struct tdfx_par *par = chan->par; in tdfxfb_i2c_setscl()
1186 struct tdfx_par *par = chan->par; in tdfxfb_i2c_setsda()
1199 We rely on the i2c-algo-bit routines to set the pins high before
1205 struct tdfx_par *par = chan->par; in tdfxfb_i2c_getscl()
1213 struct tdfx_par *par = chan->par; in tdfxfb_i2c_getsda()
1221 struct tdfx_par *par = chan->par; in tdfxfb_ddc_setscl()
1236 struct tdfx_par *par = chan->par; in tdfxfb_ddc_setsda()
1251 struct tdfx_par *par = chan->par; in tdfxfb_ddc_getscl()
1259 struct tdfx_par *par = chan->par; in tdfxfb_ddc_getsda()
1269 strlcpy(chan->adapter.name, name, sizeof(chan->adapter.name)); in tdfxfb_setup_ddc_bus()
1270 chan->adapter.owner = THIS_MODULE; in tdfxfb_setup_ddc_bus()
1271 chan->adapter.class = I2C_CLASS_DDC; in tdfxfb_setup_ddc_bus()
1272 chan->adapter.algo_data = &chan->algo; in tdfxfb_setup_ddc_bus()
1273 chan->adapter.dev.parent = dev; in tdfxfb_setup_ddc_bus()
1274 chan->algo.setsda = tdfxfb_ddc_setsda; in tdfxfb_setup_ddc_bus()
1275 chan->algo.setscl = tdfxfb_ddc_setscl; in tdfxfb_setup_ddc_bus()
1276 chan->algo.getsda = tdfxfb_ddc_getsda; in tdfxfb_setup_ddc_bus()
1277 chan->algo.getscl = tdfxfb_ddc_getscl; in tdfxfb_setup_ddc_bus()
1278 chan->algo.udelay = 10; in tdfxfb_setup_ddc_bus()
1279 chan->algo.timeout = msecs_to_jiffies(500); in tdfxfb_setup_ddc_bus()
1280 chan->algo.data = chan; in tdfxfb_setup_ddc_bus()
1282 i2c_set_adapdata(&chan->adapter, chan); in tdfxfb_setup_ddc_bus()
1284 rc = i2c_bit_add_bus(&chan->adapter); in tdfxfb_setup_ddc_bus()
1288 chan->par = NULL; in tdfxfb_setup_ddc_bus()
1298 strlcpy(chan->adapter.name, name, sizeof(chan->adapter.name)); in tdfxfb_setup_i2c_bus()
1299 chan->adapter.owner = THIS_MODULE; in tdfxfb_setup_i2c_bus()
1300 chan->adapter.algo_data = &chan->algo; in tdfxfb_setup_i2c_bus()
1301 chan->adapter.dev.parent = dev; in tdfxfb_setup_i2c_bus()
1302 chan->algo.setsda = tdfxfb_i2c_setsda; in tdfxfb_setup_i2c_bus()
1303 chan->algo.setscl = tdfxfb_i2c_setscl; in tdfxfb_setup_i2c_bus()
1304 chan->algo.getsda = tdfxfb_i2c_getsda; in tdfxfb_setup_i2c_bus()
1305 chan->algo.getscl = tdfxfb_i2c_getscl; in tdfxfb_setup_i2c_bus()
1306 chan->algo.udelay = 10; in tdfxfb_setup_i2c_bus()
1307 chan->algo.timeout = msecs_to_jiffies(500); in tdfxfb_setup_i2c_bus()
1308 chan->algo.data = chan; in tdfxfb_setup_i2c_bus()
1310 i2c_set_adapdata(&chan->adapter, chan); in tdfxfb_setup_i2c_bus()
1312 rc = i2c_bit_add_bus(&chan->adapter); in tdfxfb_setup_i2c_bus()
1316 chan->par = NULL; in tdfxfb_setup_i2c_bus()
1323 struct tdfx_par *par = info->par; in tdfxfb_create_i2c_busses()
1328 par->chan[0].par = par; in tdfxfb_create_i2c_busses()
1329 par->chan[1].par = par; in tdfxfb_create_i2c_busses()
1331 tdfxfb_setup_ddc_bus(&par->chan[0], "Voodoo3-DDC", info->dev); in tdfxfb_create_i2c_busses()
1332 tdfxfb_setup_i2c_bus(&par->chan[1], "Voodoo3-I2C", info->dev); in tdfxfb_create_i2c_busses()
1337 if (par->chan[0].par) in tdfxfb_delete_i2c_busses()
1338 i2c_del_adapter(&par->chan[0].adapter); in tdfxfb_delete_i2c_busses()
1339 par->chan[0].par = NULL; in tdfxfb_delete_i2c_busses()
1341 if (par->chan[1].par) in tdfxfb_delete_i2c_busses()
1342 i2c_del_adapter(&par->chan[1].adapter); in tdfxfb_delete_i2c_busses()
1343 par->chan[1].par = NULL; in tdfxfb_delete_i2c_busses()
1352 if (par->chan[0].par) in tdfxfb_probe_i2c_connector()
1353 edid = fb_ddc_read(&par->chan[0].adapter); in tdfxfb_probe_i2c_connector()
1365 * tdfxfb_probe - Device Initializiation
1387 info = framebuffer_alloc(sizeof(struct tdfx_par), &pdev->dev); in tdfxfb_probe()
1390 return -ENOMEM; in tdfxfb_probe()
1392 default_par = info->par; in tdfxfb_probe()
1393 info->fix = tdfx_fix; in tdfxfb_probe()
1396 switch (pdev->device) { in tdfxfb_probe()
1398 strcpy(info->fix.id, "3Dfx Banshee"); in tdfxfb_probe()
1399 default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK; in tdfxfb_probe()
1402 strcpy(info->fix.id, "3Dfx Voodoo3"); in tdfxfb_probe()
1403 default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK; in tdfxfb_probe()
1406 strcpy(info->fix.id, "3Dfx Voodoo5"); in tdfxfb_probe()
1407 default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK; in tdfxfb_probe()
1411 info->fix.mmio_start = pci_resource_start(pdev, 0); in tdfxfb_probe()
1412 info->fix.mmio_len = pci_resource_len(pdev, 0); in tdfxfb_probe()
1413 if (!request_mem_region(info->fix.mmio_start, info->fix.mmio_len, in tdfxfb_probe()
1419 default_par->regbase_virt = in tdfxfb_probe()
1420 ioremap(info->fix.mmio_start, info->fix.mmio_len); in tdfxfb_probe()
1421 if (!default_par->regbase_virt) { in tdfxfb_probe()
1423 info->fix.id); in tdfxfb_probe()
1427 info->fix.smem_start = pci_resource_start(pdev, 1); in tdfxfb_probe()
1428 info->fix.smem_len = do_lfb_size(default_par, pdev->device); in tdfxfb_probe()
1429 if (!info->fix.smem_len) { in tdfxfb_probe()
1430 printk(KERN_ERR "fb: Can't count %s memory.\n", info->fix.id); in tdfxfb_probe()
1434 if (!request_mem_region(info->fix.smem_start, in tdfxfb_probe()
1440 info->screen_base = ioremap_wc(info->fix.smem_start, in tdfxfb_probe()
1441 info->fix.smem_len); in tdfxfb_probe()
1442 if (!info->screen_base) { in tdfxfb_probe()
1444 info->fix.id); in tdfxfb_probe()
1448 default_par->iobase = pci_resource_start(pdev, 2); in tdfxfb_probe()
1456 printk(KERN_INFO "fb: %s memory = %dK\n", info->fix.id, in tdfxfb_probe()
1457 info->fix.smem_len >> 10); in tdfxfb_probe()
1460 default_par->wc_cookie= arch_phys_wc_add(info->fix.smem_start, in tdfxfb_probe()
1461 info->fix.smem_len); in tdfxfb_probe()
1463 info->fix.ypanstep = nopan ? 0 : 1; in tdfxfb_probe()
1464 info->fix.ywrapstep = nowrap ? 0 : 1; in tdfxfb_probe()
1466 info->fbops = &tdfxfb_ops; in tdfxfb_probe()
1467 info->pseudo_palette = default_par->palette; in tdfxfb_probe()
1468 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; in tdfxfb_probe()
1470 info->flags |= FBINFO_HWACCEL_FILLRECT | in tdfxfb_probe()
1478 info->fix.smem_len = (info->fix.smem_len - 1024) & in tdfxfb_probe()
1480 specs = &info->monspecs; in tdfxfb_probe()
1482 info->var.bits_per_pixel = 8; in tdfxfb_probe()
1488 if (specs->modedb == NULL) in tdfxfb_probe()
1493 fb_videomode_to_modelist(specs->modedb, in tdfxfb_probe()
1494 specs->modedb_len, in tdfxfb_probe()
1495 &info->modelist); in tdfxfb_probe()
1496 m = fb_find_best_display(specs, &info->modelist); in tdfxfb_probe()
1498 fb_videomode_to_var(&info->var, m); in tdfxfb_probe()
1499 /* fill all other info->var's fields */ in tdfxfb_probe()
1500 if (tdfxfb_check_var(&info->var, info) < 0) in tdfxfb_probe()
1501 info->var = tdfx_var; in tdfxfb_probe()
1512 err = fb_find_mode(&info->var, info, mode_option, in tdfxfb_probe()
1513 specs->modedb, specs->modedb_len, in tdfxfb_probe()
1514 NULL, info->var.bits_per_pixel); in tdfxfb_probe()
1516 info->var = tdfx_var; in tdfxfb_probe()
1520 fb_destroy_modedb(specs->modedb); in tdfxfb_probe()
1521 specs->modedb = NULL; in tdfxfb_probe()
1525 lpitch = info->var.xres_virtual * ((info->var.bits_per_pixel + 7) >> 3); in tdfxfb_probe()
1526 info->var.yres_virtual = info->fix.smem_len / lpitch; in tdfxfb_probe()
1527 if (info->var.yres_virtual < info->var.yres) in tdfxfb_probe()
1530 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) { in tdfxfb_probe()
1537 fb_dealloc_cmap(&info->cmap); in tdfxfb_probe()
1550 arch_phys_wc_del(default_par->wc_cookie); in tdfxfb_probe()
1554 if (info->screen_base) in tdfxfb_probe()
1555 iounmap(info->screen_base); in tdfxfb_probe()
1556 release_mem_region(info->fix.smem_start, pci_resource_len(pdev, 1)); in tdfxfb_probe()
1561 if (default_par->regbase_virt) in tdfxfb_probe()
1562 iounmap(default_par->regbase_virt); in tdfxfb_probe()
1563 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); in tdfxfb_probe()
1566 return -ENXIO; in tdfxfb_probe()
1596 * tdfxfb_remove - Device removal
1607 struct tdfx_par *par = info->par; in tdfxfb_remove()
1613 arch_phys_wc_del(par->wc_cookie); in tdfxfb_remove()
1614 iounmap(par->regbase_virt); in tdfxfb_remove()
1615 iounmap(info->screen_base); in tdfxfb_remove()
1624 fb_dealloc_cmap(&info->cmap); in tdfxfb_remove()
1634 return -ENODEV; in tdfxfb_init()
1654 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");