Lines Matching refs:ufx_reg_write

167 static int ufx_reg_write(struct ufx_data *dev, u32 index, u32 data)  in ufx_reg_write()  function
205 status = ufx_reg_write(dev, index, data); in ufx_reg_clear_and_set_bits()
227 status = ufx_reg_write(dev, 0x3008, 0x00000001); in ufx_lite_reset()
254 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_blank()
291 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_unblank()
328 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_disable()
365 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_enable()
386 int status = ufx_reg_write(dev, 0x700C, 0x8000000F); in ufx_config_sys_clk()
389 status = ufx_reg_write(dev, 0x7014, 0x0010024F); in ufx_config_sys_clk()
392 status = ufx_reg_write(dev, 0x7010, 0x00000000); in ufx_config_sys_clk()
410 status = ufx_reg_write(dev, 0x0004, 0x001F0F77); in ufx_config_ddr2()
413 status = ufx_reg_write(dev, 0x0008, 0xFFF00000); in ufx_config_ddr2()
416 status = ufx_reg_write(dev, 0x000C, 0x0FFF2222); in ufx_config_ddr2()
419 status = ufx_reg_write(dev, 0x0010, 0x00030814); in ufx_config_ddr2()
422 status = ufx_reg_write(dev, 0x0014, 0x00500019); in ufx_config_ddr2()
425 status = ufx_reg_write(dev, 0x0018, 0x020D0F15); in ufx_config_ddr2()
428 status = ufx_reg_write(dev, 0x001C, 0x02532305); in ufx_config_ddr2()
431 status = ufx_reg_write(dev, 0x0020, 0x0B030905); in ufx_config_ddr2()
434 status = ufx_reg_write(dev, 0x0024, 0x00000827); in ufx_config_ddr2()
437 status = ufx_reg_write(dev, 0x0028, 0x00000000); in ufx_config_ddr2()
440 status = ufx_reg_write(dev, 0x002C, 0x00000042); in ufx_config_ddr2()
443 status = ufx_reg_write(dev, 0x0030, 0x09520000); in ufx_config_ddr2()
446 status = ufx_reg_write(dev, 0x0034, 0x02223314); in ufx_config_ddr2()
449 status = ufx_reg_write(dev, 0x0038, 0x00430043); in ufx_config_ddr2()
452 status = ufx_reg_write(dev, 0x003C, 0xF00F000F); in ufx_config_ddr2()
455 status = ufx_reg_write(dev, 0x0040, 0xF380F00F); in ufx_config_ddr2()
458 status = ufx_reg_write(dev, 0x0044, 0xF00F0496); in ufx_config_ddr2()
461 status = ufx_reg_write(dev, 0x0048, 0x03080406); in ufx_config_ddr2()
464 status = ufx_reg_write(dev, 0x004C, 0x00001000); in ufx_config_ddr2()
467 status = ufx_reg_write(dev, 0x005C, 0x00000007); in ufx_config_ddr2()
470 status = ufx_reg_write(dev, 0x0100, 0x54F00012); in ufx_config_ddr2()
473 status = ufx_reg_write(dev, 0x0104, 0x00004012); in ufx_config_ddr2()
476 status = ufx_reg_write(dev, 0x0118, 0x40404040); in ufx_config_ddr2()
479 status = ufx_reg_write(dev, 0x0000, 0x00000001); in ufx_config_ddr2()
629 status = ufx_reg_write(dev, 0x7000, 0x8000000F); in ufx_config_pix_clk()
634 status = ufx_reg_write(dev, 0x7008, value); in ufx_config_pix_clk()
639 status = ufx_reg_write(dev, 0x7004, value); in ufx_config_pix_clk()
664 int status = ufx_reg_write(dev, 0x8028, 0); in ufx_set_vid_mode()
667 status = ufx_reg_write(dev, 0x8024, 0); in ufx_set_vid_mode()
680 status = ufx_reg_write(dev, 0x2000, 0x00000104); in ufx_set_vid_mode()
692 status = ufx_reg_write(dev, 0x2008, temp); in ufx_set_vid_mode()
696 status = ufx_reg_write(dev, 0x200C, temp); in ufx_set_vid_mode()
700 status = ufx_reg_write(dev, 0x2010, temp); in ufx_set_vid_mode()
712 status = ufx_reg_write(dev, 0x2014, temp); in ufx_set_vid_mode()
716 status = ufx_reg_write(dev, 0x2018, temp); in ufx_set_vid_mode()
720 status = ufx_reg_write(dev, 0x201C, temp); in ufx_set_vid_mode()
723 status = ufx_reg_write(dev, 0x2020, 0x00000000); in ufx_set_vid_mode()
726 status = ufx_reg_write(dev, 0x2024, 0x00000000); in ufx_set_vid_mode()
732 status = ufx_reg_write(dev, 0x2028, temp); in ufx_set_vid_mode()
736 status = ufx_reg_write(dev, 0x2040, 0); in ufx_set_vid_mode()
739 status = ufx_reg_write(dev, 0x2044, 0); in ufx_set_vid_mode()
742 status = ufx_reg_write(dev, 0x2048, 0); in ufx_set_vid_mode()
753 status = ufx_reg_write(dev, 0x2040, temp); in ufx_set_vid_mode()
765 status = ufx_reg_write(dev, 0x8028, 0x00000003); in ufx_set_vid_mode()
769 status = ufx_reg_write(dev, 0x8024, 0x00000007); in ufx_set_vid_mode()
1329 int status = ufx_reg_write(dev, 0x106C, 0x00); in ufx_i2c_init()
1334 status = ufx_reg_write(dev, 0x1018, 12); in ufx_i2c_init()
1338 status = ufx_reg_write(dev, 0x1014, 6); in ufx_i2c_init()
1354 status = ufx_reg_write(dev, 0x1000, tmp); in ufx_i2c_init()
1362 status = ufx_reg_write(dev, 0x106C, 0x01); in ufx_i2c_init()
1371 int status = ufx_reg_write(dev, 0x106C, 0x00); in ufx_i2c_configure()
1374 status = ufx_reg_write(dev, 0x3010, 0x00000000); in ufx_i2c_configure()
1381 status = ufx_reg_write(dev, 0x106C, 0x01); in ufx_i2c_configure()
1414 status = ufx_reg_write(dev, 0x1100, 0x40000000); in ufx_i2c_wait_busy()
1439 status = ufx_reg_write(dev, 0x1100, temp); in ufx_read_edid()
1443 status = ufx_reg_write(dev, 0x1100, temp); in ufx_read_edid()