239 	u32 dc_ctrl, dc_sts;  in ufx_blank()  local
245 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_blank()
249 	if ((dc_sts & 0x00000100) || (dc_ctrl & 0x00000100))  in ufx_blank()
253 	dc_ctrl |= 0x00000100;  in ufx_blank()
254 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_blank()
276 	u32 dc_ctrl, dc_sts;  in ufx_unblank()  local
282 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_unblank()
286 	if (((dc_sts & 0x00000100) == 0) || ((dc_ctrl & 0x00000100) == 0))  in ufx_unblank()
290 	dc_ctrl &= ~0x00000100;  in ufx_unblank()
291 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_unblank()
313 	u32 dc_ctrl, dc_sts;  in ufx_disable()  local
319 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_disable()
323 	if (((dc_sts & 0x00000001) == 0) || ((dc_ctrl & 0x00000001) == 0))  in ufx_disable()
327 	dc_ctrl &= ~(0x00000001);  in ufx_disable()
328 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_disable()
350 	u32 dc_ctrl, dc_sts;  in ufx_enable()  local
356 	status = ufx_reg_read(dev, 0x2000, &dc_ctrl);  in ufx_enable()
360 	if ((dc_sts & 0x00000001) || (dc_ctrl & 0x00000001))  in ufx_enable()
364 	dc_ctrl |= 0x00000001;  in ufx_enable()
365 	status = ufx_reg_write(dev, 0x2000, dc_ctrl);  in ufx_enable()