618     nv3_sim_state sim_data;  in nv3UpdateArbitrationSettings()  local
624     sim_data.pix_bpp        = (char)pixelDepth;  in nv3UpdateArbitrationSettings()
625     sim_data.enable_video   = 0;  in nv3UpdateArbitrationSettings()
626     sim_data.enable_mp      = 0;  in nv3UpdateArbitrationSettings()
627     sim_data.video_scale    = 1;  in nv3UpdateArbitrationSettings()
628     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv3UpdateArbitrationSettings()
630     sim_data.memory_width   = 128;  in nv3UpdateArbitrationSettings()
632     sim_data.mem_latency    = 9;  in nv3UpdateArbitrationSettings()
633     sim_data.mem_aligned    = 1;  in nv3UpdateArbitrationSettings()
634     sim_data.mem_page_miss  = 11;  in nv3UpdateArbitrationSettings()
635     sim_data.gr_during_vid  = 0;  in nv3UpdateArbitrationSettings()
636     sim_data.pclk_khz       = VClk;  in nv3UpdateArbitrationSettings()
637     sim_data.mclk_khz       = MClk;  in nv3UpdateArbitrationSettings()
638     nv3CalcArbitration(&fifo_data, &sim_data);  in nv3UpdateArbitrationSettings()
807     nv4_sim_state sim_data;  in nv4UpdateArbitrationSettings()  local
817     sim_data.pix_bpp        = (char)pixelDepth;  in nv4UpdateArbitrationSettings()
818     sim_data.enable_video   = 0;  in nv4UpdateArbitrationSettings()
819     sim_data.enable_mp      = 0;  in nv4UpdateArbitrationSettings()
820     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv4UpdateArbitrationSettings()
822     sim_data.mem_latency    = (char)cfg1 & 0x0F;  in nv4UpdateArbitrationSettings()
823     sim_data.mem_aligned    = 1;  in nv4UpdateArbitrationSettings()
824     sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));  in nv4UpdateArbitrationSettings()
825     sim_data.gr_during_vid  = 0;  in nv4UpdateArbitrationSettings()
826     sim_data.pclk_khz       = VClk;  in nv4UpdateArbitrationSettings()
827     sim_data.mclk_khz       = MClk;  in nv4UpdateArbitrationSettings()
828     sim_data.nvclk_khz      = NVClk;  in nv4UpdateArbitrationSettings()
829     nv4CalcArbitration(&fifo_data, &sim_data);  in nv4UpdateArbitrationSettings()
1070     nv10_sim_state sim_data;  in nv10UpdateArbitrationSettings()  local
1080     sim_data.pix_bpp        = (char)pixelDepth;  in nv10UpdateArbitrationSettings()
1081     sim_data.enable_video   = 0;  in nv10UpdateArbitrationSettings()
1082     sim_data.enable_mp      = 0;  in nv10UpdateArbitrationSettings()
1083     sim_data.memory_type    = (NV_RD32(&chip->PFB[0x00000200/4], 0) & 0x01) ?  in nv10UpdateArbitrationSettings()
1085     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv10UpdateArbitrationSettings()
1087     sim_data.mem_latency    = (char)cfg1 & 0x0F;  in nv10UpdateArbitrationSettings()
1088     sim_data.mem_aligned    = 1;  in nv10UpdateArbitrationSettings()
1089     sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));  in nv10UpdateArbitrationSettings()
1090     sim_data.gr_during_vid  = 0;  in nv10UpdateArbitrationSettings()
1091     sim_data.pclk_khz       = VClk;  in nv10UpdateArbitrationSettings()
1092     sim_data.mclk_khz       = MClk;  in nv10UpdateArbitrationSettings()
1093     sim_data.nvclk_khz      = NVClk;  in nv10UpdateArbitrationSettings()
1094     nv10CalcArbitration(&fifo_data, &sim_data);  in nv10UpdateArbitrationSettings()
1116     nv10_sim_state sim_data;  in nForceUpdateArbitrationSettings()  local
1133     sim_data.pix_bpp        = (char)pixelDepth;  in nForceUpdateArbitrationSettings()
1134     sim_data.enable_video   = 0;  in nForceUpdateArbitrationSettings()
1135     sim_data.enable_mp      = 0;  in nForceUpdateArbitrationSettings()
1138     pci_read_config_dword(dev, 0x7C, &sim_data.memory_type);  in nForceUpdateArbitrationSettings()
1140     sim_data.memory_type    = (sim_data.memory_type >> 12) & 1;  in nForceUpdateArbitrationSettings()
1142     sim_data.memory_width   = 64;  in nForceUpdateArbitrationSettings()
1143     sim_data.mem_latency    = 3;  in nForceUpdateArbitrationSettings()
1144     sim_data.mem_aligned    = 1;  in nForceUpdateArbitrationSettings()
1145     sim_data.mem_page_miss  = 10;  in nForceUpdateArbitrationSettings()
1146     sim_data.gr_during_vid  = 0;  in nForceUpdateArbitrationSettings()
1147     sim_data.pclk_khz       = VClk;  in nForceUpdateArbitrationSettings()
1148     sim_data.mclk_khz       = MClk;  in nForceUpdateArbitrationSettings()
1149     sim_data.nvclk_khz      = NVClk;  in nForceUpdateArbitrationSettings()
1150     nv10CalcArbitration(&fifo_data, &sim_data);  in nForceUpdateArbitrationSettings()