193   int memory_width;  member
214   int memory_width;  member
235   int memory_width;  member
273             ns = 1000000 * ainfo->vburst_size/(state->memory_width/8)/state->mclk_khz;  in nv3_iterate()
285             ns = 1000000 * (ainfo->gburst_size/(state->memory_width/8))/state->mclk_khz;  in nv3_iterate()
344 … = 1000000*(misses*state->mem_page_miss + ainfo->vburst_size)/(state->memory_width/8)/state->mclk_…  in nv3_iterate()
360 …ns = 1000000*(misses*state->mem_page_miss + ainfo->gburst_size/(state->memory_width/8))/state->mcl…  in nv3_iterate()
370 …  ns = 1000000*(misses*state->mem_page_miss + mburst_size/(state->memory_width/8))/state->mclk_khz;  in nv3_iterate()
381         ns = 1000000*ainfo->gburst_size/(state->memory_width/8)/state->mclk_khz;  in nv3_iterate()
388         ns = 1000000*ainfo->vburst_size/(state->memory_width/8)/state->mclk_khz;  in nv3_iterate()
438     eburst_size = state->memory_width * 1;  in nv3_arb()
451 …ens =  1000000*(state->mem_page_miss + eburst_size/(state->memory_width/8) +refresh_cycle)/state->…  in nv3_arb()
463 …mns = 1000000 * (mmisses*state->mem_page_miss + mburst_size/(state->memory_width/8) + refresh_cycl…  in nv3_arb()
478 …gns = 1000000*(gmisses*state->mem_page_miss + ainfo->gburst_size/(state->memory_width/8) + refresh…  in nv3_arb()
490 …vns = 1000000*(vmisses*state->mem_page_miss + ainfo->vburst_size/(state->memory_width/8) + refresh…  in nv3_arb()
628     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv3UpdateArbitrationSettings()
630     sim_data.memory_width   = 128;  in nv3UpdateArbitrationSettings()
673     width = arb->memory_width >> 6;  in nv4CalcArbitration()
820     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv4UpdateArbitrationSettings()
864     width = arb->memory_width/64;  in nv10CalcArbitration()
892       if (arb->memory_width == 64) /* 64 bit bus */  in nv10CalcArbitration()
897       if (arb->memory_width == 64) /* 64 bit bus */  in nv10CalcArbitration()
902     if ((!video_enable) && (arb->memory_width == 128))  in nv10CalcArbitration()
1085     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv10UpdateArbitrationSettings()
1142     sim_data.memory_width   = 64;  in nForceUpdateArbitrationSettings()