333 	state->crtc[0x3] = SetBitField(h_blank_e, 4: 0, 4:0)  in nvidia_calc_regs()
336 	state->crtc[0x5] = SetBitField(h_blank_e, 5: 5, 7:7)  in nvidia_calc_regs()
337 		| SetBitField(h_end, 4: 0, 4:0);  in nvidia_calc_regs()
338 	state->crtc[0x6] = SetBitField(v_total, 7: 0, 7:0);  in nvidia_calc_regs()
339 	state->crtc[0x7] = SetBitField(v_total, 8: 8, 0:0)  in nvidia_calc_regs()
340 		| SetBitField(v_display, 8: 8, 1:1)  in nvidia_calc_regs()
341 		| SetBitField(v_start, 8: 8, 2:2)  in nvidia_calc_regs()
342 		| SetBitField(v_blank_s, 8: 8, 3:3)  in nvidia_calc_regs()
344 		| SetBitField(v_total, 9: 9, 5:5)  in nvidia_calc_regs()
345 		| SetBitField(v_display, 9: 9, 6:6)  in nvidia_calc_regs()
346 		| SetBitField(v_start, 9: 9, 7:7);  in nvidia_calc_regs()
347 	state->crtc[0x9] = SetBitField(v_blank_s, 9: 9, 5:5)  in nvidia_calc_regs()
351 	state->crtc[0x11] = SetBitField(v_end, 3: 0, 3:0) | SetBit(5);  in nvidia_calc_regs()
363 	state->screen = SetBitField(h_blank_e, 6: 6, 4:4)  in nvidia_calc_regs()
364 		| SetBitField(v_blank_s, 10: 10, 3:3)  in nvidia_calc_regs()
365 		| SetBitField(v_start, 10: 10, 2:2)  in nvidia_calc_regs()
366 		| SetBitField(v_display, 10: 10, 1:1)  in nvidia_calc_regs()
367 		| SetBitField(v_total, 10: 10, 0:0);  in nvidia_calc_regs()
369 	state->horiz = SetBitField(h_total, 8: 8, 0:0)  in nvidia_calc_regs()
370 		| SetBitField(h_display, 8: 8, 1:1)  in nvidia_calc_regs()
371 		| SetBitField(h_blank_s, 8: 8, 2:2)  in nvidia_calc_regs()
372 		| SetBitField(h_start, 8: 8, 3:3);  in nvidia_calc_regs()
374 	state->extra = SetBitField(v_total, 11: 11, 0:0)  in nvidia_calc_regs()
375 		| SetBitField(v_display, 11: 11, 2:2)  in nvidia_calc_regs()
376 		| SetBitField(v_start, 11: 11, 4:4)  in nvidia_calc_regs()
377 		| SetBitField(v_blank_s, 11: 11, 6:6);  in nvidia_calc_regs()
382 		state->horiz |= SetBitField(h_total, 8: 8, 4:4);  in nvidia_calc_regs()