Lines Matching refs:outreg
98 outreg(disp, GC_L0PAL0 + (regno * 4), val); in mb862xxfb_setcolreg()
217 outreg(disp, GC_DCM1, reg); in mb862xxfb_set_par()
224 outreg(disp, GC_DCM1, reg); in mb862xxfb_set_par()
232 outreg(disp, GC_L0M, reg); in mb862xxfb_set_par()
236 outreg(disp, GC_L0EM, reg | GC_L0EM_L0EC_24); in mb862xxfb_set_par()
238 outreg(disp, GC_WY_WX, 0); in mb862xxfb_set_par()
240 outreg(disp, GC_WH_WW, reg); in mb862xxfb_set_par()
241 outreg(disp, GC_L0OA0, 0); in mb862xxfb_set_par()
242 outreg(disp, GC_L0DA0, 0); in mb862xxfb_set_par()
243 outreg(disp, GC_L0DY_L0DX, 0); in mb862xxfb_set_par()
244 outreg(disp, GC_L0WY_L0WX, 0); in mb862xxfb_set_par()
245 outreg(disp, GC_L0WH_L0WW, reg); in mb862xxfb_set_par()
250 outreg(disp, GC_CPM_CUTC, reg); in mb862xxfb_set_par()
254 outreg(disp, GC_HDB_HDP, reg); in mb862xxfb_set_par()
256 outreg(disp, GC_VDP_VSP, reg); in mb862xxfb_set_par()
259 outreg(disp, GC_VSW_HSW_HSP, reg); in mb862xxfb_set_par()
260 outreg(disp, GC_HTP, pack(h_total(&fbi->var) - 1, 0)); in mb862xxfb_set_par()
261 outreg(disp, GC_VTR, pack(v_total(&fbi->var) - 1, 0)); in mb862xxfb_set_par()
267 outreg(disp, GC_DCM1, reg); in mb862xxfb_set_par()
278 outreg(disp, GC_L0WY_L0WX, reg); in mb862xxfb_pan()
281 outreg(disp, GC_L0WH_L0WW, reg); in mb862xxfb_pan()
296 outreg(disp, GC_DCM1, reg); in mb862xxfb_blank()
301 outreg(disp, GC_DCM1, reg); in mb862xxfb_blank()
333 outreg(cap, GC_CAP_CSC, in mb862xxfb_ioctl()
341 outreg(cap, GC_CAP_CSC, in mb862xxfb_ioctl()
344 outreg(cap, GC_CAP_CMSS, in mb862xxfb_ioctl()
346 outreg(cap, GC_CAP_CMDS, in mb862xxfb_ioctl()
353 outreg(cap, GC_CAP_CBM, in mb862xxfb_ioctl()
357 outreg(cap, GC_CAP_CBM, in mb862xxfb_ioctl()
361 outreg(disp, GC_L1EM, l1em); in mb862xxfb_ioctl()
366 outreg(disp, GC_L1DA, par->cap_buf); in mb862xxfb_ioctl()
367 outreg(cap, GC_CAP_IMG_START, in mb862xxfb_ioctl()
369 outreg(cap, GC_CAP_IMG_END, in mb862xxfb_ioctl()
371 outreg(disp, GC_L1M, GC_L1M_16 | GC_L1M_YC | GC_L1M_CS | in mb862xxfb_ioctl()
373 outreg(disp, GC_L1WY_L1WX, in mb862xxfb_ioctl()
375 outreg(disp, GC_L1WH_L1WW, in mb862xxfb_ioctl()
377 outreg(disp, GC_DLS, 1); in mb862xxfb_ioctl()
378 outreg(cap, GC_CAP_VCM, in mb862xxfb_ioctl()
380 outreg(disp, GC_DCM1, inreg(disp, GC_DCM1) | in mb862xxfb_ioctl()
383 outreg(cap, GC_CAP_VCM, in mb862xxfb_ioctl()
385 outreg(disp, GC_DCM1, in mb862xxfb_ioctl()
392 outreg(cap, GC_CAP_VCM, in mb862xxfb_ioctl()
395 outreg(cap, GC_CAP_VCM, in mb862xxfb_ioctl()
535 outreg(cap, GC_CAP_CBM, GC_CBM_OO | GC_CBM_CBST | in mb862xxfb_init_fbinfo()
537 outreg(cap, GC_CAP_CBOA, par->cap_buf); in mb862xxfb_init_fbinfo()
538 outreg(cap, GC_CAP_CBLA, par->cap_buf + par->cap_len); in mb862xxfb_init_fbinfo()
602 outreg(ctrl, 0x0, reg_ist); in mb862xx_intr()
613 outreg(host, GC_IST, ~reg_ist); in mb862xx_intr()
657 outreg(host, GC_CCF, ccf); in mb862xx_gdc_init()
659 outreg(host, GC_MMR, mmr); in mb862xx_gdc_init()
664 outreg(host, GC_IST, 0); in mb862xx_gdc_init()
665 outreg(host, GC_IMASK, GC_INT_EN); in mb862xx_gdc_init()
769 outreg(host, GC_IMASK, 0); in of_platform_mb862xx_probe()
796 outreg(disp, GC_DCM1, reg); in of_platform_mb862xx_remove()
799 outreg(host, GC_IMASK, 0); in of_platform_mb862xx_remove()
877 outreg(host, GC_CCF, GC_CCF_CGE_166 | GC_CCF_COT_133); in coralp_init()
879 outreg(host, GC_MMR, GC_MMR_CORALP_EVB_VAL); in coralp_init()
883 outreg(host, GC_IST, 0); in coralp_init()
900 outreg(dram_ctrl, GC_DCTL_IOCONT1_IOCONT0, GC_EVB_DCTL_IOCONT1_IOCONT0); in init_dram_ctrl()
903 outreg(dram_ctrl, GC_DCTL_MODE_ADD, GC_EVB_DCTL_MODE_ADD); in init_dram_ctrl()
904 outreg(dram_ctrl, GC_DCTL_SETTIME1_EMODE, GC_EVB_DCTL_SETTIME1_EMODE); in init_dram_ctrl()
905 outreg(dram_ctrl, GC_DCTL_REFRESH_SETTIME2, in init_dram_ctrl()
907 outreg(dram_ctrl, GC_DCTL_RSV2_RSV1, GC_EVB_DCTL_RSV2_RSV1); in init_dram_ctrl()
908 outreg(dram_ctrl, GC_DCTL_DDRIF2_DDRIF1, GC_EVB_DCTL_DDRIF2_DDRIF1); in init_dram_ctrl()
909 outreg(dram_ctrl, GC_DCTL_RSV0_STATES, GC_EVB_DCTL_RSV0_STATES); in init_dram_ctrl()
919 outreg(dram_ctrl, GC_DCTL_MODE_ADD, GC_EVB_DCTL_MODE_ADD_AFT_RST); in init_dram_ctrl()
920 outreg(dram_ctrl, GC_DCTL_RSV0_STATES, GC_EVB_DCTL_RSV0_STATES_AFT_RST); in init_dram_ctrl()
942 outreg(ctrl, GC_CTRL_CLK_ENABLE, reg); in carmine_init()
952 outreg(ctrl, GC_CTRL_CLK_ENABLE, reg); in carmine_init()
958 outreg(ctrl, GC_CTRL_INT_MASK, 0); in carmine_init()
962 outreg(ctrl, GC_CTRL_CLK_ENABLE, 0); in carmine_init()
1105 outreg(ctrl, GC_CTRL_INT_MASK, GC_CARMINE_INT_EN); in mb862xx_pci_probe()
1107 outreg(host, GC_IMASK, GC_INT_EN); in mb862xx_pci_probe()
1140 outreg(disp, GC_DCM1, reg); in mb862xx_pci_remove()
1143 outreg(ctrl, GC_CTRL_INT_MASK, 0); in mb862xx_pci_remove()
1144 outreg(ctrl, GC_CTRL_CLK_ENABLE, 0); in mb862xx_pci_remove()
1146 outreg(host, GC_IMASK, 0); in mb862xx_pci_remove()