3  * Hardware accelerated Matrox PCI cards - G450/G550 PLL control.
5  * (c) 2001-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
35 	return (minfo->features.pll.ref_freq * n + (m >> 1)) / m;  in g450_mnp2vco()
45     		f2 = f1 - f2;  in pll_freq_delta()
47 		f2 = f2 - f1;  in pll_freq_delta()
72 					p--;  in g450_nextpll()
77 				if (tvco < pi->vcomin) {  in g450_nextpll()
97 			m--;  in g450_nextpll()
99 		n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2;  in g450_nextpll()
111 	vcomax = pi->vcomax;  in g450_firstpll()
125 			p--;  in g450_firstpll()
128 		if (tvco < pi->vcomin) {  in g450_firstpll()
129 			tvco = pi->vcomin;  in g450_firstpll()
238 			hw->DACclk[3] = mnp >> 16;  in updatehwstate_clk()
239 			hw->DACclk[4] = mnp >> 8;  in updatehwstate_clk()
240 			hw->DACclk[5] = mnp;  in updatehwstate_clk()
271 				*sptr++ = mnp - 8;  in g450_findworkingpll()
279 			unsigned int mnp = *sptr--;  in g450_findworkingpll()
281 			if (g450_testpll(minfo, mnp - 0x0300, pll) &&  in g450_findworkingpll()
283 			    g450_testpll(minfo, mnp - 0x0200, pll) &&  in g450_findworkingpll()
285 			    g450_testpll(minfo, mnp - 0x0100, pll) &&  in g450_findworkingpll()
301 	if (++ci->valid > ARRAY_SIZE(ci->data)) {  in g450_addcache()
302 		ci->valid = ARRAY_SIZE(ci->data);  in g450_addcache()
304 	memmove(ci->data + 1, ci->data, (ci->valid - 1) * sizeof(*ci->data));  in g450_addcache()
305 	ci->data[0].mnp_key = mnp_key & G450_MNP_FREQBITS;  in g450_addcache()
306 	ci->data[0].mnp_value = mnp_value;  in g450_addcache()
315 	for (i = 0; i < ci->valid; i++) {  in g450_checkcache()
316 		if (ci->data[i].mnp_key == mnp_key) {  in g450_checkcache()
319 			mnp = ci->data[i].mnp_value;  in g450_checkcache()
321 				memmove(ci->data + 1, ci->data, i * sizeof(*ci->data));  in g450_checkcache()
322 				ci->data[0].mnp_key = mnp_key;  in g450_checkcache()
323 				ci->data[0].mnp_value = mnp;  in g450_checkcache()
359 				/* DVI PLL preferred for frequencies up to  in __g450_setclk()
360 				   panel link max, standard PLL otherwise */  in __g450_setclk()
361 				if (fout >= minfo->max_pixel_clock_panellink)  in __g450_setclk()
392 			pi = &minfo->limits.pixel;  in __g450_setclk()
393 			ci = &minfo->cache.pixel;  in __g450_setclk()
399 				pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &opt);  in __g450_setclk()
401 					pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, opt | 0x20);  in __g450_setclk()
404 			pi = &minfo->limits.system;  in __g450_setclk()
405 			ci = &minfo->cache.system;  in __g450_setclk()
423 			pi = &minfo->limits.video;  in __g450_setclk()
424 			ci = &minfo->cache.video;  in __g450_setclk()
427 			return -EINVAL;  in __g450_setclk()
442 			for (idx = mnpcount; idx > 0; idx--) {  in __g450_setclk()
444 				   sorted equally good frequencies from lower VCO   in __g450_setclk()
445 				   frequency to higher - with <= lowest wins, while  in __g450_setclk()
447 				if (delta <= deltaarray[idx-1]) {  in __g450_setclk()
452 					if (delta == deltaarray[idx-1]  in __g450_setclk()
453 					    && vco != g450_mnp2vco(minfo, mnparray[idx-1])  in __g450_setclk()
454 					    && vco < (pi->vcomin * 17 / 16)) {  in __g450_setclk()
457 					mnparray[idx] = mnparray[idx-1];  in __g450_setclk()
458 					deltaarray[idx] = deltaarray[idx-1];  in __g450_setclk()
470 		return -EBUSY;  in __g450_setclk()
484 		updatehwstate_clk(&minfo->hw, mnp, pll);  in __g450_setclk()
507 	return -ENOMEM;  in matroxfb_g450_setclk()
514 MODULE_AUTHOR("(c) 2001-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");