38 #define DAC_BASE 0x50f24000
41 #define DAFB_BASE 0xf9800200
44 #define CIVIC_BASE 0x50f30800
47 #define GSC_BASE 0x50F20000
50 #define CSC_BASE 0x50F20000
77 	unsigned char addr;	/* OFFSET: 0x00 */
79 	unsigned char lut;	/* OFFSET: 0x10 */
81 	unsigned char status;	/* OFFSET: 0x20 */
83 	unsigned long vbl_addr;	/* OFFSET: 0x28 */
84 	unsigned int  status2;	/* OFFSET: 0x2C */
88 	char pad1[0x40];
89 	unsigned char clut_waddr;	/* 0x40 */
91 	unsigned char clut_data;	/* 0x42 */
92 	char pad3[0x3];
93 	unsigned char clut_raddr;	/* 0x46 */
98 	char pad1[0x200200];
105 	char pad1[0x90018];
106 	unsigned char lut; /* TFBClutWDataReg, offset 0x90018 */
108 	unsigned char addr; /* TFBClutAddrReg, offset 0x9001C */
112 	char pad1[0xe0e000];
161 		nubus_writel(0, &dafb_cmap_regs->reset);  in dafb_setpalette()
165 		for (i = 0; i < regno; i++) {  in dafb_setpalette()
186 	return 0;  in dafb_setpalette()
202 	 * In 4bpp, the regnos are 0x0f, 0x1f, 0x2f, etc, etc  in v8_brazil_setpalette()
203 	 * In 2bpp, the regnos are 0x3f, 0x7f, 0xbf, 0xff  in v8_brazil_setpalette()
205 	regno = (regno << (8 - bpp)) | (0xFF >> bpp);  in v8_brazil_setpalette()
217 	return 0;  in v8_brazil_setpalette()
236 	nubus_writeb(0xFF, &rbv_cmap_regs->cntl);  in rbv_setpalette()
251 	return 0;  in rbv_setpalette()
274 	return 0;  in mdc_setpalette()
289 	regno = (regno << (8 - bpp)) | (0xFF >> bpp);  in toby_setpalette()
302 	return 0;  in toby_setpalette()
324 	return 0;  in jet_setpalette()
355 	if ((clut_status & 0x0008) == 0)  in civic_setpalette()
357 #if 0  in civic_setpalette()
358 		if ((clut_status & 0x000D) != 0)  in civic_setpalette()
360 			nubus_writeb(0x00, &civic_cmap_regs->lut);  in civic_setpalette()
362 			nubus_writeb(0x00, &civic_cmap_regs->lut);  in civic_setpalette()
373 		nubus_writeb(0x00, &civic_cmap_regs->lut);  in civic_setpalette()
388 		if ((clut_status & 0x000D) != 0)  in civic_setpalette()
390 			nubus_writeb(0x00, &civic_cmap_regs->lut);  in civic_setpalette()
392 			nubus_writeb(0x00, &civic_cmap_regs->lut);  in civic_setpalette()
406 	return 0;  in civic_setpalette()
429 	return 0;  in csc_setpalette()
467 					((red   & 0xf800) >>  1) |  in macfb_setcolreg()
468 					((green & 0xf800) >>  6) |  in macfb_setcolreg()
469 					((blue  & 0xf800) >> 11) |  in macfb_setcolreg()
470 					((transp != 0) << 15);  in macfb_setcolreg()
472 				/* 0:5:6:5 */  in macfb_setcolreg()
474 					((red   & 0xf800) >>  0) |  in macfb_setcolreg()
475 					((green & 0xfc00) >>  5) |  in macfb_setcolreg()
476 					((blue  & 0xf800) >> 11);  in macfb_setcolreg()
496 	return 0;  in macfb_setcolreg()
542 	int video_cmap_len, video_is_nubus = 0;  in macfb_init()
558 	macfb_defined.xres = mac_bi_data.dimensions & 0xFFFF;  in macfb_init()
578 	pr_info("macfb: framebuffer at 0x%08lx, mapped to 0x%p, size %dk\n",  in macfb_init()
594 	macfb_defined.left_margin  = (macfb_defined.xres / 8) & 0xf8;  in macfb_init()
595 	macfb_defined.hsync_len    = (macfb_defined.xres / 8) & 0xf8;  in macfb_init()
621 		macfb_defined.blue.offset = 0;  in macfb_init()
636 		macfb_defined.blue.offset = 0;  in macfb_init()
661 		    mac_bi_data.videoaddr - base > 0xFFFFFF)  in macfb_init()
714 			dafb_cmap_regs = ioremap(DAFB_BASE, 0x1000);  in macfb_init()
723 			v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);  in macfb_init()
736 			v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);  in macfb_init()
752 			v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);  in macfb_init()
764 			rbv_cmap_regs = ioremap(DAC_BASE, 0x1000);  in macfb_init()
774 			civic_cmap_regs = ioremap(CIVIC_BASE, 0x1000);  in macfb_init()
787 					ioremap(DAC_BASE, 0x1000);  in macfb_init()
799 					ioremap(DAC_BASE, 0x1000);  in macfb_init()
828 		 * Slot 0 ROM says TIM. No external video. B&W.  in macfb_init()
867 			csc_cmap_regs = ioremap(CSC_BASE, 0x1000);  in macfb_init()
881 	err = fb_alloc_cmap(&fb_info.cmap, video_cmap_len, 0);  in macfb_init()
891 	return 0;  in macfb_init()