136 static void lcdc_write(unsigned int val, unsigned int addr)  in lcdc_write()  function
261 		lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);  in lcd_enable_raster()
266 		lcdc_write(0, LCD_CLK_RESET_REG);  in lcd_enable_raster()
272 		lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);  in lcd_enable_raster()
283 		lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG);  in lcd_disable_raster()
325 			lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_blit()
329 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in lcd_blit()
330 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in lcd_blit()
331 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);  in lcd_blit()
332 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);  in lcd_blit()
344 			lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_blit()
347 		lcdc_write(start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in lcd_blit()
348 		lcdc_write(end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in lcd_blit()
351 	lcdc_write(reg_dma, LCD_DMA_CTRL_REG);  in lcd_blit()
352 	lcdc_write(reg_ras, LCD_RASTER_CTRL_REG);  in lcd_blit()
388 	lcdc_write(reg, LCD_DMA_CTRL_REG);  in lcd_cfg_dma()
401 	lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_ac_bias()
413 	lcdc_write(reg, LCD_RASTER_TIMING_0_REG);  in lcd_cfg_horizontal_sync()
427 		lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_horizontal_sync()
440 	lcdc_write(reg, LCD_RASTER_TIMING_1_REG);  in lcd_cfg_vertical_sync()
482 		lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);  in lcd_cfg_display()
485 	lcdc_write(reg, LCD_RASTER_CTRL_REG);  in lcd_cfg_display()
506 	lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_display()
543 	lcdc_write(reg, LCD_RASTER_TIMING_0_REG);  in lcd_cfg_frame_buffer()
549 	lcdc_write(reg, LCD_RASTER_TIMING_1_REG);  in lcd_cfg_frame_buffer()
555 		lcdc_write(reg, LCD_RASTER_TIMING_2_REG);  in lcd_cfg_frame_buffer()
586 	lcdc_write(reg, LCD_RASTER_CTRL_REG);  in lcd_cfg_frame_buffer()
685 	lcdc_write(0, LCD_DMA_CTRL_REG);  in da8xx_fb_lcd_reset()
686 	lcdc_write(0, LCD_RASTER_CTRL_REG);  in da8xx_fb_lcd_reset()
689 		lcdc_write(0, LCD_INT_ENABLE_SET_REG);  in da8xx_fb_lcd_reset()
691 		lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG);  in da8xx_fb_lcd_reset()
692 		lcdc_write(0, LCD_CLK_RESET_REG);  in da8xx_fb_lcd_reset()
714 	lcdc_write(LCD_CLK_DIVISOR(lcdc_clk_div) |  in da8xx_fb_config_clk_divider()
718 		lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |  in da8xx_fb_config_clk_divider()
781 		lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) |  in lcd_init()
784 		lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) &  in lcd_init()
814 	lcdc_write((lcdc_read(LCD_RASTER_CTRL_REG) & 0xfff00fff) |  in lcd_init()
828 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
839 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
842 		lcdc_write(LCD_V2_PL_INT_ENA, LCD_INT_ENABLE_CLR_REG);  in lcdc_irq_handler_rev02()
847 		lcdc_write(stat, LCD_MASKED_STAT_REG);  in lcdc_irq_handler_rev02()
851 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev02()
853 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev02()
861 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev02()
863 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev02()
878 	lcdc_write(0, LCD_END_OF_INT_IND_REG);  in lcdc_irq_handler_rev02()
891 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
902 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
907 		lcdc_write(reg_ras, LCD_RASTER_CTRL_REG);  in lcdc_irq_handler_rev01()
912 		lcdc_write(stat, LCD_STAT_REG);  in lcdc_irq_handler_rev01()
916 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev01()
918 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev01()
926 			lcdc_write(par->dma_start,  in lcdc_irq_handler_rev01()
928 			lcdc_write(par->dma_end,  in lcdc_irq_handler_rev01()
1083 	lcdc_write(0, LCD_RASTER_CTRL_REG);  in fb_remove()
1086 	lcdc_write(0, LCD_DMA_CTRL_REG);  in fb_remove()
1239 				lcdc_write(par->dma_start,  in da8xx_pan_display()
1241 				lcdc_write(par->dma_end,  in da8xx_pan_display()
1244 				lcdc_write(par->dma_start,  in da8xx_pan_display()
1246 				lcdc_write(par->dma_end,  in da8xx_pan_display()
1286 	lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG);  in da8xxfb_set_par()
1287 	lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG);  in da8xxfb_set_par()
1288 	lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG);  in da8xxfb_set_par()
1289 	lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG);  in da8xxfb_set_par()
1585 		lcdc_write(reg_context.clk_enable, LCD_CLK_ENABLE_REG);  in lcd_context_restore()
1586 		lcdc_write(reg_context.int_enable_set, LCD_INT_ENABLE_SET_REG);  in lcd_context_restore()
1589 	lcdc_write(reg_context.ctrl, LCD_CTRL_REG);  in lcd_context_restore()
1590 	lcdc_write(reg_context.dma_ctrl, LCD_DMA_CTRL_REG);  in lcd_context_restore()
1591 	lcdc_write(reg_context.raster_timing_0, LCD_RASTER_TIMING_0_REG);  in lcd_context_restore()
1592 	lcdc_write(reg_context.raster_timing_1, LCD_RASTER_TIMING_1_REG);  in lcd_context_restore()
1593 	lcdc_write(reg_context.raster_timing_2, LCD_RASTER_TIMING_2_REG);  in lcd_context_restore()
1594 	lcdc_write(reg_context.dma_frm_buf_base_addr_0,  in lcd_context_restore()
1596 	lcdc_write(reg_context.dma_frm_buf_ceiling_addr_0,  in lcd_context_restore()
1598 	lcdc_write(reg_context.dma_frm_buf_base_addr_1,  in lcd_context_restore()
1600 	lcdc_write(reg_context.dma_frm_buf_ceiling_addr_1,  in lcd_context_restore()
1602 	lcdc_write(reg_context.raster_ctrl, LCD_RASTER_CTRL_REG);  in lcd_context_restore()