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1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * USBVEND.H Vendor-specific USB definitions
7 * must be kept backward-compatible with older firmware.
34 // We break the USB-defined PID into an OEM Id field (upper 6 bits)
40 // ION-device OEM IDs
42 #define ION_OEM_ID_NLYNX 1 // 01h NLynx Systems
50 // ION-device Device IDs
51 // Product IDs - assigned to match middle digit of serial number (No longer true)
54 // is based on the 80251+Netchip.
56 #define ION_DEVICE_ID_GENERATION_1 0x00 // Value for 930 based edgeports
77 // ION_DEVICE_ID_EDGEPORT_8_HANDBUILT 0x009 // Hand-built Edgeport/8 (Placeholder, used in middle d…
82 …e ION_DEVICE_ID_EDGEPORT_8_DUAL_CPU 0x00E // Half of an Edgeport/8 (the kind with 2 EP/4s on 1 PCB)
83 #define ION_DEVICE_ID_EDGEPORT_8 0x00F // Edgeport/8 (single-CPU)
88 #define ION_DEVICE_ID_EDGEPORT_8I 0x014 // Edgeport/8 RS422 (single-CPU)
89 #define ION_DEVICE_ID_EDGEPORT_1 0x015 // Edgeport/1 RS232
90 #define ION_DEVICE_ID_EPOS44 0x016 // Half of an EPOS/44 (TIUMP BASED)
94 #define ION_DEVICE_ID_EDGEPORT_22I 0x01A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and…
96 // Compact Form factor TI based devices 2c, 21c, 22c, 221c
97 #define ION_DEVICE_ID_EDGEPORT_2C 0x01B // Edgeport/2c is a TI based Edgeport/2 - Small I2c
98 #define ION_DEVICE_ID_EDGEPORT_221C 0x01C // Edgeport/221c is a TI based Edgeport/2 with lucent ch…
99 // 2 external hub ports - Large I2C
100 #define ION_DEVICE_ID_EDGEPORT_22C 0x01D // Edgeport/22c is a TI based Edgeport/2 with
101 // 2 external hub ports - Large I2C
102 #define ION_DEVICE_ID_EDGEPORT_21C 0x01E // Edgeport/21c is a TI based Edgeport/2 with lucent chip
113 // Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)
114 #define ION_DEVICE_ID_TI3410_EDGEPORT_1 0x040 // Edgeport/1 RS232
115 #define ION_DEVICE_ID_TI3410_EDGEPORT_1I 0x041 // Edgeport/1i- RS422 model
117 // Ti based software switchable RS232/RS422/RS485 devices
118 #define ION_DEVICE_ID_EDGEPORT_4S 0x042 // Edgeport/4s - software switchable model
119 #define ION_DEVICE_ID_EDGEPORT_8S 0x043 // Edgeport/8s - software switchable model
124 // Edgeport TI based devices
132 #define ION_DEVICE_ID_TI_EDGEPORT_1 0x0215 // Edgeport/1 RS232
134 #define ION_DEVICE_ID_TI_EDGEPORT_22I 0x021A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422…
136 #define ION_DEVICE_ID_TI_EDGEPORT_221C 0x021C // Edgeport/221c is a TI based Edgeport/2 with lucen…
137 // 2 external hub ports - Large I2C
138 #define ION_DEVICE_ID_TI_EDGEPORT_22C 0x021D // Edgeport/22c is a TI based Edgeport/2 with
139 // 2 external hub ports - Large I2C
140 #define ION_DEVICE_ID_TI_EDGEPORT_21C 0x021E // Edgeport/21c is a TI based Edgeport/2 with lucent …
142 // Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)
143 #define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1 0x0240 // Edgeport/1 RS232
144 #define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1I 0x0241 // Edgeport/1i- RS422 model
146 // Ti based software switchable RS232/RS422/RS485 devices
147 #define ION_DEVICE_ID_TI_EDGEPORT_4S 0x0242 // Edgeport/4s - software switchable model
148 #define ION_DEVICE_ID_TI_EDGEPORT_8S 0x0243 // Edgeport/8s - software switchable model
149 #define ION_DEVICE_ID_TI_EDGEPORT_8 0x0244 // Edgeport/8 (single-CPU)
159 // Watchport based on 3410 both 1-wire and binary products (16K I2C)
160 #define ION_DEVICE_ID_WP_UNSERIALIZED 0x300 // Watchport based on 3410 both 1-wire and binary prod…
249 // Definitions of I/O Networks vendor-specific requests
252 // bmRequestType = 01000000 Set vendor-specific, to device
253 // bmRequestType = 11000000 Get vendor-specific, to device
260 // wValue = 16-bit address
266 #define USB_REQUEST_ION_GET_EPIC_DESC 1 // Get Edgeport Compatibility Descriptor
272 #define USB_REQUEST_ION_EXEC_DL_CODE 7 // Begin execution of RAM-based download
284 // wValue = 1, enable (default)
288 // Define parameter values for our vendor-specific commands
294 // This descriptor is only returned by Edgeport-compatible devices
302 // This __u32 defines which Vendor-specific commands/functionality
305 __u32 VendEnableSuspend : 1; // 0001 Set if device supports ION_ENABLE_SUSPEND
312 __u32 IOSPOpen : 1; // 0001 OPEN / OPEN_RSP (Currently must be 1)
313 __u32 IOSPClose : 1; // 0002 CLOSE
314 __u32 IOSPChase : 1; // 0004 CHASE / CHASE_RSP
315 __u32 IOSPSetRxFlow : 1; // 0008 SET_RX_FLOW
316 __u32 IOSPSetTxFlow : 1; // 0010 SET_TX_FLOW
317 __u32 IOSPSetXChar : 1; // 0020 SET_XON_CHAR/SET_XOFF_CHAR
318 __u32 IOSPRxCheck : 1; // 0040 RX_CHECK_REQ/RX_CHECK_RSP
319 __u32 IOSPSetClrBreak : 1; // 0080 SET_BREAK/CLEAR_BREAK
320 __u32 IOSPWriteMCR : 1; // 0100 MCR register writes (set/clr DTR/RTS)
321 __u32 IOSPWriteLCR : 1; // 0200 LCR register writes (wordlen/stop/parity)
322 __u32 IOSPSetBaudRate : 1; // 0400 setting Baud rate (writes to LCR.80h and DLL/DLM register)
323 …__u32 IOSPDisableIntPipe : 1; // 0800 Do not use the interrupt pipe for TxCredits or RxButesAvail…
324 __u32 IOSPRxDataAvail : 1; // 1000 Return status of RX Fifo (Data available in Fifo)
325 __u32 IOSPTxPurge : 1; // 2000 Purge TXBuffer and/or Fifo in Edgeport hardware
330 __u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport
343 // (Currently must be 1)
371 // Version 1 (original) format of DeviceParams
376 // and starts lower in memory, at the uppermost 1K in ROM.
391 // Notes for the following two ION vendor-specific param descriptors:
393 // 1. These have a standard USB descriptor header so they look like a
395 // 2. Any strings in the structures are in USB-defined string
408 // xC00-xFBF (length 3C0h) in the ROM.
428 // Start of v1-compatible section
441 // so host can track changes to USB-only descriptors.
445 __le16 SerialNumber[MAX_SERIALNUMBER_LEN]; // F0E "01-01-000100" Unicode Serial Number
449 __le16 AssemblyNumber[MAX_ASSEMBLYNUMBER_LEN]; // F28 "350-1000-01-A " assembly number
459 __u8 Reserved3[0x4D]; // F70 -- unused, set to 0 --
471 #define MANUF_DESC_VER_1 1 // Original definition of MANUF_DESC
480 #define MANUF_UART_EXAR_654 1 // Exar 16C654
486 // changes in a software-visible way, such that the 930 software or
491 // Implementation 0 (ie, 930-based)
492 #define MANUF_CPU_REV_AD4 1 // 930 AD4, with EP1 Rx bug (needs RXSPM)
497 #define MANUF_BOARD_REV_A 1 // Original version, == Manuf Rev A
504 // Implementation 1 (ie, 251+Netchip-based)
505 #define MANUF_CPU_REV_1 1 // C251TB Rev 1 (Need actual Intel rev here)
507 #define MANUF_BOARD_REV_A 1 // First rev of 251+Netchip design
509 #define MANUF_SERNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->SerialNumber)
510 #define MANUF_ASSYNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->AssemblyNumber)
511 #define MANUF_OEMASSYNUM_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->OemAssyNumber)
512 #define MANUF_MANUFDATE_LENGTH sizeof(((struct edge_manuf_descriptor *)0)->ManufDate)
515 #define MANUF_ION_CONFIG_DIAG 0x40 // 930 based device: 1=Run h/w diags, 0=norm
516 // TIUMP Device : 1=IONSERIAL needs to run Final Test
517 #define MANUF_ION_CONFIG_MASTER 0x80 // 930 based device: 1=Master mode, 0=Normal
518 // TIUMP Device : 1=First device on a multi TIUMP Device
525 // - FF:xFFF. Note that the 930-mandated UCONFIG bytes are
532 __u8 Reserved1; // C3 -- unused, set to 0 --
534 __le16 BootCodeLength; // C4 Boot code goes from FF:0000 to FF:(len-1)
541 __u16 EnumRootDescTable; // CA Root of ROM-based descriptor table
546 __le16 Capabilities; // CE-CF Capabilities flags (LE format)
547 __u8 Reserved2[0x28]; // D0 -- unused, set to 0 --
548 __u8 UConfig0; // F8 930-defined CPU configuration byte 0
549 __u8 UConfig1; // F9 930-defined CPU configuration byte 1
550 __u8 Reserved3[6]; // FA -- unused, set to 0 --
555 #define BOOT_DESC_VER_1 1 // Original definition of BOOT_PARAMS
623 // bit 7: 1 - power switching supported
624 // 0 - power switching not supported
626 // bit 0: 1 - self powered
627 // 0 - bus powered
639 #define TI_CPU_REV_5052 2 // 5052 based edgeports
640 #define TI_CPU_REV_3410 3 // 3410 based edgeports
642 #define TI_BOARD_REV_TI_EP 0 // Basic ti based edgeport
643 #define TI_BOARD_REV_COMPACT 1 // Compact board
651 #define TI_GET_I2C_SIZE(x) ((((x) & TI_I2C_SIZE_MASK)+1)*256)