Lines Matching full:ports
170 struct usb_hub_descriptor *desc, int ports) in xhci_common_hub_descriptor() argument
177 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
187 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
196 int ports; in xhci_usb2_hub_descriptor() local
204 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
205 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb2_hub_descriptor()
207 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
214 for (i = 0; i < ports; i++) { in xhci_usb2_hub_descriptor()
215 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
227 * ports on it. The USB 2.0 specification says that there are two in xhci_usb2_hub_descriptor()
230 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array in xhci_usb2_hub_descriptor()
234 * set of ports that actually exist. in xhci_usb2_hub_descriptor()
241 for (i = 0; i < (ports + 1 + 7) / 8; i++) in xhci_usb2_hub_descriptor()
250 int ports; in xhci_usb3_hub_descriptor() local
257 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
258 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb3_hub_descriptor()
270 for (i = 0; i < ports; i++) { in xhci_usb3_hub_descriptor()
271 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
327 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
483 /* Don't allow the USB core to disable SuperSpeed ports. */ in xhci_disable_port()
577 port = rhub->ports[index]; in xhci_set_port_power()
609 /* xhci only supports test mode for usb2 ports */ in xhci_port_set_test_mode()
610 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
638 /* Put all ports to the Disable state by clear PP */ in xhci_enter_test_mode()
640 /* Power off USB3 ports*/ in xhci_enter_test_mode()
643 /* Power off USB2 ports*/ in xhci_enter_test_mode()
794 * This Function verifies if all xhc USB3 ports have entered U0, if so,
812 "All USB3 ports have entered U0 already!"); in xhci_del_comp_mod_timer()
1041 port = rhub->ports[wIndex]; in xhci_get_port_status()
1105 struct xhci_port **ports; in xhci_hub_control() local
1108 ports = rhub->ports; in xhci_hub_control()
1147 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1172 port_li = readl(ports[wIndex]->addr + PORTLI); in xhci_hub_control()
1190 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1200 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1203 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1213 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1232 xhci_set_link_state(xhci, ports[wIndex], XDEV_U3); in xhci_hub_control()
1238 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1242 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1255 writel(temp | PORT_PE, ports[wIndex]->addr); in xhci_hub_control()
1256 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1264 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1266 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1297 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1300 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1337 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1350 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1366 xhci_set_link_state(xhci, ports[wIndex], USB_SS_PORT_LS_U3); in xhci_hub_control()
1370 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1375 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1381 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1390 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1392 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1397 xhci_set_remote_wake_mask(xhci, ports[wIndex], in xhci_hub_control()
1399 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1405 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1406 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1411 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1414 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1419 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1422 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1438 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1444 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1454 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1465 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1470 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1496 ports[wIndex]->addr, temp); in xhci_hub_control()
1500 ports[wIndex]->addr, temp); in xhci_hub_control()
1523 * Ports are 0-indexed from the HCD point of view,
1540 struct xhci_port **ports; in xhci_hub_status_data() local
1543 ports = rhub->ports; in xhci_hub_status_data()
1562 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1599 struct xhci_port **ports; in xhci_bus_suspend() local
1604 ports = rhub->ports; in xhci_bus_suspend()
1620 * Prepare ports for suspend, but don't write anything before all ports in xhci_bus_suspend()
1629 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1653 /* suspend ports in U0, or bail out for new connect changes */ in xhci_bus_suspend()
1694 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1710 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1757 struct xhci_port **ports; in xhci_bus_resume() local
1760 ports = rhub->ports; in xhci_bus_resume()
1778 /* bus specific resume for ports we suspended at bus_suspend */ in xhci_bus_resume()
1786 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1788 /* warm reset CAS limited ports stuck in polling/compliance */ in xhci_bus_resume()
1791 xhci_port_missing_cas_quirk(ports[port_index])) { in xhci_bus_resume()
1814 /* disable wake for all ports, write new link state if needed */ in xhci_bus_resume()
1816 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1829 xhci_test_and_clear_bit(xhci, ports[port_index], in xhci_bus_resume()
1831 xhci_set_link_state(xhci, ports[port_index], XDEV_U0); in xhci_bus_resume()
1837 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1844 xhci_test_and_clear_bit(xhci, ports[port_index], PORT_PLC); in xhci_bus_resume()
1867 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()