Lines Matching +full:rcar +full:- +full:gen3 +full:- +full:hscif
1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * Copyright (C) 2002 - 2011 Paul Mundt
9 * based off of the old drivers/char/sh-sci.c by:
26 #include <linux/dma-mapping.h>
57 #include "sh-sci.h"
59 /* Offsets into the sci_port->irqs array */
73 ((port)->irqs[SCIx_ERI_IRQ] == \
74 (port)->irqs[SCIx_RXI_IRQ]) || \
75 ((port)->irqs[SCIx_ERI_IRQ] && \
76 ((port)->irqs[SCIx_RXI_IRQ] < 0))
87 #define SCI_SR(x) BIT((x) - 1)
88 #define SCI_SR_RANGE(x, y) GENMASK((y) - 1, (x) - 1)
94 #define min_sr(_port) ffs((_port)->sampling_rate_mask)
95 #define max_sr(_port) fls((_port)->sampling_rate_mask)
99 for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--) \
100 if ((_port)->sampling_rate_mask & SCI_SR((_sr)))
267 * Common SH-2(A) SCIF definitions for ports with FIFO data
319 * Common SH-3 SCIF definitions.
341 * Common SH-4(A) SCIF(B) definitions.
392 * Common HSCIF definitions.
421 * Common SH-4(A) SCIF(B) definitions for ports without an SCSPTR
445 * Common SH-4(A) SCIF(B) definitions for ports with FIFO data
472 * SH7705-style SCIF(B) ports, lacking both SCSPTR and SCLSR
495 #define sci_getreg(up, offset) (&to_sci_port(up)->params->regs[offset])
507 if (reg->size == 8) in sci_serial_in()
508 return ioread8(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
509 else if (reg->size == 16) in sci_serial_in()
510 return ioread16(p->membase + (reg->offset << p->regshift)); in sci_serial_in()
521 if (reg->size == 8) in sci_serial_out()
522 iowrite8(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
523 else if (reg->size == 16) in sci_serial_out()
524 iowrite16(value, p->membase + (reg->offset << p->regshift)); in sci_serial_out()
533 if (!sci_port->port.dev) in sci_port_enable()
536 pm_runtime_get_sync(sci_port->port.dev); in sci_port_enable()
539 clk_prepare_enable(sci_port->clks[i]); in sci_port_enable()
540 sci_port->clk_rates[i] = clk_get_rate(sci_port->clks[i]); in sci_port_enable()
542 sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK]; in sci_port_enable()
549 if (!sci_port->port.dev) in sci_port_disable()
552 for (i = SCI_NUM_CLKS; i-- > 0; ) in sci_port_disable()
553 clk_disable_unprepare(sci_port->clks[i]); in sci_port_disable()
555 pm_runtime_put_sync(sci_port->port.dev); in sci_port_disable()
562 * special-casing the port type, we check the port initialization in port_rx_irq_mask()
567 return SCSCR_RIE | (to_sci_port(port)->cfg->scscr & SCSCR_REIE); in port_rx_irq_mask()
576 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
578 if (s->chan_tx) in sci_start_tx()
586 if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) && in sci_start_tx()
587 dma_submit_error(s->cookie_tx)) { in sci_start_tx()
588 s->cookie_tx = 0; in sci_start_tx()
589 schedule_work(&s->work_tx); in sci_start_tx()
593 if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_start_tx()
607 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_tx()
621 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_start_rx()
633 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_stop_rx()
643 if (port->type == PORT_SCI) { in sci_clear_SCxSR()
646 } else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) { in sci_clear_SCxSR()
707 * Use port-specific handler if provided. in sci_init_pins()
709 if (s->cfg->ops && s->cfg->ops->init_pins) { in sci_init_pins()
710 s->cfg->ops->init_pins(port, cflag); in sci_init_pins()
714 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_init_pins()
720 if (to_sci_port(port)->has_rtscts) { in sci_init_pins()
722 if (!(port->mctrl & TIOCM_RTS)) { in sci_init_pins()
725 } else if (!s->autorts) { in sci_init_pins()
737 } else if (sci_getreg(port, SCSPTR)->size) { in sci_init_pins()
742 if (!(port->mctrl & TIOCM_RTS)) in sci_init_pins()
744 else if (!s->autorts) in sci_init_pins()
755 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_txfill()
759 if (reg->size) in sci_txfill()
763 if (reg->size) in sci_txfill()
771 return port->fifosize - sci_txfill(port); in sci_txroom()
777 unsigned int fifo_mask = (s->params->fifosize << 1) - 1; in sci_rxfill()
781 if (reg->size) in sci_rxfill()
785 if (reg->size) in sci_rxfill()
797 struct circ_buf *xmit = &port->state->xmit; in sci_transmit_chars()
819 if (port->x_char) { in sci_transmit_chars()
820 c = port->x_char; in sci_transmit_chars()
821 port->x_char = 0; in sci_transmit_chars()
823 c = xmit->buf[xmit->tail]; in sci_transmit_chars()
824 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in sci_transmit_chars()
831 port->icount.tx++; in sci_transmit_chars()
832 } while (--count > 0); in sci_transmit_chars()
843 /* On SH3, SCIF may read end-of-break as a space->mark char */
844 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
848 struct tty_port *tport = &port->state->port; in sci_receive_chars()
865 if (port->type == PORT_SCI) { in sci_receive_chars()
875 if (port->type == PORT_SCIF || in sci_receive_chars()
876 port->type == PORT_HSCIF) { in sci_receive_chars()
884 count--; i--; in sci_receive_chars()
891 port->icount.frame++; in sci_receive_chars()
892 dev_notice(port->dev, "frame error\n"); in sci_receive_chars()
895 port->icount.parity++; in sci_receive_chars()
896 dev_notice(port->dev, "parity error\n"); in sci_receive_chars()
908 port->icount.rx += count; in sci_receive_chars()
926 struct tty_port *tport = &port->state->port; in sci_handle_errors()
930 if (status & s->params->overrun_mask) { in sci_handle_errors()
931 port->icount.overrun++; in sci_handle_errors()
937 dev_notice(port->dev, "overrun error\n"); in sci_handle_errors()
942 port->icount.frame++; in sci_handle_errors()
947 dev_notice(port->dev, "frame error\n"); in sci_handle_errors()
952 port->icount.parity++; in sci_handle_errors()
957 dev_notice(port->dev, "parity error\n"); in sci_handle_errors()
968 struct tty_port *tport = &port->state->port; in sci_handle_fifo_overrun()
974 reg = sci_getreg(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
975 if (!reg->size) in sci_handle_fifo_overrun()
978 status = serial_port_in(port, s->params->overrun_reg); in sci_handle_fifo_overrun()
979 if (status & s->params->overrun_mask) { in sci_handle_fifo_overrun()
980 status &= ~s->params->overrun_mask; in sci_handle_fifo_overrun()
981 serial_port_out(port, s->params->overrun_reg, status); in sci_handle_fifo_overrun()
983 port->icount.overrun++; in sci_handle_fifo_overrun()
988 dev_dbg(port->dev, "overrun error\n"); in sci_handle_fifo_overrun()
999 struct tty_port *tport = &port->state->port; in sci_handle_breaks()
1005 port->icount.brk++; in sci_handle_breaks()
1011 dev_dbg(port->dev, "BREAK detected\n"); in sci_handle_breaks()
1028 if (rx_trig >= port->fifosize) in scif_set_rtrg()
1029 rx_trig = port->fifosize; in scif_set_rtrg()
1031 /* HSCIF can be set to an arbitrary level. */ in scif_set_rtrg()
1032 if (sci_getreg(port, HSRTRGR)->size) { in scif_set_rtrg()
1037 switch (port->type) { in scif_set_rtrg()
1083 if (sci_getreg(port, HSRTRGR)->size) in scif_rtrg_enabled()
1093 struct uart_port *port = &s->port; in rx_fifo_timer_fn()
1095 dev_dbg(port->dev, "Rx timed out\n"); in rx_fifo_timer_fn()
1105 return sprintf(buf, "%d\n", sci->rx_trigger); in rx_fifo_trigger_show()
1121 sci->rx_trigger = scif_set_rtrg(port, r); in rx_fifo_trigger_store()
1122 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in rx_fifo_trigger_store()
1138 if (port->type == PORT_HSCIF) in rx_fifo_timeout_show()
1139 v = sci->hscif_tot >> HSSCR_TOT_SHIFT; in rx_fifo_timeout_show()
1141 v = sci->rx_fifo_timeout; in rx_fifo_timeout_show()
1160 if (port->type == PORT_HSCIF) { in rx_fifo_timeout_store()
1162 return -EINVAL; in rx_fifo_timeout_store()
1163 sci->hscif_tot = r << HSSCR_TOT_SHIFT; in rx_fifo_timeout_store()
1165 sci->rx_fifo_timeout = r; in rx_fifo_timeout_store()
1168 timer_setup(&sci->rx_fifo_timer, rx_fifo_timer_fn, 0); in rx_fifo_timeout_store()
1181 struct uart_port *port = &s->port; in sci_dma_tx_complete()
1182 struct circ_buf *xmit = &port->state->xmit; in sci_dma_tx_complete()
1185 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_dma_tx_complete()
1187 spin_lock_irqsave(&port->lock, flags); in sci_dma_tx_complete()
1189 xmit->tail += s->tx_dma_len; in sci_dma_tx_complete()
1190 xmit->tail &= UART_XMIT_SIZE - 1; in sci_dma_tx_complete()
1192 port->icount.tx += s->tx_dma_len; in sci_dma_tx_complete()
1198 s->cookie_tx = 0; in sci_dma_tx_complete()
1199 schedule_work(&s->work_tx); in sci_dma_tx_complete()
1201 s->cookie_tx = -EINVAL; in sci_dma_tx_complete()
1202 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_dma_tx_complete()
1208 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_tx_complete()
1214 struct uart_port *port = &s->port; in sci_dma_rx_push()
1215 struct tty_port *tport = &port->state->port; in sci_dma_rx_push()
1220 port->icount.buf_overrun++; in sci_dma_rx_push()
1222 port->icount.rx += copied; in sci_dma_rx_push()
1231 for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) in sci_dma_rx_find_active()
1232 if (s->active_rx == s->cookie_rx[i]) in sci_dma_rx_find_active()
1235 return -1; in sci_dma_rx_find_active()
1242 s->chan_rx = NULL; in sci_dma_rx_chan_invalidate()
1243 for (i = 0; i < ARRAY_SIZE(s->cookie_rx); i++) in sci_dma_rx_chan_invalidate()
1244 s->cookie_rx[i] = -EINVAL; in sci_dma_rx_chan_invalidate()
1245 s->active_rx = 0; in sci_dma_rx_chan_invalidate()
1250 struct dma_chan *chan = s->chan_rx_saved; in sci_dma_rx_release()
1252 s->chan_rx_saved = NULL; in sci_dma_rx_release()
1255 dma_free_coherent(chan->device->dev, s->buf_len_rx * 2, s->rx_buf[0], in sci_dma_rx_release()
1256 sg_dma_address(&s->sg_rx[0])); in sci_dma_rx_release()
1271 struct uart_port *port = &s->port; in sci_dma_rx_reenable_irq()
1276 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_dma_rx_reenable_irq()
1278 enable_irq(s->irqs[SCIx_RXI_IRQ]); in sci_dma_rx_reenable_irq()
1286 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_complete()
1287 struct uart_port *port = &s->port; in sci_dma_rx_complete()
1292 dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line, in sci_dma_rx_complete()
1293 s->active_rx); in sci_dma_rx_complete()
1295 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1299 count = sci_dma_rx_push(s, s->rx_buf[active], s->buf_len_rx); in sci_dma_rx_complete()
1301 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_dma_rx_complete()
1304 tty_flip_buffer_push(&port->state->port); in sci_dma_rx_complete()
1306 desc = dmaengine_prep_slave_sg(s->chan_rx, &s->sg_rx[active], 1, in sci_dma_rx_complete()
1312 desc->callback = sci_dma_rx_complete; in sci_dma_rx_complete()
1313 desc->callback_param = s; in sci_dma_rx_complete()
1314 s->cookie_rx[active] = dmaengine_submit(desc); in sci_dma_rx_complete()
1315 if (dma_submit_error(s->cookie_rx[active])) in sci_dma_rx_complete()
1318 s->active_rx = s->cookie_rx[!active]; in sci_dma_rx_complete()
1322 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1323 dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n", in sci_dma_rx_complete()
1324 __func__, s->cookie_rx[active], active, s->active_rx); in sci_dma_rx_complete()
1328 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1329 dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n"); in sci_dma_rx_complete()
1331 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_complete()
1335 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_complete()
1340 struct dma_chan *chan = s->chan_tx_saved; in sci_dma_tx_release()
1342 cancel_work_sync(&s->work_tx); in sci_dma_tx_release()
1343 s->chan_tx_saved = s->chan_tx = NULL; in sci_dma_tx_release()
1344 s->cookie_tx = -EINVAL; in sci_dma_tx_release()
1346 dma_unmap_single(chan->device->dev, s->tx_dma_addr, UART_XMIT_SIZE, in sci_dma_tx_release()
1353 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_submit()
1354 struct uart_port *port = &s->port; in sci_dma_rx_submit()
1359 struct scatterlist *sg = &s->sg_rx[i]; in sci_dma_rx_submit()
1368 desc->callback = sci_dma_rx_complete; in sci_dma_rx_submit()
1369 desc->callback_param = s; in sci_dma_rx_submit()
1370 s->cookie_rx[i] = dmaengine_submit(desc); in sci_dma_rx_submit()
1371 if (dma_submit_error(s->cookie_rx[i])) in sci_dma_rx_submit()
1376 s->active_rx = s->cookie_rx[0]; in sci_dma_rx_submit()
1384 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_submit()
1390 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_submit()
1391 return -EAGAIN; in sci_dma_rx_submit()
1398 struct dma_chan *chan = s->chan_tx; in sci_dma_tx_work_fn()
1399 struct uart_port *port = &s->port; in sci_dma_tx_work_fn()
1400 struct circ_buf *xmit = &port->state->xmit; in sci_dma_tx_work_fn()
1412 spin_lock_irq(&port->lock); in sci_dma_tx_work_fn()
1413 head = xmit->head; in sci_dma_tx_work_fn()
1414 tail = xmit->tail; in sci_dma_tx_work_fn()
1415 buf = s->tx_dma_addr + (tail & (UART_XMIT_SIZE - 1)); in sci_dma_tx_work_fn()
1416 s->tx_dma_len = min_t(unsigned int, in sci_dma_tx_work_fn()
1419 if (!s->tx_dma_len) { in sci_dma_tx_work_fn()
1421 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1425 desc = dmaengine_prep_slave_single(chan, buf, s->tx_dma_len, in sci_dma_tx_work_fn()
1429 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1430 dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n"); in sci_dma_tx_work_fn()
1434 dma_sync_single_for_device(chan->device->dev, buf, s->tx_dma_len, in sci_dma_tx_work_fn()
1437 desc->callback = sci_dma_tx_complete; in sci_dma_tx_work_fn()
1438 desc->callback_param = s; in sci_dma_tx_work_fn()
1439 s->cookie_tx = dmaengine_submit(desc); in sci_dma_tx_work_fn()
1440 if (dma_submit_error(s->cookie_tx)) { in sci_dma_tx_work_fn()
1441 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1442 dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n"); in sci_dma_tx_work_fn()
1446 spin_unlock_irq(&port->lock); in sci_dma_tx_work_fn()
1447 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", in sci_dma_tx_work_fn()
1448 __func__, xmit->buf, tail, head, s->cookie_tx); in sci_dma_tx_work_fn()
1454 spin_lock_irqsave(&port->lock, flags); in sci_dma_tx_work_fn()
1455 s->chan_tx = NULL; in sci_dma_tx_work_fn()
1457 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_tx_work_fn()
1464 struct dma_chan *chan = s->chan_rx; in sci_dma_rx_timer_fn()
1465 struct uart_port *port = &s->port; in sci_dma_rx_timer_fn()
1472 dev_dbg(port->dev, "DMA Rx timed out\n"); in sci_dma_rx_timer_fn()
1474 spin_lock_irqsave(&port->lock, flags); in sci_dma_rx_timer_fn()
1478 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1482 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in sci_dma_rx_timer_fn()
1484 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1485 dev_dbg(port->dev, "Cookie %d #%d has already completed\n", in sci_dma_rx_timer_fn()
1486 s->active_rx, active); in sci_dma_rx_timer_fn()
1500 status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state); in sci_dma_rx_timer_fn()
1502 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1503 dev_dbg(port->dev, "Transaction complete after DMA engine was stopped"); in sci_dma_rx_timer_fn()
1508 dmaengine_terminate_async(s->chan_rx); in sci_dma_rx_timer_fn()
1509 read = sg_dma_len(&s->sg_rx[active]) - state.residue; in sci_dma_rx_timer_fn()
1512 count = sci_dma_rx_push(s, s->rx_buf[active], read); in sci_dma_rx_timer_fn()
1514 tty_flip_buffer_push(&port->state->port); in sci_dma_rx_timer_fn()
1517 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_dma_rx_timer_fn()
1522 spin_unlock_irqrestore(&port->lock, flags); in sci_dma_rx_timer_fn()
1534 chan = dma_request_slave_channel(port->dev, in sci_request_dma_chan()
1537 dev_dbg(port->dev, "dma_request_slave_channel failed\n"); in sci_request_dma_chan()
1544 cfg.dst_addr = port->mapbase + in sci_request_dma_chan()
1545 (sci_getreg(port, SCxTDR)->offset << port->regshift); in sci_request_dma_chan()
1548 cfg.src_addr = port->mapbase + in sci_request_dma_chan()
1549 (sci_getreg(port, SCxRDR)->offset << port->regshift); in sci_request_dma_chan()
1555 dev_warn(port->dev, "dmaengine_slave_config failed %d\n", ret); in sci_request_dma_chan()
1568 dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); in sci_request_dma()
1577 if (!port->dev->of_node) in sci_request_dma()
1580 s->cookie_tx = -EINVAL; in sci_request_dma()
1586 if (!of_find_property(port->dev->of_node, "dmas", NULL)) in sci_request_dma()
1590 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); in sci_request_dma()
1593 s->tx_dma_addr = dma_map_single(chan->device->dev, in sci_request_dma()
1594 port->state->xmit.buf, in sci_request_dma()
1597 if (dma_mapping_error(chan->device->dev, s->tx_dma_addr)) { in sci_request_dma()
1598 dev_warn(port->dev, "Failed mapping Tx DMA descriptor\n"); in sci_request_dma()
1601 dev_dbg(port->dev, "%s: mapped %lu@%p to %pad\n", in sci_request_dma()
1603 port->state->xmit.buf, &s->tx_dma_addr); in sci_request_dma()
1605 INIT_WORK(&s->work_tx, sci_dma_tx_work_fn); in sci_request_dma()
1606 s->chan_tx_saved = s->chan_tx = chan; in sci_request_dma()
1611 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); in sci_request_dma()
1617 s->buf_len_rx = 2 * max_t(size_t, 16, port->fifosize); in sci_request_dma()
1618 buf = dma_alloc_coherent(chan->device->dev, s->buf_len_rx * 2, in sci_request_dma()
1621 dev_warn(port->dev, in sci_request_dma()
1628 struct scatterlist *sg = &s->sg_rx[i]; in sci_request_dma()
1631 s->rx_buf[i] = buf; in sci_request_dma()
1633 sg_dma_len(sg) = s->buf_len_rx; in sci_request_dma()
1635 buf += s->buf_len_rx; in sci_request_dma()
1636 dma += s->buf_len_rx; in sci_request_dma()
1639 hrtimer_init(&s->rx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in sci_request_dma()
1640 s->rx_timer.function = sci_dma_rx_timer_fn; in sci_request_dma()
1642 s->chan_rx_saved = s->chan_rx = chan; in sci_request_dma()
1644 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_request_dma()
1653 if (s->chan_tx_saved) in sci_free_dma()
1655 if (s->chan_rx_saved) in sci_free_dma()
1668 s->tx_dma_len = 0; in sci_flush_buffer()
1669 if (s->chan_tx) { in sci_flush_buffer()
1670 dmaengine_terminate_async(s->chan_tx); in sci_flush_buffer()
1671 s->cookie_tx = -EINVAL; in sci_flush_buffer()
1692 if (s->chan_rx) { in sci_rx_interrupt()
1697 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_rx_interrupt()
1710 dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u us\n", in sci_rx_interrupt()
1711 jiffies, s->rx_timeout); in sci_rx_interrupt()
1712 start_hrtimer_us(&s->rx_timer, s->rx_timeout); in sci_rx_interrupt()
1720 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) { in sci_rx_interrupt()
1722 scif_set_rtrg(port, s->rx_trigger); in sci_rx_interrupt()
1724 mod_timer(&s->rx_fifo_timer, jiffies + DIV_ROUND_UP( in sci_rx_interrupt()
1725 s->rx_frame * HZ * s->rx_fifo_timeout, 1000000)); in sci_rx_interrupt()
1742 spin_lock_irqsave(&port->lock, flags); in sci_tx_interrupt()
1744 spin_unlock_irqrestore(&port->lock, flags); in sci_tx_interrupt()
1765 if (s->irqs[SCIx_ERI_IRQ] == s->irqs[SCIx_BRI_IRQ]) { in sci_er_interrupt()
1779 if (port->type == PORT_SCI) { in sci_er_interrupt()
1787 if (!s->chan_rx) in sci_er_interrupt()
1794 if (!s->chan_tx) in sci_er_interrupt()
1809 if (s->params->overrun_reg == SCxSR) in sci_mpxed_interrupt()
1811 else if (sci_getreg(port, s->params->overrun_reg)->size) in sci_mpxed_interrupt()
1812 orer_status = serial_port_in(port, s->params->overrun_reg); in sci_mpxed_interrupt()
1818 !s->chan_tx) in sci_mpxed_interrupt()
1825 if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) && in sci_mpxed_interrupt()
1838 if (orer_status & s->params->overrun_mask) { in sci_mpxed_interrupt()
1894 struct uart_port *up = &port->port; in sci_request_irq()
1903 if (port->irqs[w] == port->irqs[i]) in sci_request_irq()
1910 irq = up->irq; in sci_request_irq()
1912 irq = port->irqs[i]; in sci_request_irq()
1923 port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", in sci_request_irq()
1924 dev_name(up->dev), desc->desc); in sci_request_irq()
1925 if (!port->irqstr[j]) { in sci_request_irq()
1926 ret = -ENOMEM; in sci_request_irq()
1930 ret = request_irq(irq, desc->handler, up->irqflags, in sci_request_irq()
1931 port->irqstr[j], port); in sci_request_irq()
1933 dev_err(up->dev, "Can't allocate %s IRQ\n", desc->desc); in sci_request_irq()
1941 while (--i >= 0) in sci_request_irq()
1942 free_irq(port->irqs[i], port); in sci_request_irq()
1945 while (--j >= 0) in sci_request_irq()
1946 kfree(port->irqstr[j]); in sci_request_irq()
1960 int irq = port->irqs[i]; in sci_free_irq()
1971 if (port->irqs[j] == irq) in sci_free_irq()
1976 free_irq(port->irqs[i], port); in sci_free_irq()
1977 kfree(port->irqstr[i]); in sci_free_irq()
1996 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_rts()
2009 } else if (sci_getreg(port, SCSPTR)->size) { in sci_set_rts()
2023 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_get_cts()
2026 } else if (sci_getreg(port, SCSPTR)->size) { in sci_get_cts()
2038 * handled via the ->init_pins() op, which is a bit of a one-way street,
2039 * lacking any ability to defer pin control -- this will later be
2057 if (reg->size) in sci_set_mctrl()
2063 mctrl_gpio_set(s->gpios, mctrl); in sci_set_mctrl()
2065 if (!s->has_rtscts) in sci_set_mctrl()
2075 } else if (s->autorts) { in sci_set_mctrl()
2076 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { in sci_set_mctrl()
2094 struct mctrl_gpios *gpios = s->gpios; in sci_get_mctrl()
2103 if (s->autorts) { in sci_get_mctrl()
2119 mctrl_gpio_enable_ms(to_sci_port(port)->gpios); in sci_enable_ms()
2128 if (!sci_getreg(port, SCSPTR)->size) { in sci_break_ctl()
2136 spin_lock_irqsave(&port->lock, flags); in sci_break_ctl()
2140 if (break_state == -1) { in sci_break_ctl()
2150 spin_unlock_irqrestore(&port->lock, flags); in sci_break_ctl()
2158 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_startup()
2177 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line); in sci_shutdown()
2179 s->autorts = false; in sci_shutdown()
2180 mctrl_gpio_disable_ms(to_sci_port(port)->gpios); in sci_shutdown()
2182 spin_lock_irqsave(&port->lock, flags); in sci_shutdown()
2187 * and HSCIF TOT bits in sci_shutdown()
2191 (SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot)); in sci_shutdown()
2192 spin_unlock_irqrestore(&port->lock, flags); in sci_shutdown()
2195 if (s->chan_rx_saved) { in sci_shutdown()
2196 dev_dbg(port->dev, "%s(%d) deleting rx_timer\n", __func__, in sci_shutdown()
2197 port->line); in sci_shutdown()
2198 hrtimer_cancel(&s->rx_timer); in sci_shutdown()
2202 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) in sci_shutdown()
2203 del_timer_sync(&s->rx_fifo_timer); in sci_shutdown()
2211 unsigned long freq = s->clk_rates[SCI_SCK]; in sci_sck_calc()
2215 if (s->port.type != PORT_HSCIF) in sci_sck_calc()
2219 err = DIV_ROUND_CLOSEST(freq, sr) - bps; in sci_sck_calc()
2224 *srr = sr - 1; in sci_sck_calc()
2230 dev_dbg(s->port.dev, "SCK: %u%+d bps using SR %u\n", bps, min_err, in sci_sck_calc()
2242 if (s->port.type != PORT_HSCIF) in sci_brg_calc()
2249 err = DIV_ROUND_CLOSEST(freq, sr * dl) - bps; in sci_brg_calc()
2255 *srr = sr - 1; in sci_brg_calc()
2261 dev_dbg(s->port.dev, "BRG: %u%+d bps using DL %u SR %u\n", bps, in sci_brg_calc()
2271 unsigned long freq = s->clk_rates[SCI_FCK]; in sci_scbrr_calc()
2275 if (s->port.type != PORT_HSCIF) in sci_scbrr_calc()
2289 * M = |(0.5 - 1 / 2 * N) - ((L - 0.5) * F) - in sci_scbrr_calc()
2290 * (|D - 0.5| / N * (1 + F))| in sci_scbrr_calc()
2295 /* integerized formulas from HSCIF documentation */ in sci_scbrr_calc()
2302 * err = freq / (br * prediv) - bps in sci_scbrr_calc()
2314 err = DIV_ROUND_CLOSEST(freq, br * prediv) - bps; in sci_scbrr_calc()
2319 *brr = br - 1; in sci_scbrr_calc()
2320 *srr = sr - 1; in sci_scbrr_calc()
2329 dev_dbg(s->port.dev, "BRR: %u%+d bps using N %u SR %u cks %u\n", bps, in sci_scbrr_calc()
2340 serial_port_out(port, SCSCR, s->hscif_tot); /* TE=0, RE=0, CKE1=0 */ in sci_reset()
2343 if (reg->size) in sci_reset()
2349 if (sci_getreg(port, SCLSR)->size) { in sci_reset()
2355 if (s->rx_trigger > 1) { in sci_reset()
2356 if (s->rx_fifo_timeout) { in sci_reset()
2358 timer_setup(&s->rx_fifo_timer, rx_fifo_timer_fn, 0); in sci_reset()
2360 if (port->type == PORT_SCIFA || in sci_reset()
2361 port->type == PORT_SCIFB) in sci_reset()
2364 scif_set_rtrg(port, s->rx_trigger); in sci_reset()
2379 int best_clk = -1; in sci_set_termios()
2382 if ((termios->c_cflag & CSIZE) == CS7) in sci_set_termios()
2384 if (termios->c_cflag & PARENB) in sci_set_termios()
2386 if (termios->c_cflag & PARODD) in sci_set_termios()
2388 if (termios->c_cflag & CSTOPB) in sci_set_termios()
2392 * earlyprintk comes here early on with port->uartclk set to zero. in sci_set_termios()
2395 * the baud rate is not programmed during earlyprintk - it is assumed in sci_set_termios()
2399 if (!port->uartclk) { in sci_set_termios()
2405 max_freq = max(max_freq, s->clk_rates[i]); in sci_set_termios()
2417 if (s->clk_rates[SCI_SCK] && port->type != PORT_SCIFA && in sci_set_termios()
2418 port->type != PORT_SCIFB) { in sci_set_termios()
2432 if (s->clk_rates[SCI_SCIF_CLK] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2433 err = sci_brg_calc(s, baud, s->clk_rates[SCI_SCIF_CLK], &dl1, in sci_set_termios()
2448 if (s->clk_rates[SCI_BRG_INT] && sci_getreg(port, SCDL)->size) { in sci_set_termios()
2449 err = sci_brg_calc(s, baud, s->clk_rates[SCI_BRG_INT], &dl1, in sci_set_termios()
2476 dev_dbg(port->dev, "Using clk %pC for %u%+d bps\n", in sci_set_termios()
2477 s->clks[best_clk], baud, min_err); in sci_set_termios()
2485 if (best_clk >= 0 && sci_getreg(port, SCCKS)->size) { in sci_set_termios()
2490 spin_lock_irqsave(&port->lock, flags); in sci_set_termios()
2494 uart_update_timeout(port, termios->c_cflag, baud); in sci_set_termios()
2497 switch (termios->c_cflag & CSIZE) { in sci_set_termios()
2512 if (termios->c_cflag & CSTOPB) in sci_set_termios()
2514 if (termios->c_cflag & PARENB) in sci_set_termios()
2518 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) in sci_set_termios()
2530 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2533 if (sci_getreg(port, HSSRR)->size) { in sci_set_termios()
2538 int last_stop = bits * 2 - 1; in sci_set_termios()
2548 int shift = clamp(deviation / 2, -8, 7); in sci_set_termios()
2558 udelay((1000000 + (baud - 1)) / baud); in sci_set_termios()
2561 scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0); in sci_set_termios()
2564 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2568 sci_init_pins(port, termios->c_cflag); in sci_set_termios()
2570 port->status &= ~UPSTAT_AUTOCTS; in sci_set_termios()
2571 s->autorts = false; in sci_set_termios()
2573 if (reg->size) { in sci_set_termios()
2576 if ((port->flags & UPF_HARD_FLOW) && in sci_set_termios()
2577 (termios->c_cflag & CRTSCTS)) { in sci_set_termios()
2579 port->status |= UPSTAT_AUTOCTS; in sci_set_termios()
2581 s->autorts = true; in sci_set_termios()
2593 if (port->flags & UPF_HARD_FLOW) { in sci_set_termios()
2595 sci_set_mctrl(port, port->mctrl); in sci_set_termios()
2599 (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)); in sci_set_termios()
2600 serial_port_out(port, SCSCR, scr_val | s->hscif_tot); in sci_set_termios()
2602 (port->type == PORT_SCIFA || port->type == PORT_SCIFB)) { in sci_set_termios()
2622 s->rx_frame = (10000 * bits) / (baud / 100); in sci_set_termios()
2624 s->rx_timeout = s->buf_len_rx * 2 * s->rx_frame; in sci_set_termios()
2625 if (s->rx_timeout < 20) in sci_set_termios()
2626 s->rx_timeout = 20; in sci_set_termios()
2629 if ((termios->c_cflag & CREAD) != 0) in sci_set_termios()
2632 spin_unlock_irqrestore(&port->lock, flags); in sci_set_termios()
2636 if (UART_ENABLE_MS(port, termios->c_cflag)) in sci_set_termios()
2657 switch (port->type) { in sci_type()
2669 return "hscif"; in sci_type()
2682 if (port->membase) in sci_remap_port()
2685 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_remap_port()
2686 port->membase = ioremap(port->mapbase, sport->reg_size); in sci_remap_port()
2687 if (unlikely(!port->membase)) { in sci_remap_port()
2688 dev_err(port->dev, "can't remap port#%d\n", port->line); in sci_remap_port()
2689 return -ENXIO; in sci_remap_port()
2697 port->membase = (void __iomem *)(uintptr_t)port->mapbase; in sci_remap_port()
2707 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { in sci_release_port()
2708 iounmap(port->membase); in sci_release_port()
2709 port->membase = NULL; in sci_release_port()
2712 release_mem_region(port->mapbase, sport->reg_size); in sci_release_port()
2721 res = request_mem_region(port->mapbase, sport->reg_size, in sci_request_port()
2722 dev_name(port->dev)); in sci_request_port()
2724 dev_err(port->dev, "request_mem_region failed."); in sci_request_port()
2725 return -EBUSY; in sci_request_port()
2742 port->type = sport->cfg->type; in sci_config_port()
2749 if (ser->baud_base < 2400) in sci_verify_port()
2751 return -EINVAL; in sci_verify_port()
2792 if (sci_port->cfg->type == PORT_HSCIF) in sci_init_clocks()
2797 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2798 return -EPROBE_DEFER; in sci_init_clocks()
2806 if (PTR_ERR(clk) == -EPROBE_DEFER) in sci_init_clocks()
2807 return -EPROBE_DEFER; in sci_init_clocks()
2833 sci_port->clks[i] = IS_ERR(clk) ? NULL : clk; in sci_init_clocks()
2843 if (cfg->regtype != SCIx_PROBE_REGTYPE) in sci_probe_regmap()
2844 return &sci_port_params[cfg->regtype]; in sci_probe_regmap()
2846 switch (cfg->type) { in sci_probe_regmap()
2861 * The SH-4 is a bit of a misnomer here, although that's in sci_probe_regmap()
2883 struct uart_port *port = &sci_port->port; in sci_init_single()
2888 sci_port->cfg = p; in sci_init_single()
2890 port->ops = &sci_uart_ops; in sci_init_single()
2891 port->iotype = UPIO_MEM; in sci_init_single()
2892 port->line = index; in sci_init_single()
2893 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SH_SCI_CONSOLE); in sci_init_single()
2897 return -ENOMEM; in sci_init_single()
2899 port->mapbase = res->start; in sci_init_single()
2900 sci_port->reg_size = resource_size(res); in sci_init_single()
2902 for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i) { in sci_init_single()
2904 sci_port->irqs[i] = platform_get_irq_optional(dev, i); in sci_init_single()
2906 sci_port->irqs[i] = platform_get_irq(dev, i); in sci_init_single()
2912 * In the non-muxed case, up to 6 interrupt signals might be generated in sci_init_single()
2916 if (sci_port->irqs[0] < 0) in sci_init_single()
2917 return -ENXIO; in sci_init_single()
2919 if (sci_port->irqs[1] < 0) in sci_init_single()
2920 for (i = 1; i < ARRAY_SIZE(sci_port->irqs); i++) in sci_init_single()
2921 sci_port->irqs[i] = sci_port->irqs[0]; in sci_init_single()
2923 sci_port->params = sci_probe_regmap(p); in sci_init_single()
2924 if (unlikely(sci_port->params == NULL)) in sci_init_single()
2925 return -EINVAL; in sci_init_single()
2927 switch (p->type) { in sci_init_single()
2929 sci_port->rx_trigger = 48; in sci_init_single()
2932 sci_port->rx_trigger = 64; in sci_init_single()
2935 sci_port->rx_trigger = 32; in sci_init_single()
2938 if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) in sci_init_single()
2940 sci_port->rx_trigger = 1; in sci_init_single()
2942 sci_port->rx_trigger = 8; in sci_init_single()
2945 sci_port->rx_trigger = 1; in sci_init_single()
2949 sci_port->rx_fifo_timeout = 0; in sci_init_single()
2950 sci_port->hscif_tot = 0; in sci_init_single()
2956 sci_port->sampling_rate_mask = p->sampling_rate in sci_init_single()
2957 ? SCI_SR(p->sampling_rate) in sci_init_single()
2958 : sci_port->params->sampling_rate_mask; in sci_init_single()
2961 ret = sci_init_clocks(sci_port, &dev->dev); in sci_init_single()
2965 port->dev = &dev->dev; in sci_init_single()
2967 pm_runtime_enable(&dev->dev); in sci_init_single()
2970 port->type = p->type; in sci_init_single()
2971 port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags; in sci_init_single()
2972 port->fifosize = sci_port->params->fifosize; in sci_init_single()
2974 if (port->type == PORT_SCI) { in sci_init_single()
2975 if (sci_port->reg_size >= 0x20) in sci_init_single()
2976 port->regshift = 2; in sci_init_single()
2978 port->regshift = 1; in sci_init_single()
2983 * for the multi-IRQ ports, which is where we are primarily in sci_init_single()
2988 port->irq = sci_port->irqs[SCIx_RXI_IRQ]; in sci_init_single()
2989 port->irqflags = 0; in sci_init_single()
2991 port->serial_in = sci_serial_in; in sci_init_single()
2992 port->serial_out = sci_serial_out; in sci_init_single()
2999 pm_runtime_disable(port->port.dev); in sci_cleanup_single()
3016 struct sci_port *sci_port = &sci_ports[co->index]; in serial_console_write()
3017 struct uart_port *port = &sci_port->port; in serial_console_write()
3022 if (port->sysrq) in serial_console_write()
3025 locked = spin_trylock_irqsave(&port->lock, flags); in serial_console_write()
3027 spin_lock_irqsave(&port->lock, flags); in serial_console_write()
3032 (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) | in serial_console_write()
3034 serial_port_out(port, SCSCR, ctrl_temp | sci_port->hscif_tot); in serial_console_write()
3047 spin_unlock_irqrestore(&port->lock, flags); in serial_console_write()
3063 if (co->index < 0 || co->index >= SCI_NPORTS) in serial_console_setup()
3064 return -ENODEV; in serial_console_setup()
3066 sci_port = &sci_ports[co->index]; in serial_console_setup()
3067 port = &sci_port->port; in serial_console_setup()
3072 if (!port->ops) in serial_console_setup()
3073 return -ENODEV; in serial_console_setup()
3091 .index = -1,
3100 .index = -1,
3107 const struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev); in sci_probe_earlyprintk()
3110 return -EEXIST; in sci_probe_earlyprintk()
3112 early_serial_console.index = pdev->id; in sci_probe_earlyprintk()
3114 sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true); in sci_probe_earlyprintk()
3131 return -EINVAL; in sci_probe_earlyprintk()
3154 unsigned int type = port->port.type; /* uart_remove_... clears it */ in sci_remove()
3156 sci_ports_in_use &= ~BIT(port->port.line); in sci_remove()
3157 uart_remove_one_port(&sci_uart_driver, &port->port); in sci_remove()
3161 if (port->port.fifosize > 1) in sci_remove()
3162 device_remove_file(&dev->dev, &dev_attr_rx_fifo_trigger); in sci_remove()
3164 device_remove_file(&dev->dev, &dev_attr_rx_fifo_timeout); in sci_remove()
3175 /* SoC-specific types */
3177 .compatible = "renesas,scif-r7s72100",
3181 .compatible = "renesas,scif-r7s9210",
3184 /* Family-specific types */
3186 .compatible = "renesas,rcar-gen1-scif",
3189 .compatible = "renesas,rcar-gen2-scif",
3192 .compatible = "renesas,rcar-gen3-scif",
3206 .compatible = "renesas,hscif",
3220 struct device_node *np = pdev->dev.of_node; in sci_parse_dt()
3229 data = of_device_get_match_data(&pdev->dev); in sci_parse_dt()
3231 p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL); in sci_parse_dt()
3240 dev_err(&pdev->dev, "failed to get alias id (%d)\n", id); in sci_parse_dt()
3244 dev_err(&pdev->dev, "serial%d out of range\n", id); in sci_parse_dt()
3251 p->type = SCI_OF_TYPE(data); in sci_parse_dt()
3252 p->regtype = SCI_OF_REGTYPE(data); in sci_parse_dt()
3254 sp->has_rtscts = of_property_read_bool(np, "uart-has-rtscts"); in sci_parse_dt()
3268 dev_notice(&dev->dev, "Attempting to register port %d when only %d are available\n", in sci_probe_single()
3270 dev_notice(&dev->dev, "Consider bumping CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); in sci_probe_single()
3271 return -EINVAL; in sci_probe_single()
3275 return -EBUSY; in sci_probe_single()
3291 sciport->gpios = mctrl_gpio_init(&sciport->port, 0); in sci_probe_single()
3292 if (IS_ERR(sciport->gpios)) in sci_probe_single()
3293 return PTR_ERR(sciport->gpios); in sci_probe_single()
3295 if (sciport->has_rtscts) { in sci_probe_single()
3296 if (mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_CTS) || in sci_probe_single()
3297 mctrl_gpio_to_gpiod(sciport->gpios, UART_GPIO_RTS)) { in sci_probe_single()
3298 dev_err(&dev->dev, "Conflicting RTS/CTS config\n"); in sci_probe_single()
3299 return -EINVAL; in sci_probe_single()
3301 sciport->port.flags |= UPF_HARD_FLOW; in sci_probe_single()
3304 ret = uart_add_one_port(&sci_uart_driver, &sciport->port); in sci_probe_single()
3330 if (dev->dev.of_node) { in sci_probe()
3333 return -EINVAL; in sci_probe()
3335 p = dev->dev.platform_data; in sci_probe()
3337 dev_err(&dev->dev, "no platform data supplied\n"); in sci_probe()
3338 return -EINVAL; in sci_probe()
3341 dev_id = dev->id; in sci_probe()
3351 if (sp->port.fifosize > 1) { in sci_probe()
3352 ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_trigger); in sci_probe()
3356 if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB || in sci_probe()
3357 sp->port.type == PORT_HSCIF) { in sci_probe()
3358 ret = device_create_file(&dev->dev, &dev_attr_rx_fifo_timeout); in sci_probe()
3360 if (sp->port.fifosize > 1) { in sci_probe()
3361 device_remove_file(&dev->dev, in sci_probe()
3381 uart_suspend_port(&sci_uart_driver, &sport->port); in sci_suspend()
3391 uart_resume_port(&sci_uart_driver, &sport->port); in sci_resume()
3402 .name = "sh-sci",
3433 if (!device->port.membase) in early_console_setup()
3434 return -ENODEV; in early_console_setup()
3436 device->port.serial_in = sci_serial_in; in early_console_setup()
3437 device->port.serial_out = sci_serial_out; in early_console_setup()
3438 device->port.type = type; in early_console_setup()
3439 memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port)); in early_console_setup()
3447 device->con->write = serial_console_write; in early_console_setup()
3484 OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup);
3487 OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup);
3494 MODULE_ALIAS("platform:sh-sci");