Lines Matching refs:membase
202 uport->membase = devm_platform_ioremap_resource(pdev, 0); in qcom_geni_serial_request_port()
203 if (IS_ERR(uport->membase)) in qcom_geni_serial_request_port()
204 return PTR_ERR(uport->membase); in qcom_geni_serial_request_port()
205 port->se.base = uport->membase; in qcom_geni_serial_request_port()
225 geni_ios = readl(uport->membase + SE_GENI_IOS); in qcom_geni_serial_get_mctrl()
247 writel(uart_manual_rfr, uport->membase + SE_UART_MANUAL_RFR); in qcom_geni_serial_set_mctrl()
296 reg = readl(uport->membase + offset); in qcom_geni_serial_poll_bit()
309 writel(xmit_size, uport->membase + SE_UART_TX_TRANS_LEN); in qcom_geni_serial_setup_tx()
311 writel(m_cmd, uport->membase + SE_GENI_M_CMD0); in qcom_geni_serial_setup_tx()
322 writel(M_GENI_CMD_ABORT, uport->membase + in qcom_geni_serial_poll_tx_done()
328 writel(irq_clear, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_poll_tx_done()
335 writel(S_GENI_CMD_ABORT, uport->membase + SE_GENI_S_CMD_CTRL_REG); in qcom_geni_serial_abort_rx()
338 writel(irq_clear, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_abort_rx()
339 writel(FORCE_DEFAULT, uport->membase + GENI_FORCE_DEFAULT_REG); in qcom_geni_serial_abort_rx()
352 status = readl(uport->membase + SE_GENI_M_IRQ_STATUS); in qcom_geni_serial_get_char()
353 writel(status, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_get_char()
355 status = readl(uport->membase + SE_GENI_S_IRQ_STATUS); in qcom_geni_serial_get_char()
356 writel(status, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_get_char()
358 status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS); in qcom_geni_serial_get_char()
376 readl(uport->membase + SE_GENI_RX_FIFOn); in qcom_geni_serial_get_char()
389 writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); in qcom_geni_serial_poll_put_char()
393 writel(c, uport->membase + SE_GENI_TX_FIFOn); in qcom_geni_serial_poll_put_char()
394 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_poll_put_char()
410 uport->membase + SE_GENI_TX_FIFOn); in qcom_geni_serial_wr_char()
433 writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); in __qcom_geni_serial_console_write()
451 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + in __qcom_geni_serial_console_write()
460 uport->membase + SE_GENI_TX_FIFOn); in __qcom_geni_serial_console_write()
489 geni_status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_console_write()
499 writel(M_CMD_ABORT_EN, uport->membase + in qcom_geni_serial_console_write()
502 writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_console_write()
511 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_console_write()
513 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_console_write()
538 ioread32_rep(uport->membase + SE_GENI_RX_FIFOn, buf, 1); in handle_rx_console()
580 ioread32_rep(uport->membase + SE_GENI_RX_FIFOn, port->rx_fifo, words); in handle_rx_uart()
600 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_start_tx()
607 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_tx()
610 writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); in qcom_geni_serial_start_tx()
611 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_tx()
620 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_tx()
622 writel(0, uport->membase + SE_GENI_TX_WATERMARK_REG); in qcom_geni_serial_stop_tx()
623 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_tx()
624 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_stop_tx()
635 writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_stop_tx()
637 writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_stop_tx()
646 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_start_rx()
652 irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_start_rx()
654 writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_start_rx()
656 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_rx()
658 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_start_rx()
668 irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_stop_rx()
670 writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); in qcom_geni_serial_stop_rx()
672 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_rx()
674 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_stop_rx()
676 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_stop_rx()
688 s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS); in qcom_geni_serial_stop_rx()
692 writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_stop_rx()
694 status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_stop_rx()
708 status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS); in qcom_geni_serial_handle_rx()
738 status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS); in qcom_geni_serial_handle_tx()
764 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
767 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
784 iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1); in qcom_geni_serial_handle_tx()
800 uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_handle_tx()
804 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
807 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx()
830 m_irq_status = readl(uport->membase + SE_GENI_M_IRQ_STATUS); in qcom_geni_serial_isr()
831 s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS); in qcom_geni_serial_isr()
832 geni_status = readl(uport->membase + SE_GENI_STATUS); in qcom_geni_serial_isr()
833 m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_isr()
834 writel(m_irq_status, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_isr()
835 writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR); in qcom_geni_serial_isr()
904 writel(rxstale, uport->membase + SE_UART_RX_STALE_CNT); in qcom_geni_serial_port_setup()
906 pin_swap = readl(uport->membase + SE_UART_IO_MACRO_CTRL); in qcom_geni_serial_port_setup()
917 writel(pin_swap, uport->membase + SE_UART_IO_MACRO_CTRL); in qcom_geni_serial_port_setup()
1026 tx_trans_cfg = readl(uport->membase + SE_UART_TX_TRANS_CFG); in qcom_geni_serial_set_termios()
1027 tx_parity_cfg = readl(uport->membase + SE_UART_TX_PARITY_CFG); in qcom_geni_serial_set_termios()
1028 rx_trans_cfg = readl(uport->membase + SE_UART_RX_TRANS_CFG); in qcom_geni_serial_set_termios()
1029 rx_parity_cfg = readl(uport->membase + SE_UART_RX_PARITY_CFG); in qcom_geni_serial_set_termios()
1086 uport->membase + SE_UART_LOOPBACK_CFG); in qcom_geni_serial_set_termios()
1087 writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG); in qcom_geni_serial_set_termios()
1088 writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG); in qcom_geni_serial_set_termios()
1089 writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG); in qcom_geni_serial_set_termios()
1090 writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG); in qcom_geni_serial_set_termios()
1091 writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN); in qcom_geni_serial_set_termios()
1092 writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN); in qcom_geni_serial_set_termios()
1093 writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN); in qcom_geni_serial_set_termios()
1094 writel(ser_clk_cfg, uport->membase + GENI_SER_M_CLK_CFG); in qcom_geni_serial_set_termios()
1095 writel(ser_clk_cfg, uport->membase + GENI_SER_S_CLK_CFG); in qcom_geni_serial_set_termios()
1102 return !readl(uport->membase + SE_GENI_TX_FIFO_STATUS); in qcom_geni_serial_tx_empty()
1127 if (unlikely(!uport->membase)) in qcom_geni_console_setup()
1200 if (!uport->membase) in qcom_geni_serial_earlycon_setup()
1206 se.base = uport->membase; in qcom_geni_serial_earlycon_setup()
1227 writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG); in qcom_geni_serial_earlycon_setup()
1228 writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG); in qcom_geni_serial_earlycon_setup()
1229 writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG); in qcom_geni_serial_earlycon_setup()
1230 writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG); in qcom_geni_serial_earlycon_setup()
1231 writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN); in qcom_geni_serial_earlycon_setup()
1232 writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN); in qcom_geni_serial_earlycon_setup()
1233 writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN); in qcom_geni_serial_earlycon_setup()