Lines Matching +full:port +full:- +full:1

1 // SPDX-License-Identifier: GPL-2.0+
28 #include <linux/soc/nxp/lpc32xx-misc.h>
39 #define LPC32XX_HSU_BREAK_DATA (1 << 10)
40 #define LPC32XX_HSU_ERROR_DATA (1 << 9)
41 #define LPC32XX_HSU_RX_EMPTY (1 << 8)
46 #define LPC32XX_HSU_TX_INT_SET (1 << 6)
47 #define LPC32XX_HSU_RX_OE_INT (1 << 5)
48 #define LPC32XX_HSU_BRK_INT (1 << 4)
49 #define LPC32XX_HSU_FE_INT (1 << 3)
50 #define LPC32XX_HSU_RX_TIMEOUT_INT (1 << 2)
51 #define LPC32XX_HSU_RX_TRIG_INT (1 << 1)
52 #define LPC32XX_HSU_TX_INT (1 << 0)
54 #define LPC32XX_HSU_HRTS_INV (1 << 21)
59 #define LPC32XX_HSU_HRTS_EN (1 << 18)
64 #define LPC32XX_HSU_HCTS_INV (1 << 15)
65 #define LPC32XX_HSU_HCTS_EN (1 << 14)
67 #define LPC32XX_HSU_BREAK (1 << 8)
68 #define LPC32XX_HSU_ERR_INT_EN (1 << 7)
69 #define LPC32XX_HSU_RX_INT_EN (1 << 6)
70 #define LPC32XX_HSU_TX_INT_EN (1 << 5)
88 struct uart_port port; member
97 static void wait_for_xmit_empty(struct uart_port *port) in wait_for_xmit_empty() argument
103 port->membase))) == 0) in wait_for_xmit_empty()
105 if (--timeout == 0) in wait_for_xmit_empty()
107 udelay(1); in wait_for_xmit_empty()
108 } while (1); in wait_for_xmit_empty()
111 static void wait_for_xmit_ready(struct uart_port *port) in wait_for_xmit_ready() argument
115 while (1) { in wait_for_xmit_ready()
117 port->membase))) < 32) in wait_for_xmit_ready()
119 if (--timeout == 0) in wait_for_xmit_ready()
121 udelay(1); in wait_for_xmit_ready()
125 static void lpc32xx_hsuart_console_putchar(struct uart_port *port, int ch) in lpc32xx_hsuart_console_putchar() argument
127 wait_for_xmit_ready(port); in lpc32xx_hsuart_console_putchar()
128 writel((u32)ch, LPC32XX_HSUART_FIFO(port->membase)); in lpc32xx_hsuart_console_putchar()
134 struct lpc32xx_hsuart_port *up = &lpc32xx_hs_ports[co->index]; in lpc32xx_hsuart_console_write()
136 int locked = 1; in lpc32xx_hsuart_console_write()
140 if (up->port.sysrq) in lpc32xx_hsuart_console_write()
143 locked = spin_trylock(&up->port.lock); in lpc32xx_hsuart_console_write()
145 spin_lock(&up->port.lock); in lpc32xx_hsuart_console_write()
147 uart_console_write(&up->port, s, count, lpc32xx_hsuart_console_putchar); in lpc32xx_hsuart_console_write()
148 wait_for_xmit_empty(&up->port); in lpc32xx_hsuart_console_write()
151 spin_unlock(&up->port.lock); in lpc32xx_hsuart_console_write()
158 struct uart_port *port; in lpc32xx_hsuart_console_setup() local
164 if (co->index >= MAX_PORTS) in lpc32xx_hsuart_console_setup()
165 co->index = 0; in lpc32xx_hsuart_console_setup()
167 port = &lpc32xx_hs_ports[co->index].port; in lpc32xx_hsuart_console_setup()
168 if (!port->membase) in lpc32xx_hsuart_console_setup()
169 return -ENODEV; in lpc32xx_hsuart_console_setup()
174 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in lpc32xx_hsuart_console_setup()
176 return uart_set_options(port, co, baud, parity, bits, flow); in lpc32xx_hsuart_console_setup()
186 .index = -1,
219 goodrate = hsu_rate = (div / 14) - 1; in __serial_get_clock_div()
221 hsu_rate--; in __serial_get_clock_div()
228 comprate = uartclk / ((hsu_rate + 1) * 14); in __serial_get_clock_div()
229 if (abs(comprate - rate) < rate_diff) { in __serial_get_clock_div()
231 rate_diff = abs(comprate - rate); in __serial_get_clock_div()
242 static void __serial_uart_flush(struct uart_port *port) in __serial_uart_flush() argument
247 while ((readl(LPC32XX_HSUART_LEVEL(port->membase)) > 0) && in __serial_uart_flush()
249 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_uart_flush()
252 static void __serial_lpc32xx_rx(struct uart_port *port) in __serial_lpc32xx_rx() argument
254 struct tty_port *tport = &port->state->port; in __serial_lpc32xx_rx()
258 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
261 port->icount.rx++; in __serial_lpc32xx_rx()
266 LPC32XX_HSUART_IIR(port->membase)); in __serial_lpc32xx_rx()
267 port->icount.frame++; in __serial_lpc32xx_rx()
274 tmp = readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_rx()
277 spin_unlock(&port->lock); in __serial_lpc32xx_rx()
279 spin_lock(&port->lock); in __serial_lpc32xx_rx()
282 static void __serial_lpc32xx_tx(struct uart_port *port) in __serial_lpc32xx_tx() argument
284 struct circ_buf *xmit = &port->state->xmit; in __serial_lpc32xx_tx()
287 if (port->x_char) { in __serial_lpc32xx_tx()
288 writel((u32)port->x_char, LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_tx()
289 port->icount.tx++; in __serial_lpc32xx_tx()
290 port->x_char = 0; in __serial_lpc32xx_tx()
294 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) in __serial_lpc32xx_tx()
299 LPC32XX_HSUART_LEVEL(port->membase))) < 64) { in __serial_lpc32xx_tx()
300 writel((u32) xmit->buf[xmit->tail], in __serial_lpc32xx_tx()
301 LPC32XX_HSUART_FIFO(port->membase)); in __serial_lpc32xx_tx()
302 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in __serial_lpc32xx_tx()
303 port->icount.tx++; in __serial_lpc32xx_tx()
309 uart_write_wakeup(port); in __serial_lpc32xx_tx()
313 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in __serial_lpc32xx_tx()
315 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in __serial_lpc32xx_tx()
321 struct uart_port *port = dev_id; in serial_lpc32xx_interrupt() local
322 struct tty_port *tport = &port->state->port; in serial_lpc32xx_interrupt()
325 spin_lock(&port->lock); in serial_lpc32xx_interrupt()
328 status = readl(LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
332 writel(LPC32XX_HSU_BRK_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
333 port->icount.brk++; in serial_lpc32xx_interrupt()
334 uart_handle_break(port); in serial_lpc32xx_interrupt()
339 writel(LPC32XX_HSU_FE_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
344 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
345 port->icount.overrun++; in serial_lpc32xx_interrupt()
352 __serial_lpc32xx_rx(port); in serial_lpc32xx_interrupt()
355 if ((status & LPC32XX_HSU_TX_INT) && (!uart_tx_stopped(port))) { in serial_lpc32xx_interrupt()
356 writel(LPC32XX_HSU_TX_INT, LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
357 __serial_lpc32xx_tx(port); in serial_lpc32xx_interrupt()
360 spin_unlock(&port->lock); in serial_lpc32xx_interrupt()
365 /* port->lock is not held. */
366 static unsigned int serial_lpc32xx_tx_empty(struct uart_port *port) in serial_lpc32xx_tx_empty() argument
370 if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(port->membase))) == 0) in serial_lpc32xx_tx_empty()
376 /* port->lock held by caller. */
377 static void serial_lpc32xx_set_mctrl(struct uart_port *port, in serial_lpc32xx_set_mctrl() argument
383 /* port->lock is held by caller and interrupts are disabled. */
384 static unsigned int serial_lpc32xx_get_mctrl(struct uart_port *port) in serial_lpc32xx_get_mctrl() argument
390 /* port->lock held by caller. */
391 static void serial_lpc32xx_stop_tx(struct uart_port *port) in serial_lpc32xx_stop_tx() argument
395 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
397 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_tx()
400 /* port->lock held by caller. */
401 static void serial_lpc32xx_start_tx(struct uart_port *port) in serial_lpc32xx_start_tx() argument
405 __serial_lpc32xx_tx(port); in serial_lpc32xx_start_tx()
406 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
408 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_start_tx()
411 /* port->lock held by caller. */
412 static void serial_lpc32xx_stop_rx(struct uart_port *port) in serial_lpc32xx_stop_rx() argument
416 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
418 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_stop_rx()
421 LPC32XX_HSU_FE_INT), LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_stop_rx()
424 /* port->lock is not held. */
425 static void serial_lpc32xx_break_ctl(struct uart_port *port, in serial_lpc32xx_break_ctl() argument
431 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_break_ctl()
432 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
437 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_break_ctl()
438 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_break_ctl()
441 /* port->lock is not held. */
442 static int serial_lpc32xx_startup(struct uart_port *port) in serial_lpc32xx_startup() argument
448 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_startup()
450 __serial_uart_flush(port); in serial_lpc32xx_startup()
454 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_startup()
456 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_startup()
464 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
466 lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */ in serial_lpc32xx_startup()
468 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_startup()
470 retval = request_irq(port->irq, serial_lpc32xx_interrupt, in serial_lpc32xx_startup()
471 0, MODNAME, port); in serial_lpc32xx_startup()
474 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_startup()
479 /* port->lock is not held. */
480 static void serial_lpc32xx_shutdown(struct uart_port *port) in serial_lpc32xx_shutdown() argument
485 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_shutdown()
489 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_shutdown()
491 lpc32xx_loopback_set(port->mapbase, 1); /* go to loopback mode */ in serial_lpc32xx_shutdown()
493 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_shutdown()
495 free_irq(port->irq, port); in serial_lpc32xx_shutdown()
498 /* port->lock is not held. */
499 static void serial_lpc32xx_set_termios(struct uart_port *port, in serial_lpc32xx_set_termios() argument
507 /* Always 8-bit, no parity, 1 stop bit */ in serial_lpc32xx_set_termios()
508 termios->c_cflag &= ~(CSIZE | CSTOPB | PARENB | PARODD); in serial_lpc32xx_set_termios()
509 termios->c_cflag |= CS8; in serial_lpc32xx_set_termios()
511 termios->c_cflag &= ~(HUPCL | CMSPAR | CLOCAL | CRTSCTS); in serial_lpc32xx_set_termios()
513 baud = uart_get_baud_rate(port, termios, old, 0, in serial_lpc32xx_set_termios()
514 port->uartclk / 14); in serial_lpc32xx_set_termios()
516 quot = __serial_get_clock_div(port->uartclk, baud); in serial_lpc32xx_set_termios()
518 spin_lock_irqsave(&port->lock, flags); in serial_lpc32xx_set_termios()
521 tmp = readl(LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
522 if ((termios->c_cflag & CREAD) == 0) in serial_lpc32xx_set_termios()
526 writel(tmp, LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_set_termios()
528 writel(quot, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_set_termios()
530 uart_update_timeout(port, termios->c_cflag, baud); in serial_lpc32xx_set_termios()
532 spin_unlock_irqrestore(&port->lock, flags); in serial_lpc32xx_set_termios()
539 static const char *serial_lpc32xx_type(struct uart_port *port) in serial_lpc32xx_type() argument
544 static void serial_lpc32xx_release_port(struct uart_port *port) in serial_lpc32xx_release_port() argument
546 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_release_port()
547 if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_release_port()
548 iounmap(port->membase); in serial_lpc32xx_release_port()
549 port->membase = NULL; in serial_lpc32xx_release_port()
552 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_release_port()
556 static int serial_lpc32xx_request_port(struct uart_port *port) in serial_lpc32xx_request_port() argument
558 int ret = -ENODEV; in serial_lpc32xx_request_port()
560 if ((port->iotype == UPIO_MEM32) && (port->mapbase)) { in serial_lpc32xx_request_port()
563 if (!request_mem_region(port->mapbase, SZ_4K, MODNAME)) in serial_lpc32xx_request_port()
564 ret = -EBUSY; in serial_lpc32xx_request_port()
565 else if (port->flags & UPF_IOREMAP) { in serial_lpc32xx_request_port()
566 port->membase = ioremap(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
567 if (!port->membase) { in serial_lpc32xx_request_port()
568 release_mem_region(port->mapbase, SZ_4K); in serial_lpc32xx_request_port()
569 ret = -ENOMEM; in serial_lpc32xx_request_port()
577 static void serial_lpc32xx_config_port(struct uart_port *port, int uflags) in serial_lpc32xx_config_port() argument
581 ret = serial_lpc32xx_request_port(port); in serial_lpc32xx_config_port()
584 port->type = PORT_UART00; in serial_lpc32xx_config_port()
585 port->fifosize = 64; in serial_lpc32xx_config_port()
587 __serial_uart_flush(port); in serial_lpc32xx_config_port()
591 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_config_port()
593 writel(0xFF, LPC32XX_HSUART_RATE(port->membase)); in serial_lpc32xx_config_port()
599 LPC32XX_HSUART_CTRL(port->membase)); in serial_lpc32xx_config_port()
602 static int serial_lpc32xx_verify_port(struct uart_port *port, in serial_lpc32xx_verify_port() argument
607 if (ser->type != PORT_UART00) in serial_lpc32xx_verify_port()
608 ret = -EINVAL; in serial_lpc32xx_verify_port()
641 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
643 uarts_registered + 1); in serial_hs_lpc32xx_probe()
644 return -ENXIO; in serial_hs_lpc32xx_probe()
651 dev_err(&pdev->dev, in serial_hs_lpc32xx_probe()
652 "Error getting mem resource for HS UART port %d\n", in serial_hs_lpc32xx_probe()
654 return -ENXIO; in serial_hs_lpc32xx_probe()
656 p->port.mapbase = res->start; in serial_hs_lpc32xx_probe()
657 p->port.membase = NULL; in serial_hs_lpc32xx_probe()
662 p->port.irq = ret; in serial_hs_lpc32xx_probe()
664 p->port.iotype = UPIO_MEM32; in serial_hs_lpc32xx_probe()
665 p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; in serial_hs_lpc32xx_probe()
666 p->port.regshift = 2; in serial_hs_lpc32xx_probe()
667 p->port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_IOREMAP; in serial_hs_lpc32xx_probe()
668 p->port.dev = &pdev->dev; in serial_hs_lpc32xx_probe()
669 p->port.ops = &serial_lpc32xx_pops; in serial_hs_lpc32xx_probe()
670 p->port.line = uarts_registered++; in serial_hs_lpc32xx_probe()
671 spin_lock_init(&p->port.lock); in serial_hs_lpc32xx_probe()
673 /* send port to loopback mode by default */ in serial_hs_lpc32xx_probe()
674 lpc32xx_loopback_set(p->port.mapbase, 1); in serial_hs_lpc32xx_probe()
676 ret = uart_add_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_probe()
690 uart_remove_one_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_remove()
702 uart_suspend_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_suspend()
711 uart_resume_port(&lpc32xx_hs_reg, &p->port); in serial_hs_lpc32xx_resume()
721 { .compatible = "nxp,lpc3220-hsuart" },