69 	unsigned char			curregs[NUM_ZSREGS];  member
90 	(UART_ZILOG(PORT)->curregs[REGNUM])
92 	((UART_ZILOG(PORT)->curregs[REGNUM]) = (REGVAL))
240 			__load_zsregs(channel, up->curregs);  in ip22zilog_maybe_update_regs()
325 	if (up->curregs[R15] & BRKIE) {  in ip22zilog_status_handle()
379 		__load_zsregs(channel, up->curregs);  in ip22zilog_transmit_chars()
561 	up->curregs[R5] |= set_bits;  in ip22zilog_set_mctrl()
562 	up->curregs[R5] &= ~clear_bits;  in ip22zilog_set_mctrl()
563 	write_zsreg(channel, R5, up->curregs[R5]);  in ip22zilog_set_mctrl()
632 	up->curregs[R1] &= ~RxINT_MASK;  in ip22zilog_stop_rx()
644 	new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE);  in ip22zilog_enable_ms()
645 	if (new_reg != up->curregs[R15]) {  in ip22zilog_enable_ms()
646 		up->curregs[R15] = new_reg;  in ip22zilog_enable_ms()
649 		write_zsreg(channel, R15, up->curregs[R15]);  in ip22zilog_enable_ms()
671 	new_reg = (up->curregs[R5] | set_bits) & ~clear_bits;  in ip22zilog_break_ctl()
672 	if (new_reg != up->curregs[R5]) {  in ip22zilog_break_ctl()
673 		up->curregs[R5] = new_reg;  in ip22zilog_break_ctl()
676 		write_zsreg(channel, R5, up->curregs[R5]);  in ip22zilog_break_ctl()
719 	__load_zsregs(channel, up->curregs);  in __ip22zilog_startup()
721 	write_zsreg(channel, R9, up->curregs[R9]);  in __ip22zilog_startup()
725 	up->curregs[R3] |= RxENAB;  in __ip22zilog_startup()
726 	up->curregs[R5] |= TxENAB;  in __ip22zilog_startup()
728 	up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;  in __ip22zilog_startup()
785 	up->curregs[R3] &= ~RxENAB;  in ip22zilog_shutdown()
786 	up->curregs[R5] &= ~TxENAB;  in ip22zilog_shutdown()
789 	up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);  in ip22zilog_shutdown()
790 	up->curregs[R5] &= ~SND_BRK;  in ip22zilog_shutdown()
804 	up->curregs[R10] = NRZ;  in ip22zilog_convert_to_zs()
805 	up->curregs[R11] = TCBR | RCBR;  in ip22zilog_convert_to_zs()
808 	up->curregs[R4] &= ~XCLK_MASK;  in ip22zilog_convert_to_zs()
809 	up->curregs[R4] |= X16CLK;  in ip22zilog_convert_to_zs()
810 	up->curregs[R12] = brg & 0xff;  in ip22zilog_convert_to_zs()
811 	up->curregs[R13] = (brg >> 8) & 0xff;  in ip22zilog_convert_to_zs()
812 	up->curregs[R14] = BRENAB;  in ip22zilog_convert_to_zs()
815 	up->curregs[3] &= ~RxN_MASK;  in ip22zilog_convert_to_zs()
816 	up->curregs[5] &= ~TxN_MASK;  in ip22zilog_convert_to_zs()
819 		up->curregs[3] |= Rx5;  in ip22zilog_convert_to_zs()
820 		up->curregs[5] |= Tx5;  in ip22zilog_convert_to_zs()
824 		up->curregs[3] |= Rx6;  in ip22zilog_convert_to_zs()
825 		up->curregs[5] |= Tx6;  in ip22zilog_convert_to_zs()
829 		up->curregs[3] |= Rx7;  in ip22zilog_convert_to_zs()
830 		up->curregs[5] |= Tx7;  in ip22zilog_convert_to_zs()
835 		up->curregs[3] |= Rx8;  in ip22zilog_convert_to_zs()
836 		up->curregs[5] |= Tx8;  in ip22zilog_convert_to_zs()
840 	up->curregs[4] &= ~0x0c;  in ip22zilog_convert_to_zs()
842 		up->curregs[4] |= SB2;  in ip22zilog_convert_to_zs()
844 		up->curregs[4] |= SB1;  in ip22zilog_convert_to_zs()
846 		up->curregs[4] |= PAR_ENAB;  in ip22zilog_convert_to_zs()
848 		up->curregs[4] &= ~PAR_ENAB;  in ip22zilog_convert_to_zs()
850 		up->curregs[4] |= PAR_EVEN;  in ip22zilog_convert_to_zs()
852 		up->curregs[4] &= ~PAR_EVEN;  in ip22zilog_convert_to_zs()
1041 	up->curregs[R15] |= BRKIE;  in ip22zilog_console_setup()
1140 		up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;  in ip22zilog_prepare()
1141 		up->curregs[R4] = PAR_EVEN | X16CLK | SB1;  in ip22zilog_prepare()
1142 		up->curregs[R3] = RxENAB | Rx8;  in ip22zilog_prepare()
1143 		up->curregs[R5] = TxENAB | Tx8;  in ip22zilog_prepare()
1144 		up->curregs[R9] = NV | MIE;  in ip22zilog_prepare()
1145 		up->curregs[R10] = NRZ;  in ip22zilog_prepare()
1146 		up->curregs[R11] = TCBR | RCBR;  in ip22zilog_prepare()
1148 		up->curregs[R12] = (brg & 0xff);  in ip22zilog_prepare()
1149 		up->curregs[R13] = (brg >> 8) & 0xff;  in ip22zilog_prepare()
1150 		up->curregs[R14] = BRENAB;  in ip22zilog_prepare()