Lines Matching refs:membase
332 return readl(port->membase + off); in lpuart32_read()
334 return ioread32be(port->membase + off); in lpuart32_read()
345 writel(val, port->membase + off); in lpuart32_write()
348 iowrite32be(val, port->membase + off); in lpuart32_write()
390 temp = readb(port->membase + UARTCR2); in lpuart_stop_tx()
392 writeb(temp, port->membase + UARTCR2); in lpuart_stop_tx()
408 temp = readb(port->membase + UARTCR2); in lpuart_stop_rx()
409 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); in lpuart_stop_rx()
567 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
569 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
576 while (!(readb(port->membase + offset) & bit)) in lpuart_wait_bit_set()
600 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
602 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
605 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
609 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
612 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
613 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
614 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
617 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
618 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
621 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
631 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
636 if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF)) in lpuart_poll_get_char()
639 return readb(port->membase + UARTDR); in lpuart_poll_get_char()
696 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_transmit_buffer()
708 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
709 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
763 temp = readb(port->membase + UARTCR2); in lpuart_start_tx()
764 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); in lpuart_start_tx()
770 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) in lpuart_start_tx()
797 unsigned char sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty()
798 unsigned char sfifo = readb(port->membase + UARTSFIFO); in lpuart_tx_empty()
843 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
850 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
851 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
895 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
896 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
978 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
982 readb(sport->port.membase + UARTDR); in lpuart_int()
985 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1071 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1077 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1079 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1082 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1097 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1100 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1102 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1106 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1270 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1271 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1298 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1300 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1339 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1399 reg = readb(port->membase + UARTMODEM); in lpuart_get_mctrl()
1432 temp = readb(sport->port.membase + UARTMODEM) & in lpuart_set_mctrl()
1441 writeb(temp, port->membase + UARTMODEM); in lpuart_set_mctrl()
1454 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; in lpuart_break_ctl()
1459 writeb(temp, port->membase + UARTCR2); in lpuart_break_ctl()
1479 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1483 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1485 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1487 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1491 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1494 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1495 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1496 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1499 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1500 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1503 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1512 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1514 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1598 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1599 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1629 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1631 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1647 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1760 temp = readb(port->membase + UARTCR2); in lpuart_shutdown()
1763 writeb(temp, port->membase + UARTCR2); in lpuart_shutdown()
1801 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1802 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1803 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1804 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1805 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1806 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1917 sport->port.membase + UARTCR2); in lpuart_set_termios()
1925 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
1926 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
1927 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
1928 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
1929 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
1930 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
1933 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
2264 writeb(ch, port->membase + UARTDR); in lpuart_console_putchar()
2287 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2290 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2297 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2344 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2351 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2366 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2368 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2372 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2503 if (!device->port.membase) in lpuart_early_console_setup()
2513 if (!device->port.membase) in lpuart32_early_console_setup()
2528 if (!device->port.membase) in ls1028a_early_console_setup()
2550 if (!device->port.membase) in lpuart32_imx_early_console_setup()
2554 device->port.membase += IMX_REG_OFF; in lpuart32_imx_early_console_setup()
2596 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
2597 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2598 return PTR_ERR(sport->port.membase); in lpuart_probe()
2600 sport->port.membase += sdata->reg_off; in lpuart_probe()
2740 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
2742 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
2769 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
2770 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()