284 static unsigned int pl011_read(const struct uart_amba_port *uap,  in pl011_read()  function
316 		status = pl011_read(uap, REG_FR);  in pl011_fifo_to_tty()
321 		ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX;  in pl011_fifo_to_tty()
780 	if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) {  in pl011_dma_tx_start()
1191 	while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy)  in pl011_dma_shutdown()
1376 	    pl011_read(uap, REG_FR) & UART01x_FR_TXFF)  in pl011_tx_char()
1430 	status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY;  in pl011_modem_status()
1464 	pl011_read(uap, REG_ICR);  in check_apply_cts_event_workaround()
1465 	pl011_read(uap, REG_ICR);  in check_apply_cts_event_workaround()
1476 	status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1500 			status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1516 	unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr;  in pl011_tx_empty()
1527 	unsigned int status = pl011_read(uap, REG_FR);  in pl011_get_mctrl()
1547 	cr = pl011_read(uap, REG_CR);  in pl011_set_mctrl()
1578 	lcr_h = pl011_read(uap, REG_LCRH_TX);  in pl011_break_ctl()
1594 	pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR);  in pl011_quiesce_irqs()
1608 	pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap,  in pl011_quiesce_irqs()
1624 	status = pl011_read(uap, REG_FR);  in pl011_get_poll_char()
1628 	return pl011_read(uap, REG_DR);  in pl011_get_poll_char()
1637 	while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF)  in pl011_put_poll_char()
1672 	uap->im = pl011_read(uap, REG_IMSC);  in pl011_hwinit()
1734 		if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE)  in pl011_enable_interrupts()
1737 		pl011_read(uap, REG_DR);  in pl011_enable_interrupts()
1776 	uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY;  in pl011_startup()
1817       val = pl011_read(uap, lcrh);  in pl011_shutdown_channel()
1833 	cr = pl011_read(uap, REG_CR);  in pl011_disable_uart()
2009 	old_cr = pl011_read(uap, REG_CR);  in pl011_set_termios()
2194 	while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF)  in pl011_console_putchar()
2221 		old_cr = pl011_read(uap, REG_CR);  in pl011_console_write()
2234 	while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr)  in pl011_console_write()
2250 	if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) {  in pl011_console_get_options()
2253 		lcr_h = pl011_read(uap, REG_LCRH_TX);  in pl011_console_get_options()
2268 		ibrd = pl011_read(uap, REG_IBRD);  in pl011_console_get_options()
2269 		fbrd = pl011_read(uap, REG_FBRD);  in pl011_console_get_options()
2274 			if (pl011_read(uap, REG_CR)  in pl011_console_get_options()